source: rtems/cpukit/score/cpu/arm/arm_exc_handler_high.c @ c5ed148

4.115
Last change on this file since c5ed148 was c5ed148, checked in by Sebastian Huber <sebastian.huber@…>, on 09/24/11 at 12:56:51

2011-09-24 Sebastian Huber <sebastian.huber@…>

  • rtems/score/armv7m.h, armv7m-context-initialize.c, armv7m-context-restore.c, armv7m-context-switch.c, armv7m-exception-handler-get.c, armv7m-exception-handler-set.c, armv7m-exception-priority-get.c, armv7m-exception-priority-set.c, armv7m-initialize.c, armv7m-isr-dispatch.c, armv7m-isr-enter-leave.c, armv7m-isr-level-get.c, armv7m-isr-level-set.c, armv7m-isr-vector-install.c, armv7m-multitasking-start-stop.c: New files.
  • Makefile.am, preinstall.am: Reflect changes above.
  • rtems/score/arm.h: Define ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M.
  • rtems/score/cpu.h, cpu_asm.S, cpu.c, arm_exc_abort.S, arm_exc_handler_high.c, arm_exc_handler_low.S, arm_exc_interrupt.S: Define CPU_HAS_HARDWARE_INTERRUPT_STACK to FALSE. Use ARM_MULTILIB_ARCH_V4 and ARM_MULTILIB_ARCH_V7M.
  • Property mode set to 100644
File size: 3.8 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup ScoreCPU
5 *
6 * @brief ARM exception support implementation.
7 */
8
9/*
10 *  COPYRIGHT (c) 2000 Canon Research Centre France SA.
11 *  Emmanuel Raguet, mailto:raguet@crf.canon.fr
12 *
13 *  Copyright (c) 2002 Advent Networks, Inc
14 *      Jay Monkman <jmonkman@adventnetworks.com>
15 *
16 *  Copyright (c) 2007 Ray xu <rayx.cn@gmail.com>
17 *
18 *  The license and distribution terms for this file may be
19 *  found in the file LICENSE in this distribution or at
20 *  http://www.rtems.com/license/LICENSE.
21 *
22 *  Moved from file 'cpukit/score/cpu/arm/cpu.c'.
23 *
24 *  $Id$
25 */
26
27#ifdef HAVE_CONFIG_H
28#include "config.h"
29#endif
30
31#include <rtems/system.h>
32#include <rtems.h>
33#include <rtems/bspIo.h>
34#include <rtems/score/isr.h>
35#include <rtems/score/wkspace.h>
36#include <rtems/score/thread.h>
37#include <rtems/score/cpu.h>
38
39#ifdef ARM_MULTILIB_ARCH_V4
40
41static void _defaultExcHandler (CPU_Exception_frame *ctx)
42{
43    printk("\n\r");
44    printk("----------------------------------------------------------\n\r");
45#if 1
46    printk("Exception 0x%x caught at PC 0x%x by thread %d\n",
47           ctx->register_ip, ctx->register_lr - 4,
48           _Thread_Executing->Object.id);
49#endif
50    printk("----------------------------------------------------------\n\r");
51    printk("Processor execution context at time of the fault was  :\n\r");
52    printk("----------------------------------------------------------\n\r");
53#if 0
54    printk(" r0  = %8x  r1  = %8x  r2  = %8x  r3  = %8x\n\r",
55           ctx->register_r0, ctx->register_r1,
56           ctx->register_r2, ctx->register_r3);
57    printk(" r4  = %8x  r5  = %8x  r6  = %8x  r7  = %8x\n\r",
58           ctx->register_r4, ctx->register_r5,
59           ctx->register_r6, ctx->register_r7);
60    printk(" r8  = %8x  r9  = %8x  r10 = %8x\n\r",
61           ctx->register_r8, ctx->register_r9, ctx->register_r10);
62    printk(" fp  = %8x  ip  = %8x  sp  = %8x  pc  = %8x\n\r",
63           ctx->register_fp, ctx->register_ip,
64           ctx->register_sp, ctx->register_lr - 4);
65    printk("----------------------------------------------------------\n\r");
66#endif
67    if (_ISR_Nest_level > 0) {
68        /*
69         * In this case we shall not delete the task interrupted as
70         * it has nothing to do with the fault. We cannot return either
71         * because the eip points to the faulty instruction so...
72         */
73        printk("Exception while executing ISR!!!. System locked\n\r");
74        while(1);
75    }
76    else {
77        printk("*********** FAULTY THREAD WILL BE DELETED **************\n\r");
78        rtems_task_delete(_Thread_Executing->Object.id);
79    }
80}
81
82typedef void (*cpuExcHandlerType) (CPU_Exception_frame*);
83
84cpuExcHandlerType _currentExcHandler = _defaultExcHandler;
85
86extern void _Exception_Handler_Undef_Swi(void);
87extern void _Exception_Handler_Abort(void);
88extern void _exc_data_abort(void);
89
90
91
92/* FIXME: put comments here */
93void rtems_exception_init_mngt(void)
94{
95        ISR_Level level;
96
97      _CPU_ISR_Disable(level);
98      _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF,
99                              _Exception_Handler_Undef_Swi,
100                              NULL);
101
102      _CPU_ISR_install_vector(ARM_EXCEPTION_SWI,
103                              _Exception_Handler_Undef_Swi,
104                              NULL);
105
106      _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT,
107                              _Exception_Handler_Abort,
108                              NULL);
109
110      _CPU_ISR_install_vector(ARM_EXCEPTION_DATA_ABORT,
111                              _exc_data_abort,
112                              NULL);
113
114      _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ,
115                              _Exception_Handler_Abort,
116                              NULL);
117
118      _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ,
119                              _Exception_Handler_Abort,
120                              NULL);
121
122      _CPU_ISR_Enable(level);
123}
124
125#endif /* ARM_MULTILIB_ARCH_V4 */
Note: See TracBrowser for help on using the repository browser.