source: rtems/cpukit/score/cpu/arm/arm_exc_handler_high.c @ 75fc27ad

5
Last change on this file since 75fc27ad was 75fc27ad, checked in by Sebastian Huber <sebastian.huber@…>, on 07/26/16 at 05:54:05

score: Fix printk() format specifiers
  • Property mode set to 100644
File size: 3.9 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup ScoreCPU
5 *
6 * @brief ARM exception support implementation.
7 */
8
9/*
10 *  COPYRIGHT (c) 2000 Canon Research Centre France SA.
11 *  Emmanuel Raguet, mailto:raguet@crf.canon.fr
12 *
13 *  Copyright (c) 2002 Advent Networks, Inc
14 *      Jay Monkman <jmonkman@adventnetworks.com>
15 *
16 *  Copyright (c) 2007 Ray xu <rayx.cn@gmail.com>
17 *
18 *  The license and distribution terms for this file may be
19 *  found in the file LICENSE in this distribution or at
20 *  http://www.rtems.org/license/LICENSE.
21 *
22 *  Moved from file 'cpukit/score/cpu/arm/cpu.c'.
23 */
24
25#ifdef HAVE_CONFIG_H
26#include "config.h"
27#endif
28
29#include <rtems/system.h>
30#include <rtems.h>
31#include <rtems/bspIo.h>
32#include <rtems/score/isr.h>
33#include <rtems/score/wkspace.h>
34#include <rtems/score/thread.h>
35#include <rtems/score/percpu.h>
36#include <rtems/score/cpu.h>
37
38#include <inttypes.h>
39
40#ifdef ARM_MULTILIB_ARCH_V4
41
42static void _defaultExcHandler (CPU_Exception_frame *ctx)
43{
44    printk("\n\r");
45    printk("----------------------------------------------------------\n\r");
46#if 1
47    printk("Exception 0x%x caught at PC 0x%" PRIxPTR
48           " by thread 0x%" PRIx32 "\n",
49           ctx->vector, (uintptr_t) ctx->register_lr - 4,
50           _Thread_Executing->Object.id);
51#endif
52    printk("----------------------------------------------------------\n\r");
53    printk("Processor execution context at time of the fault was  :\n\r");
54    printk("----------------------------------------------------------\n\r");
55#if 0
56    printk(" r0  = %8x  r1  = %8x  r2  = %8x  r3  = %8x\n\r",
57           ctx->register_r0, ctx->register_r1,
58           ctx->register_r2, ctx->register_r3);
59    printk(" r4  = %8x  r5  = %8x  r6  = %8x  r7  = %8x\n\r",
60           ctx->register_r4, ctx->register_r5,
61           ctx->register_r6, ctx->register_r7);
62    printk(" r8  = %8x  r9  = %8x  r10 = %8x\n\r",
63           ctx->register_r8, ctx->register_r9, ctx->register_r10);
64    printk(" fp  = %8x  ip  = %8x  sp  = %8x  pc  = %8x\n\r",
65           ctx->register_fp, ctx->register_ip,
66           ctx->register_sp, ctx->register_lr - 4);
67    printk("----------------------------------------------------------\n\r");
68#endif
69    if (_ISR_Nest_level > 0) {
70        /*
71         * In this case we shall not delete the task interrupted as
72         * it has nothing to do with the fault. We cannot return either
73         * because the eip points to the faulty instruction so...
74         */
75        printk("Exception while executing ISR!!!. System locked\n\r");
76        while(1);
77    }
78    else {
79        printk("*********** FAULTY THREAD WILL BE DELETED **************\n\r");
80        rtems_task_delete(_Thread_Executing->Object.id);
81    }
82}
83
84typedef void (*cpuExcHandlerType) (CPU_Exception_frame*);
85
86cpuExcHandlerType _currentExcHandler = _defaultExcHandler;
87
88extern void _Exception_Handler_Undef_Swi(void);
89extern void _Exception_Handler_Abort(void);
90extern void _exc_data_abort(void);
91
92
93
94/* FIXME: put comments here */
95void rtems_exception_init_mngt(void)
96{
97        ISR_Level level;
98
99      _CPU_ISR_Disable(level);
100      _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF,
101                              _Exception_Handler_Undef_Swi,
102                              NULL);
103
104      _CPU_ISR_install_vector(ARM_EXCEPTION_SWI,
105                              _Exception_Handler_Undef_Swi,
106                              NULL);
107
108      _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT,
109                              _Exception_Handler_Abort,
110                              NULL);
111
112      _CPU_ISR_install_vector(ARM_EXCEPTION_DATA_ABORT,
113                              _exc_data_abort,
114                              NULL);
115
116      _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ,
117                              _Exception_Handler_Abort,
118                              NULL);
119
120      _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ,
121                              _Exception_Handler_Abort,
122                              NULL);
123
124      _CPU_ISR_Enable(level);
125}
126
127#endif /* ARM_MULTILIB_ARCH_V4 */
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