[9364cf66] | 1 | /** |
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| 2 | * @file |
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| 3 | * |
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[78623bce] | 4 | * @ingroup ScoreCPU |
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| 5 | * |
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| 6 | * @brief ARM exception support implementation. |
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[9364cf66] | 7 | */ |
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| 8 | |
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| 9 | /* |
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| 10 | * COPYRIGHT (c) 2000 Canon Research Centre France SA. |
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| 11 | * Emmanuel Raguet, mailto:raguet@crf.canon.fr |
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| 12 | * |
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| 13 | * Copyright (c) 2002 Advent Networks, Inc |
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| 14 | * Jay Monkman <jmonkman@adventnetworks.com> |
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| 15 | * |
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| 16 | * Copyright (c) 2007 Ray xu <rayx.cn@gmail.com> |
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| 17 | * |
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| 18 | * The license and distribution terms for this file may be |
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| 19 | * found in the file LICENSE in this distribution or at |
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| 20 | * http://www.rtems.com/license/LICENSE. |
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| 21 | * |
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| 22 | * Moved from file 'cpukit/score/cpu/arm/cpu.c'. |
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| 23 | * |
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| 24 | * $Id$ |
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| 25 | */ |
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| 26 | |
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[0acc9af3] | 27 | #ifdef HAVE_CONFIG_H |
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| 28 | #include "config.h" |
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| 29 | #endif |
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| 30 | |
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[9364cf66] | 31 | #include <rtems/system.h> |
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| 32 | #include <rtems.h> |
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| 33 | #include <rtems/bspIo.h> |
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| 34 | #include <rtems/score/isr.h> |
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| 35 | #include <rtems/score/wkspace.h> |
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| 36 | #include <rtems/score/thread.h> |
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| 37 | #include <rtems/score/cpu.h> |
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| 38 | |
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| 39 | static void _defaultExcHandler (CPU_Exception_frame *ctx) |
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| 40 | { |
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| 41 | printk("\n\r"); |
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| 42 | printk("----------------------------------------------------------\n\r"); |
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| 43 | #if 1 |
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| 44 | printk("Exception 0x%x caught at PC 0x%x by thread %d\n", |
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| 45 | ctx->register_ip, ctx->register_lr - 4, |
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| 46 | _Thread_Executing->Object.id); |
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| 47 | #endif |
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| 48 | printk("----------------------------------------------------------\n\r"); |
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| 49 | printk("Processor execution context at time of the fault was :\n\r"); |
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| 50 | printk("----------------------------------------------------------\n\r"); |
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| 51 | #if 0 |
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| 52 | printk(" r0 = %8x r1 = %8x r2 = %8x r3 = %8x\n\r", |
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[5bb38e15] | 53 | ctx->register_r0, ctx->register_r1, |
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[9364cf66] | 54 | ctx->register_r2, ctx->register_r3); |
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| 55 | printk(" r4 = %8x r5 = %8x r6 = %8x r7 = %8x\n\r", |
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[5bb38e15] | 56 | ctx->register_r4, ctx->register_r5, |
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[9364cf66] | 57 | ctx->register_r6, ctx->register_r7); |
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| 58 | printk(" r8 = %8x r9 = %8x r10 = %8x\n\r", |
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| 59 | ctx->register_r8, ctx->register_r9, ctx->register_r10); |
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| 60 | printk(" fp = %8x ip = %8x sp = %8x pc = %8x\n\r", |
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[5bb38e15] | 61 | ctx->register_fp, ctx->register_ip, |
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[9364cf66] | 62 | ctx->register_sp, ctx->register_lr - 4); |
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| 63 | printk("----------------------------------------------------------\n\r"); |
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[5bb38e15] | 64 | #endif |
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[9364cf66] | 65 | if (_ISR_Nest_level > 0) { |
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| 66 | /* |
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| 67 | * In this case we shall not delete the task interrupted as |
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| 68 | * it has nothing to do with the fault. We cannot return either |
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| 69 | * because the eip points to the faulty instruction so... |
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| 70 | */ |
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| 71 | printk("Exception while executing ISR!!!. System locked\n\r"); |
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| 72 | while(1); |
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| 73 | } |
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| 74 | else { |
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| 75 | printk("*********** FAULTY THREAD WILL BE DELETED **************\n\r"); |
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| 76 | rtems_task_delete(_Thread_Executing->Object.id); |
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| 77 | } |
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| 78 | } |
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| 79 | |
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| 80 | typedef void (*cpuExcHandlerType) (CPU_Exception_frame*); |
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| 81 | |
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| 82 | cpuExcHandlerType _currentExcHandler = _defaultExcHandler; |
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| 83 | |
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[5bb38e15] | 84 | extern void _Exception_Handler_Undef_Swi(void); |
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| 85 | extern void _Exception_Handler_Abort(void); |
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| 86 | extern void _exc_data_abort(void); |
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[9364cf66] | 87 | |
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| 88 | |
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| 89 | |
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| 90 | /* FIXME: put comments here */ |
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| 91 | void rtems_exception_init_mngt(void) |
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| 92 | { |
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| 93 | ISR_Level level; |
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[5bb38e15] | 94 | |
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[9364cf66] | 95 | _CPU_ISR_Disable(level); |
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| 96 | _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF, |
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| 97 | _Exception_Handler_Undef_Swi, |
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| 98 | NULL); |
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[5bb38e15] | 99 | |
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[9364cf66] | 100 | _CPU_ISR_install_vector(ARM_EXCEPTION_SWI, |
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| 101 | _Exception_Handler_Undef_Swi, |
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| 102 | NULL); |
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[5bb38e15] | 103 | |
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[9364cf66] | 104 | _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT, |
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| 105 | _Exception_Handler_Abort, |
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| 106 | NULL); |
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[5bb38e15] | 107 | |
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[9364cf66] | 108 | _CPU_ISR_install_vector(ARM_EXCEPTION_DATA_ABORT, |
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| 109 | _exc_data_abort, |
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| 110 | NULL); |
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[5bb38e15] | 111 | |
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| 112 | _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, |
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[9364cf66] | 113 | _Exception_Handler_Abort, |
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| 114 | NULL); |
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[5bb38e15] | 115 | |
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| 116 | _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, |
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[9364cf66] | 117 | _Exception_Handler_Abort, |
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| 118 | NULL); |
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[5bb38e15] | 119 | |
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[9364cf66] | 120 | _CPU_ISR_Enable(level); |
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| 121 | } |
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