source: rtems/cpukit/score/cpu/arm/arm-exception-frame-print.c @ d9bd5cd6

4.115
Last change on this file since d9bd5cd6 was cfd8d7a, checked in by Sebastian Huber <sebastian.huber@…>, on 05/08/13 at 07:30:31

arm: Support VFP-D32 and Neon

  • Property mode set to 100644
File size: 2.0 KB
Line 
1/*
2 * Copyright (c) 2012-2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Obere Lagerstr. 30
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.com/license/LICENSE.
13 */
14
15#ifdef HAVE_CONFIG_H
16  #include "config.h"
17#endif
18
19#include <rtems/score/cpu.h>
20#include <rtems/bspIo.h>
21
22static void _ARM_VFP_context_print( const ARM_VFP_context *vfp_context )
23{
24#ifdef ARM_MULTILIB_VFP_D32
25  if ( vfp_context != NULL ) {
26    const uint64_t *dx = &vfp_context->register_d0;
27    int i;
28
29    printk(
30      "FPEXC = 0x%08x\nFPSCR = 0x%08x\n",
31      vfp_context->register_fpexc,
32      vfp_context->register_fpscr
33    );
34
35    for ( i = 0; i < 32; ++i ) {
36      uint32_t low = (uint32_t) dx[i];
37      uint32_t high = (uint32_t) (dx[i] >> 32);
38
39      printk( "D%02i = 0x%08x%08x\n", i, high, low );
40    }
41  }
42#endif
43}
44
45void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
46{
47  printk(
48    "\n"
49    "R0   = 0x%08x R8  = 0x%08x\n"
50    "R1   = 0x%08x R9  = 0x%08x\n"
51    "R2   = 0x%08x R10 = 0x%08x\n"
52    "R3   = 0x%08x R11 = 0x%08x\n"
53    "R4   = 0x%08x R12 = 0x%08x\n"
54    "R5   = 0x%08x SP  = 0x%08x\n"
55    "R6   = 0x%08x LR  = 0x%08x\n"
56    "R7   = 0x%08x PC  = 0x%08x\n"
57#if defined(ARM_MULTILIB_ARCH_V4)
58    "CPSR = 0x%08x VEC = 0x%08x\n",
59#elif defined(ARM_MULTILIB_ARCH_V7M)
60    "XPSR = 0x%08x VEC = 0x%08x\n",
61#endif
62    frame->register_r0,
63    frame->register_r1,
64    frame->register_r2,
65    frame->register_r3,
66    frame->register_r4,
67    frame->register_r5,
68    frame->register_r6,
69    frame->register_r7,
70    frame->register_r8,
71    frame->register_r9,
72    frame->register_r10,
73    frame->register_r11,
74    frame->register_r12,
75    frame->register_sp,
76    frame->register_lr,
77    frame->register_pc,
78#if defined(ARM_MULTILIB_ARCH_V4)
79    frame->register_cpsr,
80#elif defined(ARM_MULTILIB_ARCH_V7M)
81    frame->register_xpsr,
82#endif
83    frame->vector
84  );
85
86  _ARM_VFP_context_print( frame->vfp_context );
87}
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