source: rtems/cpukit/score/cpu/arm/arm-exception-frame-print.c @ 23213135

5
Last change on this file since 23213135 was 23213135, checked in by Chris Johns <chrisj@…>, on May 31, 2016 at 7:36:52 AM

arm: Fix printk warnings.

  • Property mode set to 100644
File size: 2.3 KB
Line 
1/*
2 * Copyright (c) 2012-2013 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Obere Lagerstr. 30
6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#ifdef HAVE_CONFIG_H
16  #include "config.h"
17#endif
18
19#include <inttypes.h>
20
21#include <rtems/score/cpu.h>
22#include <rtems/bspIo.h>
23
24static void _ARM_VFP_context_print( const ARM_VFP_context *vfp_context )
25{
26#ifdef ARM_MULTILIB_VFP_D32
27  if ( vfp_context != NULL ) {
28    const uint64_t *dx = &vfp_context->register_d0;
29    int i;
30
31    printk(
32      "FPEXC = 0x%08" PRIx32 "\nFPSCR = 0x%08" PRIx32 "\n",
33      vfp_context->register_fpexc,
34      vfp_context->register_fpscr
35    );
36
37    for ( i = 0; i < 32; ++i ) {
38      uint32_t low = (uint32_t) dx[i];
39      uint32_t high = (uint32_t) (dx[i] >> 32);
40
41      printk( "D%02i = 0x%08" PRIx32 "%08" PRIx32 "\n", i, high, low );
42    }
43  }
44#endif
45}
46
47void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
48{
49  printk(
50    "\n"
51    "R0   = 0x%08" PRIx32 " R8  = 0x%08" PRIx32 "\n"
52    "R1   = 0x%08" PRIx32 " R9  = 0x%08" PRIx32 "\n"
53    "R2   = 0x%08" PRIx32 " R10 = 0x%08" PRIx32 "\n"
54    "R3   = 0x%08" PRIx32 " R11 = 0x%08" PRIx32 "\n"
55    "R4   = 0x%08" PRIx32 " R12 = 0x%08" PRIx32 "\n"
56    "R5   = 0x%08" PRIx32 " SP  = 0x%08" PRIx32 "\n"
57    "R6   = 0x%08" PRIx32 " LR  = 0x%08" PRIxPTR "\n"
58    "R7   = 0x%08" PRIx32 " PC  = 0x%08" PRIxPTR "\n"
59#if defined(ARM_MULTILIB_ARCH_V4)
60    "CPSR = 0x%08" PRIx32 " "
61#elif defined(ARM_MULTILIB_ARCH_V7M)
62    "XPSR = 0x%08" PRIx32 " "
63#endif
64    "VEC = 0x%08" PRIxPTR "\n",
65    frame->register_r0,
66    frame->register_r8,
67    frame->register_r1,
68    frame->register_r9,
69    frame->register_r2,
70    frame->register_r10,
71    frame->register_r3,
72    frame->register_r11,
73    frame->register_r4,
74    frame->register_r12,
75    frame->register_r5,
76    frame->register_sp,
77    frame->register_r6,
78    (intptr_t) frame->register_lr,
79    frame->register_r7,
80    (intptr_t) frame->register_pc,
81#if defined(ARM_MULTILIB_ARCH_V4)
82    frame->register_cpsr,
83#elif defined(ARM_MULTILIB_ARCH_V7M)
84    frame->register_xpsr,
85#endif
86    (intptr_t) frame->vector
87  );
88
89  _ARM_VFP_context_print( frame->vfp_context );
90}
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