[815994f] | 1 | /* |
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[2f28a03] | 2 | * Copyright (c) 2012-2013 embedded brains GmbH. All rights reserved. |
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[815994f] | 3 | * |
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| 4 | * embedded brains GmbH |
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| 5 | * Obere Lagerstr. 30 |
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| 6 | * 82178 Puchheim |
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| 7 | * Germany |
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| 8 | * <rtems@embedded-brains.de> |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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| 12 | * http://www.rtems.com/license/LICENSE. |
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| 13 | */ |
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| 14 | |
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| 15 | #ifdef HAVE_CONFIG_H |
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| 16 | #include "config.h" |
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| 17 | #endif |
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| 18 | |
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| 19 | #include <rtems/score/cpu.h> |
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[2f28a03] | 20 | #include <rtems/bspIo.h> |
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[815994f] | 21 | |
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[cfd8d7a] | 22 | static void _ARM_VFP_context_print( const ARM_VFP_context *vfp_context ) |
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| 23 | { |
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| 24 | #ifdef ARM_MULTILIB_VFP_D32 |
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| 25 | if ( vfp_context != NULL ) { |
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| 26 | const uint64_t *dx = &vfp_context->register_d0; |
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| 27 | int i; |
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| 28 | |
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| 29 | printk( |
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| 30 | "FPEXC = 0x%08x\nFPSCR = 0x%08x\n", |
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| 31 | vfp_context->register_fpexc, |
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| 32 | vfp_context->register_fpscr |
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| 33 | ); |
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| 34 | |
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| 35 | for ( i = 0; i < 32; ++i ) { |
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| 36 | uint32_t low = (uint32_t) dx[i]; |
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| 37 | uint32_t high = (uint32_t) (dx[i] >> 32); |
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| 38 | |
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| 39 | printk( "D%02i = 0x%08x%08x\n", i, high, low ); |
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| 40 | } |
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| 41 | } |
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| 42 | #endif |
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| 43 | } |
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| 44 | |
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[815994f] | 45 | void _CPU_Exception_frame_print( const CPU_Exception_frame *frame ) |
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| 46 | { |
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[2f28a03] | 47 | printk( |
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| 48 | "\n" |
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| 49 | "R0 = 0x%08x R8 = 0x%08x\n" |
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| 50 | "R1 = 0x%08x R9 = 0x%08x\n" |
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| 51 | "R2 = 0x%08x R10 = 0x%08x\n" |
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| 52 | "R3 = 0x%08x R11 = 0x%08x\n" |
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| 53 | "R4 = 0x%08x R12 = 0x%08x\n" |
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| 54 | "R5 = 0x%08x SP = 0x%08x\n" |
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| 55 | "R6 = 0x%08x LR = 0x%08x\n" |
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| 56 | "R7 = 0x%08x PC = 0x%08x\n" |
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| 57 | #if defined(ARM_MULTILIB_ARCH_V4) |
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| 58 | "CPSR = 0x%08x VEC = 0x%08x\n", |
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| 59 | #elif defined(ARM_MULTILIB_ARCH_V7M) |
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| 60 | "XPSR = 0x%08x VEC = 0x%08x\n", |
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| 61 | #endif |
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| 62 | frame->register_r0, |
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| 63 | frame->register_r1, |
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| 64 | frame->register_r2, |
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| 65 | frame->register_r3, |
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| 66 | frame->register_r4, |
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| 67 | frame->register_r5, |
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| 68 | frame->register_r6, |
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| 69 | frame->register_r7, |
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| 70 | frame->register_r8, |
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| 71 | frame->register_r9, |
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| 72 | frame->register_r10, |
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| 73 | frame->register_r11, |
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| 74 | frame->register_r12, |
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| 75 | frame->register_sp, |
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| 76 | frame->register_lr, |
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| 77 | frame->register_pc, |
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| 78 | #if defined(ARM_MULTILIB_ARCH_V4) |
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| 79 | frame->register_cpsr, |
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| 80 | #elif defined(ARM_MULTILIB_ARCH_V7M) |
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| 81 | frame->register_xpsr, |
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| 82 | #endif |
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| 83 | frame->vector |
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| 84 | ); |
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[cfd8d7a] | 85 | |
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| 86 | _ARM_VFP_context_print( frame->vfp_context ); |
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[815994f] | 87 | } |
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