source: rtems/cpukit/score/cpu/arm/arm-context-volatile-clobber.S

Last change on this file was bcef89f2, checked in by Sebastian Huber <sebastian.huber@…>, on 05/19/23 at 06:18:25

Update company name

The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.

  • Property mode set to 100644
File size: 2.7 KB
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1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/*
4 * Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27
28#ifdef HAVE_CONFIG_H
29#include "config.h"
30#endif
31
32#include <rtems/asm.h>
33
34        .section        .text
35
36#ifdef __thumb__
37FUNCTION_THUMB_ENTRY(_CPU_Context_volatile_clobber)
38#else
39FUNCTION_ENTRY(_CPU_Context_volatile_clobber)
40#endif
41
42.macro clobber_register reg
43        sub     r0, r0, #1
44        mov     \reg, r0
45.endm
46
47#ifdef ARM_MULTILIB_VFP
48        vmrs    r1, FPSCR
49        ldr     r2, =0xf000001f
50        bic     r1, r1, r2
51        and     r2, r2, r0
52        orr     r1, r1, r2
53        vmsr    FPSCR, r1
54
55.macro clobber_vfp_register reg
56        sub     r0, r0, #1
57        vmov    \reg, r0, r0
58.endm
59
60        clobber_vfp_register    d0
61        clobber_vfp_register    d1
62        clobber_vfp_register    d2
63        clobber_vfp_register    d3
64        clobber_vfp_register    d4
65        clobber_vfp_register    d5
66        clobber_vfp_register    d6
67        clobber_vfp_register    d7
68#ifdef ARM_MULTILIB_VFP_D32
69        clobber_vfp_register    d16
70        clobber_vfp_register    d17
71        clobber_vfp_register    d18
72        clobber_vfp_register    d19
73        clobber_vfp_register    d20
74        clobber_vfp_register    d21
75        clobber_vfp_register    d22
76        clobber_vfp_register    d23
77        clobber_vfp_register    d24
78        clobber_vfp_register    d25
79        clobber_vfp_register    d26
80        clobber_vfp_register    d27
81        clobber_vfp_register    d28
82        clobber_vfp_register    d29
83        clobber_vfp_register    d30
84        clobber_vfp_register    d31
85#endif /* ARM_MULTILIB_VFP_D32 */
86#endif /* ARM_MULTILIB_VFP */
87
88        clobber_register        r1
89        clobber_register        r2
90        clobber_register        r3
91        clobber_register        r12
92
93        bx      lr
94
95FUNCTION_END(_CPU_Context_volatile_clobber)
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