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arm-context-validate.S @ c499856

4.115

Last change on this file since c499856 was c499856, checked in by Chris Johns <chrisj@…>, on 03/20/14 at 21:10:47
Change all references of rtems.com to rtems.org.
Property mode set to `100644`
File size: 5.5 KB

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1	/*
2	* Copyright (c) 2013 embedded brains GmbH. All rights reserved.
3	*
4	* embedded brains GmbH
5	* Dornierstr. 4
6	* 82178 Puchheim
7	* Germany
8	* <rtems@embedded-brains.de>
9	*
10	* The license and distribution terms for this file may be
11	* found in the file LICENSE in this distribution or at
12	* http://www.rtems.org/license/LICENSE.
13	*/
14
15	#ifdef HAVE_CONFIG_H
16	#include "config.h"
17	#endif
18
19	#include <rtems/asm.h>
20	#include <rtems/score/cpu.h>
21
22	#define FRAME_OFFSET_R4 0
23	#define FRAME_OFFSET_R5 4
24	#define FRAME_OFFSET_R6 8
25	#define FRAME_OFFSET_R7 12
26	#define FRAME_OFFSET_R8 16
27	#define FRAME_OFFSET_R9 20
28	#define FRAME_OFFSET_R10 24
29	#define FRAME_OFFSET_R11 28
30	#define FRAME_OFFSET_LR 32
31
32	#ifdef ARM_MULTILIB_VFP_D32
33	#define FRAME_OFFSET_D8 40
34	#define FRAME_OFFSET_D9 48
35	#define FRAME_OFFSET_D10 56
36	#define FRAME_OFFSET_D11 64
37	#define FRAME_OFFSET_D12 72
38	#define FRAME_OFFSET_D13 80
39	#define FRAME_OFFSET_D14 88
40	#define FRAME_OFFSET_D15 96
41
42	#define FRAME_SIZE (FRAME_OFFSET_D15 + 8)
43	#else
44	#define FRAME_SIZE (FRAME_OFFSET_LR + 4)
45	#endif
46
47	.section .text
48
49	FUNCTION_THUMB_ENTRY(_CPU_Context_validate)
50
51	/* Save */
52
53	sub sp, sp, #FRAME_SIZE
54
55	mov r1, r4
56	str r1, [sp, #FRAME_OFFSET_R4]
57	mov r1, r5
58	str r1, [sp, #FRAME_OFFSET_R5]
59	mov r1, r6
60	str r1, [sp, #FRAME_OFFSET_R6]
61	mov r1, r7
62	str r1, [sp, #FRAME_OFFSET_R7]
63	mov r1, r8
64	str r1, [sp, #FRAME_OFFSET_R8]
65	mov r1, r9
66	str r1, [sp, #FRAME_OFFSET_R9]
67	mov r1, r10
68	str r1, [sp, #FRAME_OFFSET_R10]
69	mov r1, r11
70	str r1, [sp, #FRAME_OFFSET_R11]
71	mov r1, lr
72	str r1, [sp, #FRAME_OFFSET_LR]
73
74	#ifdef ARM_MULTILIB_VFP_D32
75	vstr d8, [sp, #FRAME_OFFSET_D8]
76	vstr d9, [sp, #FRAME_OFFSET_D9]
77	vstr d10, [sp, #FRAME_OFFSET_D10]
78	vstr d11, [sp, #FRAME_OFFSET_D11]
79	vstr d12, [sp, #FRAME_OFFSET_D12]
80	vstr d13, [sp, #FRAME_OFFSET_D13]
81	vstr d14, [sp, #FRAME_OFFSET_D14]
82	vstr d15, [sp, #FRAME_OFFSET_D15]
83	#endif
84
85	/* Fill */
86
87	/* R1 is used for temporary values */
88	mov r1, r0
89
90	/* R2 contains the stack pointer */
91	mov r2, sp
92
93	.macro fill_register reg
94	add r1, r1, #1
95	mov \reg, r1
96	.endm
97
98
99	#ifdef ARM_MULTILIB_VFP_D32
100	/* R3 contains the FPSCR */
101	vmrs r3, FPSCR
102	movs r4, #0x001f
103	movt r4, #0xf800
104	bic r3, r3, r4
105	and r4, r4, r0
106	orr r3, r3, r4
107	vmsr FPSCR, r3
108	#else
109	fill_register r3
110	#endif
111
112	fill_register r4
113	fill_register r5
114	fill_register r6
115	fill_register r7
116	fill_register r8
117	fill_register r9
118	fill_register r10
119	fill_register r11
120	fill_register r12
121	fill_register lr
122
123	#ifdef ARM_MULTILIB_VFP_D32
124	.macro fill_vfp_register reg
125	add r1, r1, #1
126	vmov \reg, r1, r1
127	.endm
128
129	fill_vfp_register d0
130	fill_vfp_register d1
131	fill_vfp_register d2
132	fill_vfp_register d3
133	fill_vfp_register d4
134	fill_vfp_register d5
135	fill_vfp_register d6
136	fill_vfp_register d7
137	fill_vfp_register d8
138	fill_vfp_register d9
139	fill_vfp_register d10
140	fill_vfp_register d11
141	fill_vfp_register d12
142	fill_vfp_register d13
143	fill_vfp_register d14
144	fill_vfp_register d15
145	fill_vfp_register d16
146	fill_vfp_register d17
147	fill_vfp_register d18
148	fill_vfp_register d19
149	fill_vfp_register d20
150	fill_vfp_register d21
151	fill_vfp_register d22
152	fill_vfp_register d23
153	fill_vfp_register d24
154	fill_vfp_register d25
155	fill_vfp_register d26
156	fill_vfp_register d27
157	fill_vfp_register d28
158	fill_vfp_register d29
159	fill_vfp_register d30
160	fill_vfp_register d31
161	#endif
162
163	/* Check */
164	check:
165
166	.macro check_register reg
167	add r1, r1, #1
168	cmp \reg, r1
169	bne restore
170	.endm
171
172	cmp r2, sp
173	bne restore
174
175	mov r1, r0
176
177	#ifndef ARM_MULTILIB_VFP_D32
178	check_register r3
179	#endif
180
181	check_register r4
182	check_register r5
183	check_register r6
184	check_register r7
185	check_register r8
186	check_register r9
187	check_register r10
188	check_register r11
189	check_register r12
190	check_register lr
191
192	#ifdef ARM_MULTILIB_VFP_D32
193	b check_vfp
194	#endif
195
196	b check
197
198	/* Restore */
199	restore:
200
201	ldr r1, [sp, #FRAME_OFFSET_R4]
202	mov r4, r1
203	ldr r1, [sp, #FRAME_OFFSET_R5]
204	mov r5, r1
205	ldr r1, [sp, #FRAME_OFFSET_R6]
206	mov r6, r1
207	ldr r1, [sp, #FRAME_OFFSET_R7]
208	mov r7, r1
209	ldr r1, [sp, #FRAME_OFFSET_R8]
210	mov r8, r1
211	ldr r1, [sp, #FRAME_OFFSET_R9]
212	mov r9, r1
213	ldr r1, [sp, #FRAME_OFFSET_R10]
214	mov r10, r1
215	ldr r1, [sp, #FRAME_OFFSET_R11]
216	mov r11, r1
217	ldr r1, [sp, #FRAME_OFFSET_LR]
218	mov lr, r1
219
220	#ifdef ARM_MULTILIB_VFP_D32
221	vldr d8, [sp, #FRAME_OFFSET_D8]
222	vldr d9, [sp, #FRAME_OFFSET_D9]
223	vldr d10, [sp, #FRAME_OFFSET_D10]
224	vldr d11, [sp, #FRAME_OFFSET_D11]
225	vldr d12, [sp, #FRAME_OFFSET_D12]
226	vldr d13, [sp, #FRAME_OFFSET_D13]
227	vldr d14, [sp, #FRAME_OFFSET_D14]
228	vldr d15, [sp, #FRAME_OFFSET_D15]
229	#endif
230
231	add sp, sp, #FRAME_SIZE
232
233	bx lr
234
235	FUNCTION_END(_CPU_Context_validate)
236
237	#ifdef ARM_MULTILIB_VFP_D32
238	check_vfp:
239
240	.macro check_vfp_register reg
241	add r1, r1, #1
242	vmov r4, r5, \reg
243	cmp r4, r5
244	bne 1f
245	cmp r1, r4
246	bne 1f
247	b 2f
248	1:
249	b restore
250	2:
251	.endm
252
253	vmrs r4, FPSCR
254	cmp r4, r3
255	bne restore
256
257	check_vfp_register d0
258	check_vfp_register d1
259	check_vfp_register d2
260	check_vfp_register d3
261	check_vfp_register d4
262	check_vfp_register d5
263	check_vfp_register d6
264	check_vfp_register d7
265	check_vfp_register d8
266	check_vfp_register d9
267	check_vfp_register d10
268	check_vfp_register d11
269	check_vfp_register d12
270	check_vfp_register d13
271	check_vfp_register d14
272	check_vfp_register d15
273	check_vfp_register d16
274	check_vfp_register d17
275	check_vfp_register d18
276	check_vfp_register d19
277	check_vfp_register d20
278	check_vfp_register d21
279	check_vfp_register d22
280	check_vfp_register d23
281	check_vfp_register d24
282	check_vfp_register d25
283	check_vfp_register d26
284	check_vfp_register d27
285	check_vfp_register d28
286	check_vfp_register d29
287	check_vfp_register d30
288	check_vfp_register d31
289
290	/* Restore r4 and r5 */
291	mov r1, r0
292	fill_register r4
293	fill_register r5
294
295	b check
296
297	#endif

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