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arm-context-validate.S @ 5cc276e

4.11

Last change on this file since 5cc276e was 5cc276e, checked in by Sebastian Huber <sebastian.huber@…>, on 03/09/17 at 13:32:04

arm: Fix CPU context validation for Cortex-R4

Do not touch the FPSCR[QC] bit since this is DNM/RAZ on Cortex-R4.

Close #3092.

Property mode set to 100644

File size: 5.6 KB

Line
1	/*
2	* Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved.
3	*
4	* embedded brains GmbH
5	* Dornierstr. 4
6	* 82178 Puchheim
7	* Germany
8	* <rtems@embedded-brains.de>
9	*
10	* The license and distribution terms for this file may be
11	* found in the file LICENSE in this distribution or at
12	* http://www.rtems.org/license/LICENSE.
13	*/
14
15	#ifdef HAVE_CONFIG_H
16	#include "config.h"
17	#endif
18
19	#include <rtems/asm.h>
20	#include <rtems/score/cpu.h>
21
22	#define FRAME_OFFSET_R4 0
23	#define FRAME_OFFSET_R5 4
24	#define FRAME_OFFSET_R6 8
25	#define FRAME_OFFSET_R7 12
26	#define FRAME_OFFSET_R8 16
27	#define FRAME_OFFSET_R9 20
28	#define FRAME_OFFSET_R10 24
29	#define FRAME_OFFSET_R11 28
30	#define FRAME_OFFSET_LR 32
31
32	#ifdef ARM_MULTILIB_VFP
33	#define FRAME_OFFSET_D8 40
34	#define FRAME_OFFSET_D9 48
35	#define FRAME_OFFSET_D10 56
36	#define FRAME_OFFSET_D11 64
37	#define FRAME_OFFSET_D12 72
38	#define FRAME_OFFSET_D13 80
39	#define FRAME_OFFSET_D14 88
40	#define FRAME_OFFSET_D15 96
41
42	#define FRAME_SIZE (FRAME_OFFSET_D15 + 8)
43	#else
44	#define FRAME_SIZE (FRAME_OFFSET_LR + 4)
45	#endif
46
47	.section .text
48
49	FUNCTION_THUMB_ENTRY(_CPU_Context_validate)
50
51	/* Save */
52
53	sub sp, sp, #FRAME_SIZE
54
55	mov r1, r4
56	str r1, [sp, #FRAME_OFFSET_R4]
57	mov r1, r5
58	str r1, [sp, #FRAME_OFFSET_R5]
59	mov r1, r6
60	str r1, [sp, #FRAME_OFFSET_R6]
61	mov r1, r7
62	str r1, [sp, #FRAME_OFFSET_R7]
63	mov r1, r8
64	str r1, [sp, #FRAME_OFFSET_R8]
65	mov r1, r9
66	str r1, [sp, #FRAME_OFFSET_R9]
67	mov r1, r10
68	str r1, [sp, #FRAME_OFFSET_R10]
69	mov r1, r11
70	str r1, [sp, #FRAME_OFFSET_R11]
71	mov r1, lr
72	str r1, [sp, #FRAME_OFFSET_LR]
73
74	#ifdef ARM_MULTILIB_VFP
75	vstr d8, [sp, #FRAME_OFFSET_D8]
76	vstr d9, [sp, #FRAME_OFFSET_D9]
77	vstr d10, [sp, #FRAME_OFFSET_D10]
78	vstr d11, [sp, #FRAME_OFFSET_D11]
79	vstr d12, [sp, #FRAME_OFFSET_D12]
80	vstr d13, [sp, #FRAME_OFFSET_D13]
81	vstr d14, [sp, #FRAME_OFFSET_D14]
82	vstr d15, [sp, #FRAME_OFFSET_D15]
83	#endif
84
85	/* Fill */
86
87	/* R1 is used for temporary values */
88	mov r1, r0
89
90	/* R2 contains the stack pointer */
91	mov r2, sp
92
93	.macro fill_register reg
94	add r1, r1, #1
95	mov \reg, r1
96	.endm
97
98
99	#ifdef ARM_MULTILIB_VFP
100	/* R3 contains the FPSCR */
101	vmrs r3, FPSCR
102	ldr r4, =0xf000001f
103	bic r3, r3, r4
104	and r4, r4, r0
105	orr r3, r3, r4
106	vmsr FPSCR, r3
107	#else
108	fill_register r3
109	#endif
110
111	fill_register r4
112	fill_register r5
113	fill_register r6
114	fill_register r7
115	fill_register r8
116	fill_register r9
117	fill_register r10
118	fill_register r11
119	fill_register r12
120	fill_register lr
121
122	#ifdef ARM_MULTILIB_VFP
123	.macro fill_vfp_register reg
124	add r1, r1, #1
125	vmov \reg, r1, r1
126	.endm
127
128	fill_vfp_register d0
129	fill_vfp_register d1
130	fill_vfp_register d2
131	fill_vfp_register d3
132	fill_vfp_register d4
133	fill_vfp_register d5
134	fill_vfp_register d6
135	fill_vfp_register d7
136	fill_vfp_register d8
137	fill_vfp_register d9
138	fill_vfp_register d10
139	fill_vfp_register d11
140	fill_vfp_register d12
141	fill_vfp_register d13
142	fill_vfp_register d14
143	fill_vfp_register d15
144	#ifdef ARM_MULTILIB_VFP_D32
145	fill_vfp_register d16
146	fill_vfp_register d17
147	fill_vfp_register d18
148	fill_vfp_register d19
149	fill_vfp_register d20
150	fill_vfp_register d21
151	fill_vfp_register d22
152	fill_vfp_register d23
153	fill_vfp_register d24
154	fill_vfp_register d25
155	fill_vfp_register d26
156	fill_vfp_register d27
157	fill_vfp_register d28
158	fill_vfp_register d29
159	fill_vfp_register d30
160	fill_vfp_register d31
161	#endif /* ARM_MULTILIB_VFP_D32 */
162	#endif /* ARM_MULTILIB_VFP */
163
164	/* Check */
165	check:
166
167	.macro check_register reg
168	add r1, r1, #1
169	cmp \reg, r1
170	bne restore
171	.endm
172
173	cmp r2, sp
174	bne restore
175
176	mov r1, r0
177
178	#ifndef ARM_MULTILIB_VFP
179	check_register r3
180	#endif
181
182	check_register r4
183	check_register r5
184	check_register r6
185	check_register r7
186	check_register r8
187	check_register r9
188	check_register r10
189	check_register r11
190	check_register r12
191	check_register lr
192
193	#ifdef ARM_MULTILIB_VFP
194	b check_vfp
195	#endif
196
197	b check
198
199	/* Restore */
200	restore:
201
202	ldr r1, [sp, #FRAME_OFFSET_R4]
203	mov r4, r1
204	ldr r1, [sp, #FRAME_OFFSET_R5]
205	mov r5, r1
206	ldr r1, [sp, #FRAME_OFFSET_R6]
207	mov r6, r1
208	ldr r1, [sp, #FRAME_OFFSET_R7]
209	mov r7, r1
210	ldr r1, [sp, #FRAME_OFFSET_R8]
211	mov r8, r1
212	ldr r1, [sp, #FRAME_OFFSET_R9]
213	mov r9, r1
214	ldr r1, [sp, #FRAME_OFFSET_R10]
215	mov r10, r1
216	ldr r1, [sp, #FRAME_OFFSET_R11]
217	mov r11, r1
218	ldr r1, [sp, #FRAME_OFFSET_LR]
219	mov lr, r1
220
221	#ifdef ARM_MULTILIB_VFP
222	vldr d8, [sp, #FRAME_OFFSET_D8]
223	vldr d9, [sp, #FRAME_OFFSET_D9]
224	vldr d10, [sp, #FRAME_OFFSET_D10]
225	vldr d11, [sp, #FRAME_OFFSET_D11]
226	vldr d12, [sp, #FRAME_OFFSET_D12]
227	vldr d13, [sp, #FRAME_OFFSET_D13]
228	vldr d14, [sp, #FRAME_OFFSET_D14]
229	vldr d15, [sp, #FRAME_OFFSET_D15]
230	#endif
231
232	add sp, sp, #FRAME_SIZE
233
234	bx lr
235
236	FUNCTION_END(_CPU_Context_validate)
237
238	#ifdef ARM_MULTILIB_VFP
239	check_vfp:
240
241	.macro check_vfp_register reg
242	add r1, r1, #1
243	vmov r4, r5, \reg
244	cmp r4, r5
245	bne 1f
246	cmp r1, r4
247	bne 1f
248	b 2f
249	1:
250	b restore
251	2:
252	.endm
253
254	vmrs r4, FPSCR
255	cmp r4, r3
256	bne restore
257
258	check_vfp_register d0
259	check_vfp_register d1
260	check_vfp_register d2
261	check_vfp_register d3
262	check_vfp_register d4
263	check_vfp_register d5
264	check_vfp_register d6
265	check_vfp_register d7
266	check_vfp_register d8
267	check_vfp_register d9
268	check_vfp_register d10
269	check_vfp_register d11
270	check_vfp_register d12
271	check_vfp_register d13
272	check_vfp_register d14
273	check_vfp_register d15
274	#ifdef ARM_MULTILIB_VFP_D32
275	check_vfp_register d16
276	check_vfp_register d17
277	check_vfp_register d18
278	check_vfp_register d19
279	check_vfp_register d20
280	check_vfp_register d21
281	check_vfp_register d22
282	check_vfp_register d23
283	check_vfp_register d24
284	check_vfp_register d25
285	check_vfp_register d26
286	check_vfp_register d27
287	check_vfp_register d28
288	check_vfp_register d29
289	check_vfp_register d30
290	check_vfp_register d31
291	#endif /* ARM_MULTILIB_VFP_D32 */
292
293	/* Restore r4 and r5 */
294	mov r1, r0
295	fill_register r4
296	fill_register r5
297
298	b check
299	#endif /* ARM_MULTILIB_VFP */

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