[0a645dad] | 1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
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| 2 | |
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[65f6d3c] | 3 | /** |
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| 4 | * @file |
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| 5 | * |
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[5cb175bb] | 6 | * @ingroup POSIXAPI |
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[cfe8f7a] | 7 | * |
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| 8 | * @brief System Generates Signal for process after realtime seconds elapsed |
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[65f6d3c] | 9 | */ |
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| 10 | |
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[07d880f4] | 11 | /* |
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| 12 | * 3.4.1 Schedule Alarm, P1003.1b-1993, p. 79 |
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[412dbff6] | 13 | */ |
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| 14 | |
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[967c1438] | 15 | /* COPYRIGHT (c) 1989-2013. |
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[07d880f4] | 16 | * On-Line Applications Research Corporation (OAR). |
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| 17 | * |
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[0a645dad] | 18 | * Redistribution and use in source and binary forms, with or without |
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| 19 | * modification, are permitted provided that the following conditions |
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| 20 | * are met: |
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| 21 | * 1. Redistributions of source code must retain the above copyright |
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| 22 | * notice, this list of conditions and the following disclaimer. |
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| 23 | * 2. Redistributions in binary form must reproduce the above copyright |
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| 24 | * notice, this list of conditions and the following disclaimer in the |
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| 25 | * documentation and/or other materials provided with the distribution. |
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| 26 | * |
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| 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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| 28 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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| 29 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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| 30 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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| 31 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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| 32 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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| 33 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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| 34 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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| 35 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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| 36 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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| 37 | * POSSIBILITY OF SUCH DAMAGE. |
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[07d880f4] | 38 | */ |
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| 39 | |
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[80cf60e] | 40 | #ifdef HAVE_CONFIG_H |
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[f42b726] | 41 | #include "config.h" |
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| 42 | #endif |
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[07d880f4] | 43 | |
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[5618c37a] | 44 | #include <unistd.h> |
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[03b900d] | 45 | #include <signal.h> |
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[07d880f4] | 46 | |
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[f031df0e] | 47 | #include <rtems/score/todimpl.h> |
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[5618c37a] | 48 | #include <rtems/score/watchdogimpl.h> |
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[07d880f4] | 49 | |
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[03b900d] | 50 | ISR_LOCK_DEFINE( static, _POSIX_signals_Alarm_lock, "POSIX Alarm" ) |
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| 51 | |
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| 52 | static void _POSIX_signals_Alarm_TSR( Watchdog_Control *the_watchdog ) |
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[b56c1a3] | 53 | { |
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[03b900d] | 54 | int status; |
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[967c1438] | 55 | |
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[03b900d] | 56 | status = kill( getpid(), SIGALRM ); |
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[967c1438] | 57 | |
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| 58 | #if defined(RTEMS_DEBUG) |
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| 59 | /* |
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| 60 | * There is no reason to think this might fail but we should be |
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| 61 | * cautious. |
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| 62 | */ |
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[0f01de2b] | 63 | _Assert(status == 0); |
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[03b900d] | 64 | #else |
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| 65 | (void) status; |
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[967c1438] | 66 | #endif |
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[b56c1a3] | 67 | } |
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| 68 | |
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[03b900d] | 69 | static Watchdog_Control _POSIX_signals_Alarm_watchdog = WATCHDOG_INITIALIZER( |
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| 70 | _POSIX_signals_Alarm_TSR |
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[e2005af6] | 71 | ); |
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| 72 | |
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[07d880f4] | 73 | unsigned int alarm( |
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| 74 | unsigned int seconds |
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| 75 | ) |
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| 76 | { |
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[03b900d] | 77 | unsigned int remaining; |
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| 78 | Watchdog_Control *the_watchdog; |
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| 79 | ISR_lock_Context lock_context; |
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| 80 | ISR_lock_Context lock_context2; |
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| 81 | Per_CPU_Control *cpu; |
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| 82 | uint64_t now; |
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| 83 | uint32_t ticks_per_second; |
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| 84 | uint32_t ticks; |
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| 85 | |
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| 86 | the_watchdog = &_POSIX_signals_Alarm_watchdog; |
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| 87 | ticks_per_second = TOD_TICKS_PER_SECOND; |
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| 88 | ticks = seconds * ticks_per_second; |
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| 89 | |
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| 90 | _ISR_lock_ISR_disable_and_acquire( |
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| 91 | &_POSIX_signals_Alarm_lock, |
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| 92 | &lock_context |
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| 93 | ); |
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| 94 | |
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| 95 | cpu = _Watchdog_Get_CPU( the_watchdog ); |
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| 96 | _Watchdog_Per_CPU_acquire_critical( cpu, &lock_context2 ); |
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| 97 | now = cpu->Watchdog.ticks; |
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| 98 | |
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| 99 | remaining = (unsigned long) _Watchdog_Cancel( |
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[9480815a] | 100 | &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ], |
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[03b900d] | 101 | the_watchdog, |
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| 102 | now |
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| 103 | ); |
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| 104 | |
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| 105 | if ( ticks != 0 ) { |
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| 106 | _Watchdog_Insert( |
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[9480815a] | 107 | &cpu->Watchdog.Header[ PER_CPU_WATCHDOG_TICKS ], |
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[03b900d] | 108 | the_watchdog, |
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| 109 | now + ticks |
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| 110 | ); |
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[07d880f4] | 111 | } |
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| 112 | |
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[03b900d] | 113 | _Watchdog_Per_CPU_release_critical( cpu, &lock_context2 ); |
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| 114 | _ISR_lock_Release_and_ISR_enable( |
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| 115 | &_POSIX_signals_Alarm_lock, |
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| 116 | &lock_context |
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| 117 | ); |
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[a9cc1beb] | 118 | |
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[03b900d] | 119 | return ( remaining + ticks_per_second - 1 ) / ticks_per_second; |
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[07d880f4] | 120 | } |
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