[a31845f7] | 1 | /* PCI IRQ Library |
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| 2 | * |
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[71e8a5c] | 3 | * COPYRIGHT (c) 2010 Cobham Gaisler AB. |
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[a31845f7] | 4 | * |
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| 5 | * The license and distribution terms for this file may be |
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| 6 | * found in the file LICENSE in this distribution or at |
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| 7 | * http://www.rtems.com/license/LICENSE. |
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| 8 | */ |
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| 9 | |
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[15620f5b] | 10 | /* IRQ handling does not have so much with PCI to do, this library depends |
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| 11 | * on the BSP to implement shared interrupts. |
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| 12 | */ |
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| 13 | |
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[a31845f7] | 14 | #ifndef __PCI_IRQ_H__ |
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| 15 | #define __PCI_IRQ_H__ |
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| 16 | |
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| 17 | #include <bsp.h> |
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[15620f5b] | 18 | #include <rtems/irq-extension.h> |
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| 19 | #include <rtems/score/basedefs.h> |
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[a31845f7] | 20 | |
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| 21 | /* PCI Handler (ISR) called when IRQ is generated by any of the PCI devices |
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[15620f5b] | 22 | * connected to the same PCI IRQ Pin. This has been defined the same way as |
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[a31845f7] | 23 | * rtems_interrupt_handler in order for BSPs to "direct-map" the register |
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| 24 | * and unregister functions rtems_interrupt_handler_install/remove |
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| 25 | */ |
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| 26 | typedef void (*pci_isr)(void *arg); |
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| 27 | |
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| 28 | /* Get assigned system IRQ to a PCI Device. If no IRQ 0 is returned */ |
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| 29 | extern int pci_dev_irq(pci_dev_t dev); |
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| 30 | |
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| 31 | /* Register shared PCI IRQ handler, but does not enable it. The system interrupt |
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| 32 | * number is read from the PCI board's PCI configuration space header iline |
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| 33 | * field. The iline field is initialized by the PCI subsystem during start up, |
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| 34 | * the ipin field is translated into a system IRQ and written to iline. The |
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| 35 | * board's driver should use the iline field as the irq argument to this |
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| 36 | * function. |
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| 37 | * |
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| 38 | * Arguments |
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| 39 | * irq System IRQ number, normally taken from the PCI configuration area |
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| 40 | * isr Function pointer to the ISR |
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| 41 | * arg Second argument to function isr |
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| 42 | */ |
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[15620f5b] | 43 | RTEMS_INLINE_ROUTINE int pci_interrupt_register(int irq, const char *info, |
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[a31845f7] | 44 | pci_isr isr, void *arg) |
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| 45 | { |
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| 46 | return BSP_PCI_shared_interrupt_register(irq, info, isr, arg); |
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| 47 | } |
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| 48 | |
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| 49 | /* Unregister previously registered shared PCI IRQ handler |
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| 50 | * |
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| 51 | * Arguments |
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| 52 | * irq System IRQ number, normally taken from the PCI configuration area |
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| 53 | * isr Function pointer to the ISR |
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| 54 | * arg Second argument to function isr |
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| 55 | */ |
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[15620f5b] | 56 | RTEMS_INLINE_ROUTINE int pci_interrupt_unregister(int irq, pci_isr isr, |
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| 57 | void *arg) |
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[a31845f7] | 58 | { |
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| 59 | return BSP_PCI_shared_interrupt_unregister(irq, isr, arg); |
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| 60 | } |
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| 61 | |
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| 62 | /* Enable shared PCI IRQ handler. This function will unmask the interrupt |
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| 63 | * controller and mark this interrupt handler ready to handle interrupts. Note |
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| 64 | * that since it is a shared interrupt handler service the interrupt may |
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| 65 | * already be enabled, however no calls to this specific handler is made |
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| 66 | * until it is enabled. |
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| 67 | * |
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| 68 | * Arguments |
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| 69 | * irq System IRQ number, normally taken from the PCI configuration area |
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| 70 | * isr Function pointer to the ISR |
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| 71 | * arg Second argument to function isr |
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| 72 | */ |
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[15620f5b] | 73 | RTEMS_INLINE_ROUTINE void pci_interrupt_unmask(int irq) |
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[a31845f7] | 74 | { |
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| 75 | BSP_PCI_shared_interrupt_unmask(irq); |
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| 76 | } |
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| 77 | |
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| 78 | /* Disable shared PCI IRQ handler. This function will mask the interrupt |
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| 79 | * controller and mark this interrupt handler not ready to receive interrupts. |
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| 80 | * Note that since it is a shared interrupt handler service the interrupt may |
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| 81 | * still be enabled, however no calls to this specific handler is made |
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| 82 | * while it is disabled. |
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| 83 | * |
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| 84 | * Arguments |
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| 85 | * irq System IRQ number, normally taken from the PCI configuration area |
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| 86 | * isr Function pointer to the ISR |
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| 87 | * arg Second argument to function isr |
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| 88 | */ |
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[15620f5b] | 89 | RTEMS_INLINE_ROUTINE void pci_interrupt_mask(int irq) |
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[a31845f7] | 90 | { |
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| 91 | BSP_PCI_shared_interrupt_mask(irq); |
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| 92 | } |
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| 93 | |
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| 94 | /* Acknowledge the interrupt controller by writing to the interrupt controller. |
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| 95 | * Note that since it is a shared interrupt handler service, clearing the |
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| 96 | * interrupt source may affect other ISRs registered to this IRQ. |
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| 97 | * |
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| 98 | * Arguments |
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| 99 | * irq System IRQ number, normally taken from the PCI configuration area |
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| 100 | * isr Function pointer to the ISR |
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| 101 | * arg Second argument to function isr |
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| 102 | */ |
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[15620f5b] | 103 | RTEMS_INLINE_ROUTINE void pci_interrupt_clear(int irq) |
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[a31845f7] | 104 | { |
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| 105 | BSP_PCI_shared_interrupt_clear(irq); |
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| 106 | } |
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| 107 | |
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| 108 | #endif /* !__PCI_IRQ_H__ */ |
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