source: rtems/cpukit/libpci/pci/cfg.h @ e53daed

4.11
Last change on this file since e53daed was e53daed, checked in by Daniel Hellstrom <daniel@…>, on Apr 9, 2015 at 2:09:42 PM

LIBPCI: updated license to rtems.org

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1/* PCI Configuration Library
2 *
3 * COPYRIGHT (c) 2010 Cobham Gaisler AB.
4 *
5 * The license and distribution terms for this file may be
6 * found in the file LICENSE in this distribution or at
7 * http://www.rtems.org/license/LICENSE.
8 */
9
10/* Four versions of the library exists:
11 *  - auto configuration (default)
12 *  - read configuration from PnP (inherit BIOS set up)
13 *  - static configuration (user defined config)
14 *  - peripheral configuration, no CFG space accesses are possible instead a
15 *    device tree known at compile-time have been built in.
16 * all versions are defined through here.
17 */
18
19#ifndef __PCI_CFG_H__
20#define __PCI_CFG_H__
21
22#include <pci.h>
23
24/* PCI Configuration library */
25
26/* Return the number of PCI buses in system */
27extern int pci_bus_count(void);
28
29/* PCI Address assigned to BARs which failed to fit into the PCI Window or
30 * is disabled by any other cause.
31 */
32extern uint32_t pci_invalid_address;
33
34/* PCI Configuration Library of the system */
35enum {
36        PCI_CONFIG_LIB_NONE = 0,
37        PCI_CONFIG_LIB_AUTO = 1,
38        PCI_CONFIG_LIB_STATIC = 2,
39        PCI_CONFIG_LIB_READ = 3,
40        PCI_CONFIG_LIB_PERIPHERAL = 4,
41};
42extern const int pci_config_lib_type;
43
44/* Configuration library function pointers, these are set in <rtems/confdefs.h>
45 * by project configuration or by the BSP. The configuration will pull in the
46 * PCI Library needed and the PCI initialization functions will call these
47 * functions on initialization from the host driver.
48 */
49extern int (*pci_config_lib_init)(void);
50extern void (*pci_config_lib_register)(void *config);
51
52/* Configure PCI devices and bridges, and setup the RAM data structures
53 * describing the PCI devices currently present in the system.
54 *
55 * Returns 0 on success, -1 on failure.
56 */
57extern int pci_config_init(void);
58
59/* Register a config-library specific configuration used by the libarary in
60 * pci_config_init().
61 */
62extern void pci_config_register(void *config);
63
64/* Print current PCI configuration (C-code) to terminal, can be used in
65 * static and peripheral PCI configuration library. The configuration is
66 * taken from the current configuration library setup.
67 */
68extern void pci_cfg_print(void);
69
70struct pci_bus; /* Bridge Device and secondary bus information */
71struct pci_dev; /* Device/function */
72struct pci_res; /* Resource: BAR, ROM or Bridge Window */
73
74/* The Host Bridge and all subdevices (the PCI RAM data structure) */
75extern struct pci_bus pci_hb;
76
77/* Arguments for pci_for_each_child() search option */
78#define SEARCH_CHILDREN 0       /* direct children of bus only  */
79#define SEARCH_DEPTH 1          /* all children of bus */
80
81/* Iterate over all PCI devices on a bus (see search options) and call func(),
82 * iteration is stopped if a non-zero value is returned by func().
83 *
84 * The function iterates over the PCI RAM data structure, it is not
85 * available until after all devices have been found and pci_hb is populated,
86 * typically after pci_config_init() is called.
87 *
88 * search options: 0 (no child buses), 1 (depth first, recursive)
89 *
90 * Return Values
91 *  0  All PCI devices were processed, func() returned 0 on every call
92 *  X  func() returned non-zero X value, the search was stopped
93 */
94extern int pci_for_each_child(
95        struct pci_bus *bus,
96        int (*func)(struct pci_dev *, void *arg),
97        void *arg,
98        int search);
99
100/* Depth first search of all PCI devices in PCI RAM data structure and call
101 * func(dev, arg), iteration is stopped if a non-zero value is returned by
102 * func().
103 *
104 * The function iterates over the PCI RAM data structure, it is not
105 * available until after all devices have been found and pci_hb is populated,
106 * typically after pci_config_init() is called.
107 *
108 * Return Values
109 *  0  All PCI devices were processed, func() returned 0 on every call
110 *  X  func() returned non-zero X value, the search was stopped
111 */
112extern int pci_for_each_dev(
113        int (*func)(struct pci_dev *, void *arg),
114        void *arg);
115
116/* Get PCI device from RAM device tree for a device matching PCI Vendor, Device
117 * and instance number 'index'.
118 *
119 * Return Values
120 * -1  pci_find_dev did not find a device matching the criterion.
121 *  0  device was found, *ppdev was updated with the PCI device address
122 */
123extern int pci_find_dev(uint16_t ven, uint16_t dev, int index,
124                        struct pci_dev **ppdev);
125
126/* Get PCI device from RAM device tree by BUS|SLOT|FUNC.
127 *
128 * Return Values
129 * -1  pci_get_dev did not find a device matching the criterion
130 *  0  device was found, *ppdev was updated with the PCI device address
131 */
132extern int pci_get_dev(pci_dev_t pcidev, struct pci_dev **ppdev);
133
134/* Resource flags */
135#define PCI_RES_IO 1
136#define PCI_RES_MEMIO 2
137#define PCI_RES_MEM_PREFETCH 1
138#define PCI_RES_MEM (PCI_RES_MEMIO | PCI_RES_MEM_PREFETCH)
139#define PCI_RES_TYPE_MASK 0x3
140#define PCI_RES_IO32 0x08
141#define PCI_RES_FAIL 0x10 /* Alloc Failed */
142
143/* BAR Resouces entry */
144struct pci_res {
145        struct pci_res  *next;
146        uint32_t        size;
147        uint32_t        boundary;
148        unsigned char   flags; /* I/O, MEM or MEMIO */
149        unsigned char   bar;
150
151        /* Assigned Resource (PCI address), zero if not assigned */
152        uint32_t        start;
153        uint32_t        end;
154};
155
156/* Get Device from resource pointer. bar is the index of the pci_dev.resources
157 * array and used to get the device base address of which the resource is
158 * associated with.
159 */
160#define RES2DEV(res) ((struct pci_dev *) \
161        ((uintptr_t)res - (uintptr_t)(res->bar * (sizeof(struct pci_res)))))
162
163/* Device flags */
164#define PCI_DEV_BRIDGE    0x01  /* Device is a Bridge (struct pci_bus) */
165#define PCI_DEV_RES_FAIL  0x02  /* Resource alloction for device BARs failed */
166
167/* Bus Flags */
168#define PCI_BUS_IO        0x01  /* 16-bit I/O address decoding */
169#define PCI_BUS_MEMIO     0x02  /* Bus support non-prefetchable mem (always) */
170#define PCI_BUS_MEM       0x04  /* Bus support prefetchable memory space */
171#define PCI_BUS_IO32      0x08  /* 32-bit I/O address decoding */
172
173#define BRIDGE_RES_COUNT 2 /* Number of BAR resources a bridge can have */
174#define BUS_RES_START BRIDGE_RES_COUNT
175
176/* Bus Resources Array */
177enum {
178        BUS_RES_IO = 0,
179        BUS_RES_MEMIO = 1,
180        BUS_RES_MEM = 2,
181};
182
183/* Device Resource array index meaning */
184enum {
185        /* A Device has up to 6 BARs and an optional ROM BAR */
186        DEV_RES_BAR1 = 0,
187        DEV_RES_BAR2 = 1,
188        DEV_RES_BAR3 = 2,
189        DEV_RES_BAR4 = 3,
190        DEV_RES_BAR5 = 4,
191        DEV_RES_BAR6 = 5,
192        DEV_RES_ROM  = 6,
193
194        /* Bridges have 2 BARs (BAR1 and BAR2) and 3 Windows to secondary bus
195         * and an optional ROM BAR
196         */
197        BRIDGE_RES_BAR1 = 0,
198        BRIDGE_RES_BAR2 = 1,
199        BRIDGE_RES_IO = 2,
200        BRIDGE_RES_MEMIO = 3,
201        BRIDGE_RES_MEM = 4,
202        BRIDGE_RES_UNUSED1 = 5,
203        BRIDGE_RES_ROM = 6,
204};
205
206/* Maximum Number of Resources of a device */
207#define DEV_RES_CNT (DEV_RES_ROM + 1)
208
209/* PCI Device (Bus|Slot|Function) description */
210struct pci_dev {
211        struct pci_res  resources[DEV_RES_CNT]; /* must be topmost field */
212        struct pci_dev  *next;
213        struct pci_bus  *bus;
214        pci_dev_t       busdevfun;
215        uint8_t         flags;
216        uint8_t         sysirq;
217        uint16_t        vendor;
218        uint16_t        device;
219        uint16_t        subvendor;
220        uint16_t        subdevice;
221        uint32_t        classrev;
222
223        /* static configuration settings */
224        uint16_t        command;
225};
226
227/* PCI Bus description */
228struct pci_bus {
229        struct pci_dev  dev; /* PCI Bridge */
230        struct pci_dev  *devs; /* Devices on child (secondary) Bus */
231        unsigned int    flags;
232
233        /* Bridge Information */
234        int num;        /* Bus number (0=Root-PCI-bus) */
235        int pri;        /* Primary Bus Number */
236        int sord;       /* Subordinate Buses (Child bus count) */
237
238#if defined(PCI_CFG_AUTO_LIB)
239        /* Resources of devices on bus. USED INTERNALLY IN AUTO-CFG LIBRARY.
240         *
241         * BUS_RES_IO    = 0:  I/O resources
242         * BUS_RES_MEMIO = 1:  Prefetchable memory resources
243         * BUS_RES_MEM   = 2:  Non-Prefetchable memory resources
244         */
245        struct pci_res  *busres[3];
246#endif
247};
248
249#include <pci/cfg_auto.h>
250#include <pci/cfg_static.h>
251#include <pci/cfg_read.h>
252#include <pci/cfg_peripheral.h>
253
254#endif
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