source: rtems/cpukit/libpci/pci/cfg.h @ a31845f7

4.11
Last change on this file since a31845f7 was a31845f7, checked in by Daniel Hellstrom <daniel@…>, on Nov 28, 2011 at 9:11:10 AM

LIBPCI: added PCI layer to cpukit/libpci

  • Property mode set to 100644
File size: 7.1 KB
Line 
1/* PCI Configuration Library, two versions of the library exists:
2 *  - auto configuration (default)
3 *  - static configuration (user defined config)
4 * both versions are defined here.
5 *
6 * COPYRIGHT (c) 2010.
7 * Cobham Gaisler AB.
8 *
9 * The license and distribution terms for this file may be
10 * found in the file LICENSE in this distribution or at
11 * http://www.rtems.com/license/LICENSE.
12 */
13
14
15#ifndef __PCI_CFG_H__
16#define __PCI_CFG_H__
17
18#include <pci.h>
19
20/* PCI Configuration library */
21
22/* Return the number of PCI buses in system */
23extern int pci_bus_count(void);
24
25/* PCI Address assigned to BARs which failed to fit into the PCI Window or
26 * is disabled by any other cause.
27 */
28extern uint32_t pci_invalid_address;
29
30/* PCI Configuration Library of the system */
31enum {
32        PCI_CONFIG_LIB_NONE = 0,
33        PCI_CONFIG_LIB_AUTO = 1,
34        PCI_CONFIG_LIB_STATIC = 2,
35        PCI_CONFIG_LIB_READ = 3,
36        PCI_CONFIG_LIB_PERIPHERAL = 4,
37};
38extern const int pci_config_lib_type;
39
40/* Configuration library function pointers, these are set in <rtems/confdefs.h>
41 * by project configuration or by the BSP. The configuration will pull in the
42 * PCI Library needed and the PCI initialization functions will call these
43 * functions on initialization from the host driver.
44 */
45extern int (*pci_config_lib_init)(void);
46extern void (*pci_config_lib_register)(void *config);
47
48/* Configure PCI devices and bridges, and setup the RAM data structures
49 * describing the PCI devices currently present in the system.
50 *
51 * Returns 0 on success, -1 on failure.
52 */
53extern int pci_config_init(void);
54
55/* Register a config-library specific configuration used by the libarary in
56 * pci_config_init().
57 */
58extern void pci_config_register(void *config);
59
60/* Print current PCI configuration (C-code) to terminal, can be used in
61 * static and peripheral PCI configuration library. The configuration is
62 * taken from the current configuration library setup.
63 */
64extern void pci_cfg_print(void);
65
66struct pci_bus; /* Bridge Device and secondary bus information */
67struct pci_dev; /* Device/function */
68struct pci_res; /* Resource: BAR, ROM or Bridge Window */
69
70/* The Host Bridge and all subdevices (the PCI RAM data structure) */
71extern struct pci_bus pci_hb;
72
73/* Iterate over all PCI devices on a bus (see search options) and call func(),
74 * iteration is stopped if a non-zero value is returned by func().
75 *
76 * The function iterates over the PCI RAM data structure, it is not
77 * available until after all devices have been found and pci_hb is populated,
78 * typically after pci_config_init() is called.
79 *
80 * search options: 0 (no child buses), 1 (depth first, recursive)
81 *
82 * Return Values
83 *  0  All PCI devices were processed, func() returned 0 on every call
84 *  X  func() returned non-zero X value, the search was stopped
85 */
86#define SEARCH_DEPTH 1
87extern int pci_for_each_child(
88        struct pci_bus *bus,
89        int (*func)(struct pci_dev *, void *arg),
90        void *arg,
91        int search);
92
93/* Depth first search of all PCI devices in PCI RAM data structure and call
94 * func(dev, arg), iteration is stopped if a non-zero value is returned by
95 * func().
96 *
97 * The function iterates over the PCI RAM data structure, it is not
98 * available until after all devices have been found and pci_hb is populated,
99 * typically after pci_config_init() is called.
100 *
101 * Return Values
102 *  0  All PCI devices were processed, func() returned 0 on every call
103 *  X  func() returned non-zero X value, the search was stopped
104 */
105extern int pci_for_each_dev(
106        int (*func)(struct pci_dev *, void *arg),
107        void *arg);
108
109/* Get PCI device from RAM device tree for a device matching PCI Vendor, Device
110 * and instance number 'index'.
111 *
112 * Return Values
113 * -1  pci_find_dev did not find a device matching the criterion.
114 *  0  device was found, *ppdev was updated with the PCI device address
115 */
116extern int pci_find_dev(uint16_t ven, uint16_t dev, int index,
117                        struct pci_dev **ppdev);
118
119/* Get PCI device from RAM device tree by BUS|SLOT|FUNC.
120 *
121 * Return Values
122 * -1  pci_get_dev did not find a device matching the criterion
123 *  0  device was found, *ppdev was updated with the PCI device address
124 */
125extern int pci_get_dev(pci_dev_t pcidev, struct pci_dev **ppdev);
126
127/* Resource flags */
128#define PCI_RES_IO 1
129#define PCI_RES_MEMIO 2
130#define PCI_RES_MEM_PREFETCH 1
131#define PCI_RES_MEM (PCI_RES_MEMIO | PCI_RES_MEM_PREFETCH)
132#define PCI_RES_TYPE_MASK 0x3
133#define PCI_RES_IO32 0x08
134#define PCI_RES_FAIL 0x10 /* Alloc Failed */
135
136/* BAR Resouces entry */
137struct pci_res {
138        struct pci_res  *next;
139        uint32_t        size;
140        uint32_t        boundary;
141        unsigned char   flags; /* I/O, MEM or MEMIO */
142        unsigned char   bar;
143
144        /* Assigned Resource (PCI address), zero if not assigned */
145        uint32_t        start;
146        uint32_t        end;
147};
148
149/* Get Device from resource pointer */
150#define RES2DEV(res) ((struct pci_dev *) \
151                        ((void *)res - (res->bar * (sizeof(struct pci_res)))))
152
153/* Device flags */
154#define PCI_DEV_BRIDGE    0x01  /* Device is a Bridge (struct pci_bus) */
155#define PCI_DEV_RES_FAIL  0x02  /* Resource alloction for device BARs failed */
156
157/* Bus Flags */
158#define PCI_BUS_IO        0x01  /* 16-bit I/O address decoding */
159#define PCI_BUS_MEMIO     0x02  /* Bus support non-prefetchable mem (always) */
160#define PCI_BUS_MEM       0x04  /* Bus support prefetchable memory space */
161#define PCI_BUS_IO32      0x08  /* 32-bit I/O address decoding */
162
163#define BRIDGE_RES_COUNT 2 /* Number of BAR resources a bridge can have */
164#define BUS_RES_START BRIDGE_RES_COUNT
165
166/* Bus Resources Array */
167enum {
168        BUS_RES_IO = 0,
169        BUS_RES_MEMIO = 1,
170        BUS_RES_MEM = 2,
171};
172
173/* Device Resource array index meaning */
174enum {
175        /* A Device has up to 6 BARs and an optional ROM BAR */
176        DEV_RES_BAR1 = 0,
177        DEV_RES_BAR2 = 1,
178        DEV_RES_BAR3 = 2,
179        DEV_RES_BAR4 = 3,
180        DEV_RES_BAR5 = 4,
181        DEV_RES_BAR6 = 5,
182        DEV_RES_ROM  = 6,
183
184        /* Bridges have 2 BARs (BAR1 and BAR2) and 3 Windows to secondary bus
185         * and an optional ROM BAR
186         */
187        BRIDGE_RES_BAR1 = 0,
188        BRIDGE_RES_BAR2 = 1,
189        BRIDGE_RES_IO = 2,
190        BRIDGE_RES_MEMIO = 3,
191        BRIDGE_RES_MEM = 4,
192        BRIDGE_RES_UNUSED1 = 5,
193        BRIDGE_RES_ROM = 6,
194};
195
196/* Maximum Number of Resources of a device */
197#define DEV_RES_CNT (DEV_RES_ROM + 1)
198
199/* PCI Device (Bus|Slot|Function) description */
200struct pci_dev {
201        struct pci_res  resources[DEV_RES_CNT]; /* must be topmost field */
202        struct pci_dev  *next;
203        struct pci_bus  *bus;
204        pci_dev_t       busdevfun;
205        uint8_t         flags;
206        uint8_t         sysirq;
207        uint16_t        vendor;
208        uint16_t        device;
209        uint16_t        subvendor;
210        uint16_t        subdevice;
211        uint32_t        classrev;
212
213        /* static configuration settings */
214        uint16_t        command;
215};
216
217/* PCI Bus description */
218struct pci_bus {
219        struct pci_dev  dev; /* PCI Bridge */
220        struct pci_dev  *devs; /* Devices on child (secondary) Bus */
221        unsigned int    flags;
222
223        /* Bridge Information */
224        int num;        /* Bus number (0=Root-PCI-bus) */
225        int pri;        /* Primary Bus Number */
226        int sord;       /* Subordinate Buses (Child bus count) */
227
228#if defined(PCI_CFG_AUTO_LIB)
229        /* Resources of devices on bus. USED INTERNALLY IN AUTO-CFG LIBRARY.
230         *
231         * BUS_RES_IO    = 0:  I/O resources
232         * BUS_RES_MEMIO = 1:  Prefetchable memory resources
233         * BUS_RES_MEM   = 2:  Non-Prefetchable memory resources
234         */
235        struct pci_res  *busres[3];
236#endif
237};
238
239#include <pci/cfg_auto.h>
240#include <pci/cfg_static.h>
241#include <pci/cfg_read.h>
242#include <pci/cfg_peripheral.h>
243
244#endif
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