1 | /* PCI Configuration Library, two versions of the library exists: |
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2 | * - auto configuration (default) |
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3 | * - static configuration (user defined config) |
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4 | * both versions are defined here. |
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5 | * |
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6 | * COPYRIGHT (c) 2010. |
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7 | * Cobham Gaisler AB. |
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8 | * |
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9 | * The license and distribution terms for this file may be |
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10 | * found in the file LICENSE in this distribution or at |
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11 | * http://www.rtems.com/license/LICENSE. |
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12 | */ |
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13 | |
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14 | |
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15 | #ifndef __PCI_CFG_H__ |
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16 | #define __PCI_CFG_H__ |
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17 | |
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18 | #include <pci.h> |
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19 | |
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20 | /* PCI Configuration library */ |
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21 | |
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22 | /* Return the number of PCI buses in system */ |
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23 | extern int pci_bus_count(void); |
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24 | |
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25 | /* PCI Address assigned to BARs which failed to fit into the PCI Window or |
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26 | * is disabled by any other cause. |
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27 | */ |
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28 | extern uint32_t pci_invalid_address; |
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29 | |
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30 | /* PCI Configuration Library of the system */ |
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31 | enum { |
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32 | PCI_CONFIG_LIB_NONE = 0, |
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33 | PCI_CONFIG_LIB_AUTO = 1, |
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34 | PCI_CONFIG_LIB_STATIC = 2, |
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35 | PCI_CONFIG_LIB_READ = 3, |
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36 | PCI_CONFIG_LIB_PERIPHERAL = 4, |
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37 | }; |
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38 | extern const int pci_config_lib_type; |
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39 | |
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40 | /* Configuration library function pointers, these are set in <rtems/confdefs.h> |
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41 | * by project configuration or by the BSP. The configuration will pull in the |
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42 | * PCI Library needed and the PCI initialization functions will call these |
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43 | * functions on initialization from the host driver. |
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44 | */ |
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45 | extern int (*pci_config_lib_init)(void); |
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46 | extern void (*pci_config_lib_register)(void *config); |
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47 | |
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48 | /* Configure PCI devices and bridges, and setup the RAM data structures |
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49 | * describing the PCI devices currently present in the system. |
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50 | * |
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51 | * Returns 0 on success, -1 on failure. |
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52 | */ |
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53 | extern int pci_config_init(void); |
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54 | |
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55 | /* Register a config-library specific configuration used by the libarary in |
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56 | * pci_config_init(). |
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57 | */ |
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58 | extern void pci_config_register(void *config); |
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59 | |
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60 | /* Print current PCI configuration (C-code) to terminal, can be used in |
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61 | * static and peripheral PCI configuration library. The configuration is |
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62 | * taken from the current configuration library setup. |
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63 | */ |
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64 | extern void pci_cfg_print(void); |
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65 | |
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66 | struct pci_bus; /* Bridge Device and secondary bus information */ |
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67 | struct pci_dev; /* Device/function */ |
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68 | struct pci_res; /* Resource: BAR, ROM or Bridge Window */ |
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69 | |
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70 | /* The Host Bridge and all subdevices (the PCI RAM data structure) */ |
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71 | extern struct pci_bus pci_hb; |
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72 | |
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73 | /* Iterate over all PCI devices on a bus (see search options) and call func(), |
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74 | * iteration is stopped if a non-zero value is returned by func(). |
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75 | * |
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76 | * The function iterates over the PCI RAM data structure, it is not |
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77 | * available until after all devices have been found and pci_hb is populated, |
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78 | * typically after pci_config_init() is called. |
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79 | * |
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80 | * search options: 0 (no child buses), 1 (depth first, recursive) |
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81 | * |
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82 | * Return Values |
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83 | * 0 All PCI devices were processed, func() returned 0 on every call |
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84 | * X func() returned non-zero X value, the search was stopped |
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85 | */ |
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86 | #define SEARCH_DEPTH 1 |
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87 | extern int pci_for_each_child( |
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88 | struct pci_bus *bus, |
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89 | int (*func)(struct pci_dev *, void *arg), |
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90 | void *arg, |
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91 | int search); |
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92 | |
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93 | /* Depth first search of all PCI devices in PCI RAM data structure and call |
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94 | * func(dev, arg), iteration is stopped if a non-zero value is returned by |
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95 | * func(). |
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96 | * |
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97 | * The function iterates over the PCI RAM data structure, it is not |
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98 | * available until after all devices have been found and pci_hb is populated, |
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99 | * typically after pci_config_init() is called. |
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100 | * |
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101 | * Return Values |
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102 | * 0 All PCI devices were processed, func() returned 0 on every call |
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103 | * X func() returned non-zero X value, the search was stopped |
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104 | */ |
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105 | extern int pci_for_each_dev( |
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106 | int (*func)(struct pci_dev *, void *arg), |
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107 | void *arg); |
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108 | |
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109 | /* Get PCI device from RAM device tree for a device matching PCI Vendor, Device |
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110 | * and instance number 'index'. |
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111 | * |
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112 | * Return Values |
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113 | * -1 pci_find_dev did not find a device matching the criterion. |
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114 | * 0 device was found, *ppdev was updated with the PCI device address |
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115 | */ |
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116 | extern int pci_find_dev(uint16_t ven, uint16_t dev, int index, |
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117 | struct pci_dev **ppdev); |
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118 | |
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119 | /* Get PCI device from RAM device tree by BUS|SLOT|FUNC. |
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120 | * |
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121 | * Return Values |
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122 | * -1 pci_get_dev did not find a device matching the criterion |
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123 | * 0 device was found, *ppdev was updated with the PCI device address |
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124 | */ |
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125 | extern int pci_get_dev(pci_dev_t pcidev, struct pci_dev **ppdev); |
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126 | |
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127 | /* Resource flags */ |
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128 | #define PCI_RES_IO 1 |
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129 | #define PCI_RES_MEMIO 2 |
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130 | #define PCI_RES_MEM_PREFETCH 1 |
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131 | #define PCI_RES_MEM (PCI_RES_MEMIO | PCI_RES_MEM_PREFETCH) |
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132 | #define PCI_RES_TYPE_MASK 0x3 |
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133 | #define PCI_RES_IO32 0x08 |
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134 | #define PCI_RES_FAIL 0x10 /* Alloc Failed */ |
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135 | |
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136 | /* BAR Resouces entry */ |
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137 | struct pci_res { |
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138 | struct pci_res *next; |
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139 | uint32_t size; |
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140 | uint32_t boundary; |
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141 | unsigned char flags; /* I/O, MEM or MEMIO */ |
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142 | unsigned char bar; |
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143 | |
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144 | /* Assigned Resource (PCI address), zero if not assigned */ |
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145 | uint32_t start; |
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146 | uint32_t end; |
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147 | }; |
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148 | |
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149 | /* Get Device from resource pointer */ |
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150 | #define RES2DEV(res) ((struct pci_dev *) \ |
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151 | ((void *)res - (res->bar * (sizeof(struct pci_res))))) |
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152 | |
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153 | /* Device flags */ |
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154 | #define PCI_DEV_BRIDGE 0x01 /* Device is a Bridge (struct pci_bus) */ |
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155 | #define PCI_DEV_RES_FAIL 0x02 /* Resource alloction for device BARs failed */ |
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156 | |
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157 | /* Bus Flags */ |
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158 | #define PCI_BUS_IO 0x01 /* 16-bit I/O address decoding */ |
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159 | #define PCI_BUS_MEMIO 0x02 /* Bus support non-prefetchable mem (always) */ |
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160 | #define PCI_BUS_MEM 0x04 /* Bus support prefetchable memory space */ |
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161 | #define PCI_BUS_IO32 0x08 /* 32-bit I/O address decoding */ |
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162 | |
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163 | #define BRIDGE_RES_COUNT 2 /* Number of BAR resources a bridge can have */ |
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164 | #define BUS_RES_START BRIDGE_RES_COUNT |
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165 | |
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166 | /* Bus Resources Array */ |
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167 | enum { |
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168 | BUS_RES_IO = 0, |
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169 | BUS_RES_MEMIO = 1, |
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170 | BUS_RES_MEM = 2, |
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171 | }; |
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172 | |
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173 | /* Device Resource array index meaning */ |
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174 | enum { |
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175 | /* A Device has up to 6 BARs and an optional ROM BAR */ |
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176 | DEV_RES_BAR1 = 0, |
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177 | DEV_RES_BAR2 = 1, |
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178 | DEV_RES_BAR3 = 2, |
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179 | DEV_RES_BAR4 = 3, |
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180 | DEV_RES_BAR5 = 4, |
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181 | DEV_RES_BAR6 = 5, |
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182 | DEV_RES_ROM = 6, |
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183 | |
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184 | /* Bridges have 2 BARs (BAR1 and BAR2) and 3 Windows to secondary bus |
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185 | * and an optional ROM BAR |
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186 | */ |
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187 | BRIDGE_RES_BAR1 = 0, |
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188 | BRIDGE_RES_BAR2 = 1, |
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189 | BRIDGE_RES_IO = 2, |
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190 | BRIDGE_RES_MEMIO = 3, |
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191 | BRIDGE_RES_MEM = 4, |
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192 | BRIDGE_RES_UNUSED1 = 5, |
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193 | BRIDGE_RES_ROM = 6, |
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194 | }; |
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195 | |
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196 | /* Maximum Number of Resources of a device */ |
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197 | #define DEV_RES_CNT (DEV_RES_ROM + 1) |
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198 | |
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199 | /* PCI Device (Bus|Slot|Function) description */ |
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200 | struct pci_dev { |
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201 | struct pci_res resources[DEV_RES_CNT]; /* must be topmost field */ |
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202 | struct pci_dev *next; |
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203 | struct pci_bus *bus; |
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204 | pci_dev_t busdevfun; |
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205 | uint8_t flags; |
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206 | uint8_t sysirq; |
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207 | uint16_t vendor; |
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208 | uint16_t device; |
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209 | uint16_t subvendor; |
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210 | uint16_t subdevice; |
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211 | uint32_t classrev; |
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212 | |
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213 | /* static configuration settings */ |
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214 | uint16_t command; |
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215 | }; |
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216 | |
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217 | /* PCI Bus description */ |
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218 | struct pci_bus { |
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219 | struct pci_dev dev; /* PCI Bridge */ |
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220 | struct pci_dev *devs; /* Devices on child (secondary) Bus */ |
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221 | unsigned int flags; |
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222 | |
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223 | /* Bridge Information */ |
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224 | int num; /* Bus number (0=Root-PCI-bus) */ |
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225 | int pri; /* Primary Bus Number */ |
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226 | int sord; /* Subordinate Buses (Child bus count) */ |
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227 | |
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228 | #if defined(PCI_CFG_AUTO_LIB) |
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229 | /* Resources of devices on bus. USED INTERNALLY IN AUTO-CFG LIBRARY. |
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230 | * |
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231 | * BUS_RES_IO = 0: I/O resources |
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232 | * BUS_RES_MEMIO = 1: Prefetchable memory resources |
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233 | * BUS_RES_MEM = 2: Non-Prefetchable memory resources |
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234 | */ |
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235 | struct pci_res *busres[3]; |
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236 | #endif |
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237 | }; |
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238 | |
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239 | #include <pci/cfg_auto.h> |
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240 | #include <pci/cfg_static.h> |
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241 | #include <pci/cfg_read.h> |
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242 | #include <pci/cfg_peripheral.h> |
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243 | |
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244 | #endif |
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