source: rtems/cpukit/libpci/pci/cfg.h @ 4ab9296

4.11
Last change on this file since 4ab9296 was 71e8a5c, checked in by Daniel Hellstrom <daniel@…>, on Feb 27, 2015 at 3:45:59 PM

LIBPCI: moved copyright into a single line

  • Property mode set to 100644
File size: 7.2 KB
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1/* PCI Configuration Library, two versions of the library exists:
2 *  - auto configuration (default)
3 *  - static configuration (user defined config)
4 * both versions are defined here.
5 *
6 * COPYRIGHT (c) 2010 Cobham Gaisler AB.
7 *
8 * The license and distribution terms for this file may be
9 * found in the file LICENSE in this distribution or at
10 * http://www.rtems.com/license/LICENSE.
11 */
12
13
14#ifndef __PCI_CFG_H__
15#define __PCI_CFG_H__
16
17#include <pci.h>
18
19/* PCI Configuration library */
20
21/* Return the number of PCI buses in system */
22extern int pci_bus_count(void);
23
24/* PCI Address assigned to BARs which failed to fit into the PCI Window or
25 * is disabled by any other cause.
26 */
27extern uint32_t pci_invalid_address;
28
29/* PCI Configuration Library of the system */
30enum {
31        PCI_CONFIG_LIB_NONE = 0,
32        PCI_CONFIG_LIB_AUTO = 1,
33        PCI_CONFIG_LIB_STATIC = 2,
34        PCI_CONFIG_LIB_READ = 3,
35        PCI_CONFIG_LIB_PERIPHERAL = 4,
36};
37extern const int pci_config_lib_type;
38
39/* Configuration library function pointers, these are set in <rtems/confdefs.h>
40 * by project configuration or by the BSP. The configuration will pull in the
41 * PCI Library needed and the PCI initialization functions will call these
42 * functions on initialization from the host driver.
43 */
44extern int (*pci_config_lib_init)(void);
45extern void (*pci_config_lib_register)(void *config);
46
47/* Configure PCI devices and bridges, and setup the RAM data structures
48 * describing the PCI devices currently present in the system.
49 *
50 * Returns 0 on success, -1 on failure.
51 */
52extern int pci_config_init(void);
53
54/* Register a config-library specific configuration used by the libarary in
55 * pci_config_init().
56 */
57extern void pci_config_register(void *config);
58
59/* Print current PCI configuration (C-code) to terminal, can be used in
60 * static and peripheral PCI configuration library. The configuration is
61 * taken from the current configuration library setup.
62 */
63extern void pci_cfg_print(void);
64
65struct pci_bus; /* Bridge Device and secondary bus information */
66struct pci_dev; /* Device/function */
67struct pci_res; /* Resource: BAR, ROM or Bridge Window */
68
69/* The Host Bridge and all subdevices (the PCI RAM data structure) */
70extern struct pci_bus pci_hb;
71
72/* Iterate over all PCI devices on a bus (see search options) and call func(),
73 * iteration is stopped if a non-zero value is returned by func().
74 *
75 * The function iterates over the PCI RAM data structure, it is not
76 * available until after all devices have been found and pci_hb is populated,
77 * typically after pci_config_init() is called.
78 *
79 * search options: 0 (no child buses), 1 (depth first, recursive)
80 *
81 * Return Values
82 *  0  All PCI devices were processed, func() returned 0 on every call
83 *  X  func() returned non-zero X value, the search was stopped
84 */
85#define SEARCH_DEPTH 1
86extern int pci_for_each_child(
87        struct pci_bus *bus,
88        int (*func)(struct pci_dev *, void *arg),
89        void *arg,
90        int search);
91
92/* Depth first search of all PCI devices in PCI RAM data structure and call
93 * func(dev, arg), iteration is stopped if a non-zero value is returned by
94 * func().
95 *
96 * The function iterates over the PCI RAM data structure, it is not
97 * available until after all devices have been found and pci_hb is populated,
98 * typically after pci_config_init() is called.
99 *
100 * Return Values
101 *  0  All PCI devices were processed, func() returned 0 on every call
102 *  X  func() returned non-zero X value, the search was stopped
103 */
104extern int pci_for_each_dev(
105        int (*func)(struct pci_dev *, void *arg),
106        void *arg);
107
108/* Get PCI device from RAM device tree for a device matching PCI Vendor, Device
109 * and instance number 'index'.
110 *
111 * Return Values
112 * -1  pci_find_dev did not find a device matching the criterion.
113 *  0  device was found, *ppdev was updated with the PCI device address
114 */
115extern int pci_find_dev(uint16_t ven, uint16_t dev, int index,
116                        struct pci_dev **ppdev);
117
118/* Get PCI device from RAM device tree by BUS|SLOT|FUNC.
119 *
120 * Return Values
121 * -1  pci_get_dev did not find a device matching the criterion
122 *  0  device was found, *ppdev was updated with the PCI device address
123 */
124extern int pci_get_dev(pci_dev_t pcidev, struct pci_dev **ppdev);
125
126/* Resource flags */
127#define PCI_RES_IO 1
128#define PCI_RES_MEMIO 2
129#define PCI_RES_MEM_PREFETCH 1
130#define PCI_RES_MEM (PCI_RES_MEMIO | PCI_RES_MEM_PREFETCH)
131#define PCI_RES_TYPE_MASK 0x3
132#define PCI_RES_IO32 0x08
133#define PCI_RES_FAIL 0x10 /* Alloc Failed */
134
135/* BAR Resouces entry */
136struct pci_res {
137        struct pci_res  *next;
138        uint32_t        size;
139        uint32_t        boundary;
140        unsigned char   flags; /* I/O, MEM or MEMIO */
141        unsigned char   bar;
142
143        /* Assigned Resource (PCI address), zero if not assigned */
144        uint32_t        start;
145        uint32_t        end;
146};
147
148/* Get Device from resource pointer. bar is the index of the pci_dev.resources
149 * array and used to get the device base address of which the resource is
150 * associated with.
151 */
152#define RES2DEV(res) ((struct pci_dev *) \
153        ((uintptr_t)res - (uintptr_t)(res->bar * (sizeof(struct pci_res)))))
154
155/* Device flags */
156#define PCI_DEV_BRIDGE    0x01  /* Device is a Bridge (struct pci_bus) */
157#define PCI_DEV_RES_FAIL  0x02  /* Resource alloction for device BARs failed */
158
159/* Bus Flags */
160#define PCI_BUS_IO        0x01  /* 16-bit I/O address decoding */
161#define PCI_BUS_MEMIO     0x02  /* Bus support non-prefetchable mem (always) */
162#define PCI_BUS_MEM       0x04  /* Bus support prefetchable memory space */
163#define PCI_BUS_IO32      0x08  /* 32-bit I/O address decoding */
164
165#define BRIDGE_RES_COUNT 2 /* Number of BAR resources a bridge can have */
166#define BUS_RES_START BRIDGE_RES_COUNT
167
168/* Bus Resources Array */
169enum {
170        BUS_RES_IO = 0,
171        BUS_RES_MEMIO = 1,
172        BUS_RES_MEM = 2,
173};
174
175/* Device Resource array index meaning */
176enum {
177        /* A Device has up to 6 BARs and an optional ROM BAR */
178        DEV_RES_BAR1 = 0,
179        DEV_RES_BAR2 = 1,
180        DEV_RES_BAR3 = 2,
181        DEV_RES_BAR4 = 3,
182        DEV_RES_BAR5 = 4,
183        DEV_RES_BAR6 = 5,
184        DEV_RES_ROM  = 6,
185
186        /* Bridges have 2 BARs (BAR1 and BAR2) and 3 Windows to secondary bus
187         * and an optional ROM BAR
188         */
189        BRIDGE_RES_BAR1 = 0,
190        BRIDGE_RES_BAR2 = 1,
191        BRIDGE_RES_IO = 2,
192        BRIDGE_RES_MEMIO = 3,
193        BRIDGE_RES_MEM = 4,
194        BRIDGE_RES_UNUSED1 = 5,
195        BRIDGE_RES_ROM = 6,
196};
197
198/* Maximum Number of Resources of a device */
199#define DEV_RES_CNT (DEV_RES_ROM + 1)
200
201/* PCI Device (Bus|Slot|Function) description */
202struct pci_dev {
203        struct pci_res  resources[DEV_RES_CNT]; /* must be topmost field */
204        struct pci_dev  *next;
205        struct pci_bus  *bus;
206        pci_dev_t       busdevfun;
207        uint8_t         flags;
208        uint8_t         sysirq;
209        uint16_t        vendor;
210        uint16_t        device;
211        uint16_t        subvendor;
212        uint16_t        subdevice;
213        uint32_t        classrev;
214
215        /* static configuration settings */
216        uint16_t        command;
217};
218
219/* PCI Bus description */
220struct pci_bus {
221        struct pci_dev  dev; /* PCI Bridge */
222        struct pci_dev  *devs; /* Devices on child (secondary) Bus */
223        unsigned int    flags;
224
225        /* Bridge Information */
226        int num;        /* Bus number (0=Root-PCI-bus) */
227        int pri;        /* Primary Bus Number */
228        int sord;       /* Subordinate Buses (Child bus count) */
229
230#if defined(PCI_CFG_AUTO_LIB)
231        /* Resources of devices on bus. USED INTERNALLY IN AUTO-CFG LIBRARY.
232         *
233         * BUS_RES_IO    = 0:  I/O resources
234         * BUS_RES_MEMIO = 1:  Prefetchable memory resources
235         * BUS_RES_MEM   = 2:  Non-Prefetchable memory resources
236         */
237        struct pci_res  *busres[3];
238#endif
239};
240
241#include <pci/cfg_auto.h>
242#include <pci/cfg_static.h>
243#include <pci/cfg_read.h>
244#include <pci/cfg_peripheral.h>
245
246#endif
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