source: rtems/cpukit/libcsupport/include/zilog/z8536.h @ 7945944

4.104.114.84.95
Last change on this file since 7945944 was 7945944, checked in by Ralf Corsepius <ralf.corsepius@…>, on Jan 28, 2005 at 8:04:27 AM

New header guards.

  • Property mode set to 100644
File size: 4.7 KB
Line 
1/**
2 * @file rtems/zilog/z8536.h
3 */
4
5/*
6 *  This include file defines information related to a Zilog Z8536
7 *  Counter/Timer/IO Chip.  It is a IO mapped part.
8 *
9 *  Input parameters:   NONE
10 *
11 *  Output parameters:  NONE
12 *
13 *  NOTE: This file shares as much as possible with the include
14 *        file for the Z8036 via z8x36.h.
15 *
16 *  COPYRIGHT (c) 1989-1999.
17 *  On-Line Applications Research Corporation (OAR).
18 *
19 *  The license and distribution terms for this file may be
20 *  found in the file LICENSE in this distribution or at
21 *  http://www.rtems.com/license/LICENSE.
22 *
23 *  $Id$
24 */
25
26#ifndef _RTEMS_ZILOG_Z8536_H
27#define _RTEMS_ZILOG_Z8536_H
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33/* macros */
34
35#define VOL8( ptr )   ((volatile uint8_t   *)(ptr))
36
37#define Z8x36_STATE0 ( z8536 ) \
38  { char *garbage; \
39    (garbage) = *(VOL8(z8536+0xC)) \
40  }
41
42#define Z8x36_WRITE( z8536, reg, data ) \
43   *(VOL8(z8536+0xC)) = (reg); \
44   *(VOL8(z8536+0xC)) = (data)
45
46#define Z8x36_READ( z8536, reg, data ) \
47   *(VOL8(z8536+0xC)) = (reg); \
48   (data) = *(VOL8(z8536+0xC))
49
50/* structures */
51
52/* MAIN CONTROL REGISTERS (0x00-0x07) */
53#define MASTER_INTR           0x00   /* Master Interrupt Ctl Reg */
54#define MASTER_CFG            0x01   /* Master Configuration Ctl Reg */
55#define PORTA_VECTOR          0x02   /* Port A - Interrupt Vector */
56#define PORTB_VECTOR          0x03   /* Port B - Interrupt Vector */
57#define CNT_TMR_VECTOR        0x04   /* Counter/Timer Interrupt Vector */
58#define PORTC_DATA_POLARITY   0x05   /* Port C - Data Path Polarity */
59#define PORTC_DIRECTION       0x06   /* Port C - Data Direction */
60#define PORTC_SPECIAL_IO_CTL  0x07   /* Port C - Special IO Control */
61
62/* MOST OFTEN ACCESSED REGISTERS (0x08 - 0x0f) */
63#define PORTA_CMD_STATUS      0x08   /* Port A - Command Status Reg */
64#define PORTB_CMD_STATUS      0x09   /* Port B - Command Status Reg */
65#define CT1_CMD_STATUS        0x0a   /* Ctr/Timer 1 - Command Status Reg */
66#define CT2_CMD_STATUS        0x0b   /* Ctr/Timer 2 - Command Status Reg */
67#define CT3_CMD_STATUS        0x0c   /* Ctr/Timer 3 - Command Status Reg */
68#define PORTA_DATA            0x0d   /* Port A - Data */
69#define PORTB_DATA            0x0e   /* Port B - Data */
70#define PORTC_DATA            0x0f   /* Port C - Data */
71
72/* COUNTER/TIMER RELATED REGISTERS (0x10-0x1f) */
73#define CT1_CUR_CNT_MSB       0x10   /* Ctr/Timer 1 - Current Count (MSB) */
74#define CT1_CUR_CNT_LSB       0x11   /* Ctr/Timer 1 - Current Count (LSB) */
75#define CT2_CUR_CNT_MSB       0x12   /* Ctr/Timer 2 - Current Count (MSB) */
76#define CT2_CUR_CNT_LSB       0x13   /* Ctr/Timer 2 - Current Count (LSB) */
77#define CT3_CUR_CNT_MSB       0x14   /* Ctr/Timer 3 - Current Count (MSB) */
78#define CT3_CUR_CNT_LSB       0x15   /* Ctr/Timer 3 - Current Count (LSB) */
79#define CT1_TIME_CONST_MSB    0x16   /* Ctr/Timer 1 - Time Constant (MSB) */
80#define CT1_TIME_CONST_LSB    0x17   /* Ctr/Timer 1 - Time Constant (LSB) */
81#define CT2_TIME_CONST_MSB    0x18   /* Ctr/Timer 2 - Time Constant (MSB) */
82#define CT2_TIME_CONST_LSB    0x19   /* Ctr/Timer 2 - Time Constant (LSB) */
83#define CT3_TIME_CONST_MSB    0x1a   /* Ctr/Timer 3 - Time Constant (MSB) */
84#define CT3_TIME_CONST_LSB    0x1b   /* Ctr/Timer 3 - Time Constant (LSB) */
85#define CT1_MODE_SPEC         0x1c   /* Ctr/Timer 1 - Mode Specification  */
86#define CT2_MODE_SPEC         0x1d   /* Ctr/Timer 2 - Mode Specification  */
87#define CT3_MODE_SPEC         0x1e   /* Ctr/Timer 3 - Mode Specification  */
88#define CURRENT_VECTOR        0x1f   /* Current Vector */
89
90/* PORT A SPECIFICATION REGISTERS (0x20 -0x27) */
91#define PORTA_MODE            0x20   /* Port A - Mode Specification  */
92#define PORTA_HANDSHAKE       0x21   /* Port A - Handshake Specification  */
93#define PORTA_DATA_POLARITY   0x22   /* Port A - Data Path Polarity */
94#define PORTA_DIRECTION       0x23   /* Port A - Data Direction */
95#define PORTA_SPECIAL_IO_CTL  0x24   /* Port A - Special IO Control */
96#define PORTA_PATT_POLARITY   0x25   /* Port A - Pattern Polarity */
97#define PORTA_PATT_TRANS      0x26   /* Port A - Pattern Transition */
98#define PORTA_PATT_MASK       0x27   /* Port A - Pattern Mask */
99
100/* PORT B SPECIFICATION REGISTERS (0x28-0x2f) */
101#define PORTB_MODE            0x28   /* Port B - Mode Specification  */
102#define PORTB_HANDSHAKE       0x29   /* Port B - Handshake Specification  */
103#define PORTB_DATA_POLARITY   0x2a   /* Port B - Data Path Polarity */
104#define PORTB_DIRECTION       0x2b   /* Port B - Data Direction */
105#define PORTB_SPECIAL_IO_CTL  0x2c   /* Port B - Special IO Control */
106#define PORTB_PATT_POLARITY   0x2d   /* Port B - Pattern Polarity */
107#define PORTB_PATT_TRANS      0x2e   /* Port B - Pattern Transition */
108#define PORTB_PATT_MASK       0x2f   /* Port B - Pattern Mask */
109
110#ifdef __cplusplus
111}
112#endif
113
114#endif
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