source: rtems/cpukit/libcsupport/include/zilog/z8530.h @ 4d3017a

4.104.114.84.95
Last change on this file since 4d3017a was 4d3017a, checked in by Ralf Corsepius <ralf.corsepius@…>, on Dec 2, 2004 at 6:04:55 PM

Add doxygen preamble.

  • Property mode set to 100644
File size: 1.9 KB
Line 
1/**
2 * @file rtems/zilog/z8530.h
3 */
4
5/*
6 *  This include file defines information related to a Zilog Z8530
7 *  SCC Chip.  It is a IO mapped part.
8 *
9 *  COPYRIGHT (c) 1989-1999.
10 *  On-Line Applications Research Corporation (OAR).
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 *
16 *  $Id$
17 */
18
19#ifndef __Z8530_h
20#define __Z8530_h
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
26/* macros */
27
28#define VOL8( ptr )   ((volatile uint8_t   *)(ptr))
29
30#define Z8x30_STATE0 ( z8530 ) \
31  { char *garbage; \
32    (garbage) = *(VOL8(z8530)) \
33  }
34
35#define Z8x30_WRITE_CONTROL( z8530, reg, data ) \
36   *(VOL8(z8530)) = (reg); \
37   *(VOL8(z8530)) = (data)
38
39#define Z8x30_READ_CONTROL( z8530, reg, data ) \
40   *(VOL8(z8530)) = (reg); \
41   (data) = *(VOL8(z8530))
42
43#define Z8x30_WRITE_DATA( z8530, data ) \
44   *(VOL8(z8530)) = (data);
45
46#define Z8x30_READ_DATA( z8530, data ) \
47   (data) = *(VOL8(z8530));
48
49
50/* RR_0 Bit Definitions */
51
52#define RR_0_TX_BUFFER_EMPTY   0x04
53#define RR_0_RX_DATA_AVAILABLE 0x01
54
55/* read registers */
56
57#define RR_0       0x00
58#define RR_1       0x01
59#define RR_2       0x02
60#define RR_3       0x03
61#define RR_4       0x04
62#define RR_5       0x05
63#define RR_6       0x06
64#define RR_7       0x07
65#define RR_8       0x08
66#define RR_9       0x09
67#define RR_10      0x0A
68#define RR_11      0x0B
69#define RR_12      0x0C
70#define RR_13      0x0D
71#define RR_14      0x0E
72#define RR_15      0x0F
73
74/* write registers */
75
76#define WR_0       0x00
77#define WR_1       0x01
78#define WR_2       0x02
79#define WR_3       0x03
80#define WR_4       0x04
81#define WR_5       0x05
82#define WR_6       0x06
83#define WR_7       0x07
84#define WR_8       0x08
85#define WR_9       0x09
86#define WR_10      0x0A
87#define WR_11      0x0B
88#define WR_12      0x0C
89#define WR_13      0x0D
90#define WR_14      0x0E
91#define WR_15      0x0F
92
93#ifdef __cplusplus
94}
95#endif
96
97#endif
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