source: rtems/cpukit/include/rtems/score/threaddispatch.h @ 5803f37

5
Last change on this file since 5803f37 was 7d93c447, checked in by Andreas Dachsberger <andreas.dachsberger@…>, on 04/16/19 at 06:37:21

doxygen: score: adjust doc in threaddispatch.h to doxygen guidelines

Update #3706.

  • Property mode set to 100644
File size: 6.6 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup RTEMSScoreThread
5 *
6 * @brief Constants and Structures Related with Thread Dispatch
7 */
8
9/*
10 * COPYRIGHT (c) 1989-2009.
11 * On-Line Applications Research Corporation (OAR).
12 *
13 * The license and distribution terms for this file may be
14 * found in the file LICENSE in this distribution or at
15 * http://www.rtems.org/license/LICENSE.
16 */
17
18#ifndef _RTEMS_SCORE_THREADDISPATCH_H
19#define _RTEMS_SCORE_THREADDISPATCH_H
20
21#include <rtems/score/percpu.h>
22#include <rtems/score/isrlock.h>
23#include <rtems/score/profiling.h>
24
25#ifdef __cplusplus
26extern "C" {
27#endif /* __cplusplus */
28
29/**
30 * @addtogroup RTEMSScoreThread
31 *
32 * @{
33 */
34
35#if defined(RTEMS_SMP) || ( CPU_ENABLE_ROBUST_THREAD_DISPATCH == TRUE )
36/**
37 * @brief Enables a robust thread dispatch.
38 *
39 * On each change of the thread dispatch disable level from one to zero the
40 * interrupt status is checked.  In case interrupts are disabled and SMP is
41 * enabled or the CPU port needs it, then the system terminates with the fatal
42 * internal error INTERNAL_ERROR_BAD_THREAD_DISPATCH_ENVIRONMENT.
43 */
44#define RTEMS_SCORE_ROBUST_THREAD_DISPATCH
45#endif
46
47/**
48 * @brief Indicates if the executing thread is inside a thread dispatch
49 * critical section.
50 *
51 * @retval true Thread dispatching is enabled.
52 * @retval false The executing thread is inside a thread dispatch critical
53 * section and dispatching is not allowed.
54 */
55RTEMS_INLINE_ROUTINE bool _Thread_Dispatch_is_enabled(void)
56{
57  bool enabled;
58
59#if defined(RTEMS_SMP)
60  ISR_Level level;
61
62  _ISR_Local_disable( level );
63#endif
64
65  enabled = _Thread_Dispatch_disable_level == 0;
66
67#if defined(RTEMS_SMP)
68  _ISR_Local_enable( level );
69#endif
70
71  return enabled;
72}
73
74/**
75 * @brief Gets thread dispatch disable level.
76 *
77 * @return The value of the thread dispatch level.
78 */
79RTEMS_INLINE_ROUTINE uint32_t _Thread_Dispatch_get_disable_level(void)
80{
81  return _Thread_Dispatch_disable_level;
82}
83
84/**
85 * @brief Thread dispatch initialization.
86 *
87 * This routine initializes the thread dispatching subsystem.
88 */
89RTEMS_INLINE_ROUTINE void _Thread_Dispatch_initialization( void )
90{
91  _Thread_Dispatch_disable_level = 1;
92}
93
94/**
95 * @brief Performs a thread dispatch if necessary.
96 *
97 * This routine is responsible for transferring control of the processor from
98 * the executing thread to the heir thread.  Once the heir is running an
99 * attempt is made to run the pending post-switch thread actions.
100 *
101 * As part of this process, it is responsible for the following actions
102 *   - update timing information of the executing thread,
103 *   - save the context of the executing thread,
104 *   - invokation of the thread switch user extensions,
105 *   - restore the context of the heir thread, and
106 *   - run of pending post-switch thread actions of the resulting executing
107 *     thread.
108 *
109 * On entry the thread dispatch level must be equal to zero.
110 */
111void _Thread_Dispatch( void );
112
113/**
114 * @brief Directly do a thread dispatch.
115 *
116 * Must be called with a thread dispatch disable level of one, otherwise the
117 * INTERNAL_ERROR_BAD_THREAD_DISPATCH_DISABLE_LEVEL will occur.  This function
118 * is useful for operations which synchronously block, e.g. self restart, self
119 * deletion, yield, sleep.
120 *
121 * @param cpu_self The current processor.
122 *
123 * @see _Thread_Dispatch().
124 */
125void _Thread_Dispatch_direct( Per_CPU_Control *cpu_self );
126
127/**
128 * @brief Performs a thread dispatch on the current processor.
129 *
130 * On entry the thread dispatch disable level must be equal to one and
131 * interrupts must be disabled.
132 *
133 * This function assumes that a thread dispatch is necessary.
134 *
135 * @param cpu_self The current processor.
136 * @param level The previous interrupt level.
137 *
138 * @see _Thread_Dispatch().
139 */
140void _Thread_Do_dispatch( Per_CPU_Control *cpu_self, ISR_Level level );
141
142/**
143 * @brief Disables thread dispatching inside a critical section (interrupts
144 * disabled) with the current processor.
145 *
146 * @param cpu_self The current processor.
147 * @param lock_context The lock context of the corresponding
148 * _ISR_lock_ISR_disable() that started the critical section.
149 *
150 * @return The current processor.
151 */
152RTEMS_INLINE_ROUTINE Per_CPU_Control *_Thread_Dispatch_disable_with_CPU(
153  Per_CPU_Control        *cpu_self,
154  const ISR_lock_Context *lock_context
155)
156{
157  uint32_t disable_level;
158
159  disable_level = cpu_self->thread_dispatch_disable_level;
160  _Profiling_Thread_dispatch_disable_critical(
161    cpu_self,
162    disable_level,
163    lock_context
164  );
165  cpu_self->thread_dispatch_disable_level = disable_level + 1;
166
167  return cpu_self;
168}
169
170/**
171 * @brief Disables thread dispatching inside a critical section (interrupts
172 * disabled).
173 *
174 * @param lock_context The lock context of the corresponding
175 * _ISR_lock_ISR_disable() that started the critical section.
176 *
177 * @return The current processor.
178 */
179RTEMS_INLINE_ROUTINE Per_CPU_Control *_Thread_Dispatch_disable_critical(
180  const ISR_lock_Context *lock_context
181)
182{
183  return _Thread_Dispatch_disable_with_CPU( _Per_CPU_Get(), lock_context );
184}
185
186/**
187 * @brief Disables thread dispatching.
188 *
189 * @return The current processor.
190 */
191RTEMS_INLINE_ROUTINE Per_CPU_Control *_Thread_Dispatch_disable( void )
192{
193  Per_CPU_Control  *cpu_self;
194  ISR_lock_Context  lock_context;
195
196#if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING )
197  _ISR_lock_ISR_disable( &lock_context );
198#endif
199
200  cpu_self = _Thread_Dispatch_disable_critical( &lock_context );
201
202#if defined( RTEMS_SMP ) || defined( RTEMS_PROFILING )
203  _ISR_lock_ISR_enable( &lock_context );
204#endif
205
206  return cpu_self;
207}
208
209/**
210 * @brief Enables thread dispatching.
211 *
212 * May perform a thread dispatch if necessary as a side-effect.
213 *
214 * @param[in, out] cpu_self The current processor.
215 */
216void _Thread_Dispatch_enable( Per_CPU_Control *cpu_self );
217
218/**
219 * @brief Unnests thread dispatching.
220 *
221 * @param[in, out] cpu_self The current processor.
222 */
223RTEMS_INLINE_ROUTINE void _Thread_Dispatch_unnest( Per_CPU_Control *cpu_self )
224{
225  _Assert( cpu_self->thread_dispatch_disable_level > 0 );
226  --cpu_self->thread_dispatch_disable_level;
227}
228
229/**
230 * @brief Requests a thread dispatch on the target processor.
231 *
232 * @param[in, out] cpu_self The current processor.
233 * @param[in, out] cpu_target The target processor to request a thread dispatch.
234 */
235RTEMS_INLINE_ROUTINE void _Thread_Dispatch_request(
236  Per_CPU_Control *cpu_self,
237  Per_CPU_Control *cpu_target
238)
239{
240#if defined( RTEMS_SMP )
241  if ( cpu_self == cpu_target ) {
242    cpu_self->dispatch_necessary = true;
243  } else {
244    _Atomic_Fetch_or_ulong( &cpu_target->message, 0, ATOMIC_ORDER_RELEASE );
245    _CPU_SMP_Send_interrupt( _Per_CPU_Get_index( cpu_target ) );
246  }
247#else
248 cpu_self->dispatch_necessary = true;
249 (void) cpu_target;
250#endif
251}
252
253/** @} */
254
255#ifdef __cplusplus
256}
257#endif /* __cplusplus */
258
259#endif /* _RTEMS_SCORE_THREADDISPATCH_H */
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