1 | /** |
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2 | * @file |
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3 | * |
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4 | * @brief This header file provides the interfaces of the |
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5 | * @ref RTEMSScoreAtomicCPU. |
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6 | */ |
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7 | |
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8 | /* |
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9 | * COPYRIGHT (c) 2013 Deng Hengyi. |
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10 | * Copyright (c) 2015 embedded brains GmbH. |
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11 | * |
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12 | * The license and distribution terms for this file may be |
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13 | * found in the file LICENSE in this distribution or at |
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14 | * http://www.rtems.org/license/LICENSE. |
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15 | */ |
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16 | |
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17 | #ifndef _RTEMS_SCORE_CPUSTDATOMIC_H |
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18 | #define _RTEMS_SCORE_CPUSTDATOMIC_H |
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19 | |
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20 | #include <rtems/score/basedefs.h> |
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21 | |
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22 | /** |
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23 | * @defgroup RTEMSScoreAtomicCPU C11/C++11 Atomic Operations |
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24 | * |
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25 | * @ingroup RTEMSScoreAtomic |
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26 | * |
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27 | * @brief This group contains the atomic operations implementation using |
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28 | * functions provided by the C11/C++11. |
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29 | * |
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30 | * @{ |
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31 | */ |
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32 | |
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33 | #ifdef RTEMS_SMP |
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34 | #if defined(__cplusplus) \ |
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35 | && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)) |
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36 | /* |
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37 | * The GCC 4.9 ships its own <stdatomic.h> which is not C++ compatible. The |
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38 | * suggested solution was to include <atomic> in case C++ is used. This works |
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39 | * at least with GCC 4.9. See also: |
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40 | * |
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41 | * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60932 |
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42 | * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60940 |
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43 | */ |
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44 | #include <atomic> |
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45 | #define _RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC |
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46 | #else |
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47 | #include <stdatomic.h> |
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48 | #define _RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC |
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49 | #endif |
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50 | #else |
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51 | #include <rtems/score/isrlevel.h> |
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52 | #endif |
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53 | |
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54 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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55 | |
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56 | typedef std::atomic_uint CPU_atomic_Uint; |
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57 | |
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58 | typedef std::atomic_ulong CPU_atomic_Ulong; |
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59 | |
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60 | typedef std::atomic_uintptr_t CPU_atomic_Uintptr; |
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61 | |
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62 | typedef std::atomic_flag CPU_atomic_Flag; |
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63 | |
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64 | typedef std::memory_order CPU_atomic_Order; |
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65 | |
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66 | #define CPU_ATOMIC_ORDER_RELAXED std::memory_order_relaxed |
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67 | |
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68 | #define CPU_ATOMIC_ORDER_ACQUIRE std::memory_order_acquire |
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69 | |
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70 | #define CPU_ATOMIC_ORDER_RELEASE std::memory_order_release |
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71 | |
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72 | #define CPU_ATOMIC_ORDER_ACQ_REL std::memory_order_acq_rel |
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73 | |
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74 | #define CPU_ATOMIC_ORDER_SEQ_CST std::memory_order_seq_cst |
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75 | |
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76 | #define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value ) |
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77 | |
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78 | #define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value ) |
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79 | |
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80 | #define CPU_ATOMIC_INITIALIZER_UINTPTR( value ) ATOMIC_VAR_INIT( value ) |
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81 | |
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82 | #define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT |
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83 | |
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84 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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85 | |
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86 | typedef atomic_uint CPU_atomic_Uint; |
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87 | |
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88 | typedef atomic_ulong CPU_atomic_Ulong; |
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89 | |
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90 | typedef atomic_uintptr_t CPU_atomic_Uintptr; |
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91 | |
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92 | typedef atomic_flag CPU_atomic_Flag; |
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93 | |
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94 | typedef memory_order CPU_atomic_Order; |
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95 | |
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96 | #define CPU_ATOMIC_ORDER_RELAXED memory_order_relaxed |
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97 | |
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98 | #define CPU_ATOMIC_ORDER_ACQUIRE memory_order_acquire |
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99 | |
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100 | #define CPU_ATOMIC_ORDER_RELEASE memory_order_release |
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101 | |
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102 | #define CPU_ATOMIC_ORDER_ACQ_REL memory_order_acq_rel |
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103 | |
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104 | #define CPU_ATOMIC_ORDER_SEQ_CST memory_order_seq_cst |
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105 | |
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106 | #define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value ) |
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107 | |
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108 | #define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value ) |
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109 | |
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110 | #define CPU_ATOMIC_INITIALIZER_UINTPTR( value ) ATOMIC_VAR_INIT( value ) |
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111 | |
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112 | #define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT |
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113 | |
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114 | #else |
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115 | |
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116 | typedef unsigned int CPU_atomic_Uint; |
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117 | |
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118 | typedef unsigned long CPU_atomic_Ulong; |
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119 | |
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120 | typedef uintptr_t CPU_atomic_Uintptr; |
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121 | |
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122 | typedef bool CPU_atomic_Flag; |
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123 | |
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124 | typedef int CPU_atomic_Order; |
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125 | |
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126 | #define CPU_ATOMIC_ORDER_RELAXED 0 |
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127 | |
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128 | #define CPU_ATOMIC_ORDER_ACQUIRE 2 |
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129 | |
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130 | #define CPU_ATOMIC_ORDER_RELEASE 3 |
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131 | |
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132 | #define CPU_ATOMIC_ORDER_ACQ_REL 4 |
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133 | |
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134 | #define CPU_ATOMIC_ORDER_SEQ_CST 5 |
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135 | |
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136 | #define CPU_ATOMIC_INITIALIZER_UINT( value ) ( value ) |
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137 | |
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138 | #define CPU_ATOMIC_INITIALIZER_ULONG( value ) ( value ) |
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139 | |
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140 | #define CPU_ATOMIC_INITIALIZER_UINTPTR( value ) ( value ) |
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141 | |
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142 | #define CPU_ATOMIC_INITIALIZER_FLAG false |
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143 | |
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144 | #endif |
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145 | |
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146 | /** |
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147 | * @brief Sets up a cpu fence. |
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148 | * |
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149 | * @param[out] order The order for the fence. |
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150 | */ |
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151 | static inline void _CPU_atomic_Fence( CPU_atomic_Order order ) |
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152 | { |
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153 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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154 | std::atomic_thread_fence( order ); |
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155 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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156 | atomic_thread_fence( order ); |
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157 | #else |
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158 | (void) order; |
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159 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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160 | #endif |
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161 | } |
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162 | |
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163 | /** |
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164 | * @brief Initializes Uint. |
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165 | * |
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166 | * @param[out] obj The CPU atomic Uint to initialize. |
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167 | * @param desired The desired value for @a obj. |
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168 | */ |
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169 | static inline void _CPU_atomic_Init_uint( CPU_atomic_Uint *obj, unsigned int desired ) |
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170 | { |
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171 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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172 | obj->store( desired ); |
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173 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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174 | atomic_init( obj, desired ); |
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175 | #else |
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176 | *obj = desired; |
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177 | #endif |
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178 | } |
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179 | |
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180 | /** |
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181 | * @brief Initializes Ulong. |
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182 | * |
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183 | * @param[out] obj The CPU atomic Ulong to initialize. |
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184 | * @param desired The desired value for @a obj. |
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185 | */ |
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186 | static inline void _CPU_atomic_Init_ulong( CPU_atomic_Ulong *obj, unsigned long desired ) |
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187 | { |
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188 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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189 | obj->store( desired ); |
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190 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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191 | atomic_init( obj, desired ); |
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192 | #else |
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193 | *obj = desired; |
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194 | #endif |
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195 | } |
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196 | |
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197 | /** |
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198 | * @brief Initializes Uintptr. |
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199 | * |
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200 | * @param[out] obj The CPU atomic Uintptr to initialize. |
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201 | * @param desired The desired value for @a obj. |
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202 | */ |
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203 | static inline void _CPU_atomic_Init_uintptr( CPU_atomic_Uintptr *obj, uintptr_t desired ) |
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204 | { |
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205 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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206 | obj->store( desired ); |
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207 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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208 | atomic_init( obj, desired ); |
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209 | #else |
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210 | *obj = desired; |
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211 | #endif |
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212 | } |
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213 | |
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214 | /** |
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215 | * @brief Loads value of Uint considering the order. |
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216 | * |
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217 | * @param obj The CPU atomic Uint to get the value from. |
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218 | * @param order The atomic order for getting the value. |
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219 | * |
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220 | * @return The value of @a obj considering the @a order. |
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221 | */ |
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222 | static inline unsigned int _CPU_atomic_Load_uint( const CPU_atomic_Uint *obj, CPU_atomic_Order order ) |
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223 | { |
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224 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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225 | return obj->load( order ); |
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226 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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227 | return atomic_load_explicit( obj, order ); |
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228 | #else |
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229 | unsigned int val; |
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230 | |
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231 | (void) order; |
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232 | val = *obj; |
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233 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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234 | |
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235 | return val; |
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236 | #endif |
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237 | } |
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238 | |
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239 | /** |
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240 | * @brief Loads value of Ulong considering the order. |
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241 | * |
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242 | * @param obj The CPU atomic Ulong to get the value from. |
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243 | * @param order The atomic order for getting the value. |
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244 | * |
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245 | * @return The value of @a obj considering the @a order. |
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246 | */ |
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247 | static inline unsigned long _CPU_atomic_Load_ulong( const CPU_atomic_Ulong *obj, CPU_atomic_Order order ) |
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248 | { |
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249 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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250 | return obj->load( order ); |
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251 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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252 | return atomic_load_explicit( obj, order ); |
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253 | #else |
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254 | unsigned long val; |
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255 | |
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256 | (void) order; |
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257 | val = *obj; |
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258 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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259 | |
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260 | return val; |
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261 | #endif |
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262 | } |
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263 | |
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264 | /** |
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265 | * @brief Loads value of Uintptr considering the order. |
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266 | * |
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267 | * @param obj The CPU atomic Uintptr to get the value from. |
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268 | * @param order The atomic order for getting the value. |
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269 | * |
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270 | * @return The value of @a obj considering the @a order. |
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271 | */ |
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272 | static inline uintptr_t _CPU_atomic_Load_uintptr( const CPU_atomic_Uintptr *obj, CPU_atomic_Order order ) |
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273 | { |
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274 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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275 | return obj->load( order ); |
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276 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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277 | return atomic_load_explicit( obj, order ); |
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278 | #else |
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279 | uintptr_t val; |
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280 | |
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281 | (void) order; |
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282 | val = *obj; |
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283 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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284 | |
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285 | return val; |
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286 | #endif |
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287 | } |
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288 | |
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289 | /** |
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290 | * @brief Stores a value to Uint considering the order. |
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291 | * |
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292 | * @param[out] obj The CPU atomic Uint to store a value in. |
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293 | * @param desired The desired value for @a obj. |
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294 | * @param order The atomic order for storing the value. |
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295 | */ |
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296 | static inline void _CPU_atomic_Store_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order ) |
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297 | { |
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298 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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299 | obj->store( desired, order ); |
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300 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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301 | atomic_store_explicit( obj, desired, order ); |
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302 | #else |
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303 | (void) order; |
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304 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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305 | *obj = desired; |
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306 | #endif |
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307 | } |
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308 | |
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309 | /** |
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310 | * @brief Stores a value to Ulong considering the order. |
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311 | * |
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312 | * @param[out] obj The CPU atomic Ulong to store a value in. |
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313 | * @param desired The desired value for @a obj. |
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314 | * @param order The atomic order for storing the value. |
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315 | */ |
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316 | static inline void _CPU_atomic_Store_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order ) |
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317 | { |
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318 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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319 | obj->store( desired, order ); |
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320 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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321 | atomic_store_explicit( obj, desired, order ); |
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322 | #else |
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323 | (void) order; |
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324 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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325 | *obj = desired; |
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326 | #endif |
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327 | } |
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328 | |
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329 | /** |
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330 | * @brief Stores a value to Uintptr considering the order. |
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331 | * |
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332 | * @param[out] obj The CPU atomic Uintptr to store a value in. |
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333 | * @param desired The desired value for @a obj. |
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334 | * @param order The atomic order for storing the value. |
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335 | */ |
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336 | static inline void _CPU_atomic_Store_uintptr( CPU_atomic_Uintptr *obj, uintptr_t desired, CPU_atomic_Order order ) |
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337 | { |
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338 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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339 | obj->store( desired, order ); |
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340 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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341 | atomic_store_explicit( obj, desired, order ); |
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342 | #else |
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343 | (void) order; |
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344 | RTEMS_COMPILER_MEMORY_BARRIER(); |
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345 | *obj = desired; |
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346 | #endif |
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347 | } |
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348 | |
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349 | /** |
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350 | * @brief Fetches current value of Uint and adds a value to the stored value. |
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351 | * |
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352 | * @param[in, out] obj The CPU atomic Uint to get the value from and add @a arg to. |
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353 | * @param arg The value to add to @a obj. |
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354 | * @param order The atomic order for the operation. |
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355 | * |
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356 | * @return The value of @a obj prior to the addition of @a arg. |
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357 | */ |
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358 | static inline unsigned int _CPU_atomic_Fetch_add_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order ) |
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359 | { |
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360 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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361 | return obj->fetch_add( arg, order ); |
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362 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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363 | return atomic_fetch_add_explicit( obj, arg, order ); |
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364 | #else |
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365 | unsigned int val; |
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366 | ISR_Level level; |
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367 | |
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368 | (void) order; |
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369 | _ISR_Local_disable( level ); |
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370 | val = *obj; |
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371 | *obj = val + arg; |
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372 | _ISR_Local_enable( level ); |
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373 | |
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374 | return val; |
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375 | #endif |
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376 | } |
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377 | |
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378 | /** |
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379 | * @brief Fetches current value of Ulong and adds a value to the stored value. |
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380 | * |
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381 | * @param[in, out] obj The CPU atomic Ulong to get the value from and add @a arg to. |
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382 | * @param arg The value to add to @a obj. |
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383 | * @param order The atomic order for the operation. |
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384 | * |
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385 | * @return The value of @a obj prior to the addition of @a arg. |
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386 | */ |
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387 | static inline unsigned long _CPU_atomic_Fetch_add_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order ) |
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388 | { |
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389 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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390 | return obj->fetch_add( arg, order ); |
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391 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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392 | return atomic_fetch_add_explicit( obj, arg, order ); |
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393 | #else |
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394 | unsigned long val; |
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395 | ISR_Level level; |
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396 | |
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397 | (void) order; |
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398 | _ISR_Local_disable( level ); |
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399 | val = *obj; |
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400 | *obj = val + arg; |
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401 | _ISR_Local_enable( level ); |
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402 | |
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403 | return val; |
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404 | #endif |
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405 | } |
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406 | |
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407 | /** |
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408 | * @brief Fetches current value of Uintptr and adds a value to the stored value. |
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409 | * |
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410 | * @param[in, out] obj The CPU atomic Uintptr to get the value from and add @a arg to. |
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411 | * @param arg The value to add to @a obj. |
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412 | * @param order The atomic order for the operation. |
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413 | * |
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414 | * @return The value of @a obj prior to the addition of @a arg. |
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415 | */ |
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416 | static inline uintptr_t _CPU_atomic_Fetch_add_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order ) |
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417 | { |
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418 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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419 | return obj->fetch_add( arg, order ); |
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420 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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421 | return atomic_fetch_add_explicit( obj, arg, order ); |
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422 | #else |
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423 | uintptr_t val; |
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424 | ISR_Level level; |
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425 | |
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426 | (void) order; |
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427 | _ISR_Local_disable( level ); |
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428 | val = *obj; |
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429 | *obj = val + arg; |
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430 | _ISR_Local_enable( level ); |
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431 | |
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432 | return val; |
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433 | #endif |
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434 | } |
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435 | |
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436 | /** |
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437 | * @brief Fetches current value of Uint and subtracts a value from the stored value. |
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438 | * |
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439 | * @param[in, out] obj The CPU atomic Uint to get the value from and subtract @a arg from. |
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440 | * @param arg The value to subtract from @a obj. |
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441 | * @param order The atomic order for the operation. |
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442 | * |
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443 | * @return The value of @a obj prior to the subtraction of @a arg. |
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444 | */ |
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445 | static inline unsigned int _CPU_atomic_Fetch_sub_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order ) |
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446 | { |
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447 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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448 | return obj->fetch_sub( arg, order ); |
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449 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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450 | return atomic_fetch_sub_explicit( obj, arg, order ); |
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451 | #else |
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452 | unsigned int val; |
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453 | ISR_Level level; |
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454 | |
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455 | (void) order; |
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456 | _ISR_Local_disable( level ); |
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457 | val = *obj; |
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458 | *obj = val - arg; |
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459 | _ISR_Local_enable( level ); |
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460 | |
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461 | return val; |
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462 | #endif |
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463 | } |
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464 | |
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465 | /** |
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466 | * @brief Fetches current value of Ulong and subtracts a value from the stored value. |
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467 | * |
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468 | * @param[in, out] obj The CPU atomic Ulong to get the value from and subtract @a arg from. |
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469 | * @param arg The value to subtract from @a obj. |
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470 | * @param order The atomic order for the operation. |
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471 | * |
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472 | * @return The value of @a obj prior to the subtraction of @a arg. |
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473 | */ |
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474 | static inline unsigned long _CPU_atomic_Fetch_sub_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order ) |
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475 | { |
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476 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
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477 | return obj->fetch_sub( arg, order ); |
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478 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
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479 | return atomic_fetch_sub_explicit( obj, arg, order ); |
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480 | #else |
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481 | unsigned long val; |
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482 | ISR_Level level; |
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483 | |
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484 | (void) order; |
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485 | _ISR_Local_disable( level ); |
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486 | val = *obj; |
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487 | *obj = val - arg; |
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488 | _ISR_Local_enable( level ); |
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489 | |
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490 | return val; |
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491 | #endif |
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492 | } |
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493 | |
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494 | /** |
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495 | * @brief Fetches current value of Uintptr and subtracts a value from the stored value. |
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496 | * |
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497 | * @param[in, out] obj The CPU atomic Uintptr to get the value from and subtract @a arg from. |
---|
498 | * @param arg The value to subtract from @a obj. |
---|
499 | * @param order The atomic order for the operation. |
---|
500 | * |
---|
501 | * @return The value of @a obj prior to the subtraction of @a arg. |
---|
502 | */ |
---|
503 | static inline uintptr_t _CPU_atomic_Fetch_sub_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order ) |
---|
504 | { |
---|
505 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
506 | return obj->fetch_sub( arg, order ); |
---|
507 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
508 | return atomic_fetch_sub_explicit( obj, arg, order ); |
---|
509 | #else |
---|
510 | uintptr_t val; |
---|
511 | ISR_Level level; |
---|
512 | |
---|
513 | (void) order; |
---|
514 | _ISR_Local_disable( level ); |
---|
515 | val = *obj; |
---|
516 | *obj = val - arg; |
---|
517 | _ISR_Local_enable( level ); |
---|
518 | |
---|
519 | return val; |
---|
520 | #endif |
---|
521 | } |
---|
522 | |
---|
523 | /** |
---|
524 | * @brief Fetches current value of Uint and ORs a value with the stored value. |
---|
525 | * |
---|
526 | * @param[in, out] obj The CPU atomic Uint to get the value from and OR @a arg to. |
---|
527 | * @param arg The value to OR with @a obj. |
---|
528 | * @param order The atomic order for the operation. |
---|
529 | * |
---|
530 | * @return The value of @a obj prior to the OR operation with @a arg. |
---|
531 | */ |
---|
532 | static inline unsigned int _CPU_atomic_Fetch_or_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order ) |
---|
533 | { |
---|
534 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
535 | return obj->fetch_or( arg, order ); |
---|
536 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
537 | return atomic_fetch_or_explicit( obj, arg, order ); |
---|
538 | #else |
---|
539 | unsigned int val; |
---|
540 | ISR_Level level; |
---|
541 | |
---|
542 | (void) order; |
---|
543 | _ISR_Local_disable( level ); |
---|
544 | val = *obj; |
---|
545 | *obj = val | arg; |
---|
546 | _ISR_Local_enable( level ); |
---|
547 | |
---|
548 | return val; |
---|
549 | #endif |
---|
550 | } |
---|
551 | |
---|
552 | /** |
---|
553 | * @brief Fetches current value of Ulong and ORs a value with the stored value. |
---|
554 | * |
---|
555 | * @param[in, out] obj The CPU atomic Ulong to get the value from and OR @a arg to. |
---|
556 | * @param arg The value to OR with @a obj. |
---|
557 | * @param order The atomic order for the operation. |
---|
558 | * |
---|
559 | * @return The value of @a obj prior to the OR operation with @a arg. |
---|
560 | */ |
---|
561 | static inline unsigned long _CPU_atomic_Fetch_or_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order ) |
---|
562 | { |
---|
563 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
564 | return obj->fetch_or( arg, order ); |
---|
565 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
566 | return atomic_fetch_or_explicit( obj, arg, order ); |
---|
567 | #else |
---|
568 | unsigned long val; |
---|
569 | ISR_Level level; |
---|
570 | |
---|
571 | (void) order; |
---|
572 | _ISR_Local_disable( level ); |
---|
573 | val = *obj; |
---|
574 | *obj = val | arg; |
---|
575 | _ISR_Local_enable( level ); |
---|
576 | |
---|
577 | return val; |
---|
578 | #endif |
---|
579 | } |
---|
580 | |
---|
581 | /** |
---|
582 | * @brief Fetches current value of Uintptr and ORs a value with the stored value. |
---|
583 | * |
---|
584 | * @param[in, out] obj The CPU atomic Uintptr to get the value from and OR @a arg to. |
---|
585 | * @param arg The value to OR with @a obj. |
---|
586 | * @param order The atomic order for the operation. |
---|
587 | * |
---|
588 | * @return The value of @a obj prior to the OR operation with @a arg. |
---|
589 | */ |
---|
590 | static inline uintptr_t _CPU_atomic_Fetch_or_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order ) |
---|
591 | { |
---|
592 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
593 | return obj->fetch_or( arg, order ); |
---|
594 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
595 | return atomic_fetch_or_explicit( obj, arg, order ); |
---|
596 | #else |
---|
597 | uintptr_t val; |
---|
598 | ISR_Level level; |
---|
599 | |
---|
600 | (void) order; |
---|
601 | _ISR_Local_disable( level ); |
---|
602 | val = *obj; |
---|
603 | *obj = val | arg; |
---|
604 | _ISR_Local_enable( level ); |
---|
605 | |
---|
606 | return val; |
---|
607 | #endif |
---|
608 | } |
---|
609 | |
---|
610 | /** |
---|
611 | * @brief Fetches current value of Uint and ANDs a value with the stored value. |
---|
612 | * |
---|
613 | * @param[in, out] obj The CPU atomic Uint to get the value from and AND @a arg to. |
---|
614 | * @param arg The value to AND with @a obj. |
---|
615 | * @param order The atomic order for the operation. |
---|
616 | * |
---|
617 | * @return The value of @a obj prior to the AND operation with @a arg. |
---|
618 | */ |
---|
619 | static inline unsigned int _CPU_atomic_Fetch_and_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order ) |
---|
620 | { |
---|
621 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
622 | return obj->fetch_and( arg, order ); |
---|
623 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
624 | return atomic_fetch_and_explicit( obj, arg, order ); |
---|
625 | #else |
---|
626 | unsigned int val; |
---|
627 | ISR_Level level; |
---|
628 | |
---|
629 | (void) order; |
---|
630 | _ISR_Local_disable( level ); |
---|
631 | val = *obj; |
---|
632 | *obj = val & arg; |
---|
633 | _ISR_Local_enable( level ); |
---|
634 | |
---|
635 | return val; |
---|
636 | #endif |
---|
637 | } |
---|
638 | |
---|
639 | /** |
---|
640 | * @brief Fetches current value of Ulong and ANDs a value with the stored value. |
---|
641 | * |
---|
642 | * @param[in, out] obj The CPU atomic Ulong to get the value from and AND @a arg to. |
---|
643 | * @param arg The value to AND with @a obj. |
---|
644 | * @param order The atomic order for the operation. |
---|
645 | * |
---|
646 | * @return The value of @a obj prior to the AND operation with @a arg. |
---|
647 | */ |
---|
648 | static inline unsigned long _CPU_atomic_Fetch_and_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order ) |
---|
649 | { |
---|
650 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
651 | return obj->fetch_and( arg, order ); |
---|
652 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
653 | return atomic_fetch_and_explicit( obj, arg, order ); |
---|
654 | #else |
---|
655 | unsigned long val; |
---|
656 | ISR_Level level; |
---|
657 | |
---|
658 | (void) order; |
---|
659 | _ISR_Local_disable( level ); |
---|
660 | val = *obj; |
---|
661 | *obj = val & arg; |
---|
662 | _ISR_Local_enable( level ); |
---|
663 | |
---|
664 | return val; |
---|
665 | #endif |
---|
666 | } |
---|
667 | |
---|
668 | /** |
---|
669 | * @brief Fetches current value of Uintptr and ANDs a value with the stored value. |
---|
670 | * |
---|
671 | * @param[in, out] obj The CPU atomic Uintptr to get the value from and AND @a arg to. |
---|
672 | * @param arg The value to AND with @a obj. |
---|
673 | * @param order The atomic order for the operation. |
---|
674 | * |
---|
675 | * @return The value of @a obj prior to the AND operation with @a arg. |
---|
676 | */ |
---|
677 | static inline uintptr_t _CPU_atomic_Fetch_and_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order ) |
---|
678 | { |
---|
679 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
680 | return obj->fetch_and( arg, order ); |
---|
681 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
682 | return atomic_fetch_and_explicit( obj, arg, order ); |
---|
683 | #else |
---|
684 | uintptr_t val; |
---|
685 | ISR_Level level; |
---|
686 | |
---|
687 | (void) order; |
---|
688 | _ISR_Local_disable( level ); |
---|
689 | val = *obj; |
---|
690 | *obj = val & arg; |
---|
691 | _ISR_Local_enable( level ); |
---|
692 | |
---|
693 | return val; |
---|
694 | #endif |
---|
695 | } |
---|
696 | |
---|
697 | /** |
---|
698 | * @brief Fetches current value of Uint and sets its value. |
---|
699 | * |
---|
700 | * @param[in, out] obj The CPU atomic Uint to get the value from and set the value to @a desired. |
---|
701 | * @param arg The value to set for @a obj. |
---|
702 | * @param order The atomic order for the operation. |
---|
703 | * |
---|
704 | * @return The value of @a obj prior to the exchange with @a desired. |
---|
705 | */ |
---|
706 | static inline unsigned int _CPU_atomic_Exchange_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order ) |
---|
707 | { |
---|
708 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
709 | return obj->exchange( desired, order ); |
---|
710 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
711 | return atomic_exchange_explicit( obj, desired, order ); |
---|
712 | #else |
---|
713 | unsigned int val; |
---|
714 | ISR_Level level; |
---|
715 | |
---|
716 | (void) order; |
---|
717 | _ISR_Local_disable( level ); |
---|
718 | val = *obj; |
---|
719 | *obj = desired; |
---|
720 | _ISR_Local_enable( level ); |
---|
721 | |
---|
722 | return val; |
---|
723 | #endif |
---|
724 | } |
---|
725 | |
---|
726 | /** |
---|
727 | * @brief Fetches current value of Ulong and sets its value. |
---|
728 | * |
---|
729 | * @param[in, out] obj The CPU atomic Ulong to get the value from and set the value to @a desired. |
---|
730 | * @param arg The value to set for @a obj. |
---|
731 | * @param order The atomic order for the operation. |
---|
732 | * |
---|
733 | * @return The value of @a obj prior to the exchange with @a desired. |
---|
734 | */ |
---|
735 | static inline unsigned long _CPU_atomic_Exchange_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order ) |
---|
736 | { |
---|
737 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
738 | return obj->exchange( desired, order ); |
---|
739 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
740 | return atomic_exchange_explicit( obj, desired, order ); |
---|
741 | #else |
---|
742 | unsigned long val; |
---|
743 | ISR_Level level; |
---|
744 | |
---|
745 | (void) order; |
---|
746 | _ISR_Local_disable( level ); |
---|
747 | val = *obj; |
---|
748 | *obj = desired; |
---|
749 | _ISR_Local_enable( level ); |
---|
750 | |
---|
751 | return val; |
---|
752 | #endif |
---|
753 | } |
---|
754 | |
---|
755 | /** |
---|
756 | * @brief Fetches current value of Uintptr and sets its value. |
---|
757 | * |
---|
758 | * @param[in, out] obj The CPU atomic Uintptr to get the value from and set the value to @a desired. |
---|
759 | * @param arg The value to set for @a obj. |
---|
760 | * @param order The atomic order for the operation. |
---|
761 | * |
---|
762 | * @return The value of @a obj prior to the exchange with @a desired. |
---|
763 | */ |
---|
764 | static inline uintptr_t _CPU_atomic_Exchange_uintptr( CPU_atomic_Uintptr *obj, uintptr_t desired, CPU_atomic_Order order ) |
---|
765 | { |
---|
766 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
767 | return obj->exchange( desired, order ); |
---|
768 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
769 | return atomic_exchange_explicit( obj, desired, order ); |
---|
770 | #else |
---|
771 | uintptr_t val; |
---|
772 | ISR_Level level; |
---|
773 | |
---|
774 | (void) order; |
---|
775 | _ISR_Local_disable( level ); |
---|
776 | val = *obj; |
---|
777 | *obj = desired; |
---|
778 | _ISR_Local_enable( level ); |
---|
779 | |
---|
780 | return val; |
---|
781 | #endif |
---|
782 | } |
---|
783 | |
---|
784 | /** |
---|
785 | * @brief Checks if value of Uint is as expected. |
---|
786 | * |
---|
787 | * This method checks if the value of @a obj is equal to the value of @a expected. If |
---|
788 | * this is the case, the value of @a obj is changed to @a desired. Otherwise, the value |
---|
789 | * of @a obj is changed to @a expected. |
---|
790 | * |
---|
791 | * @param[in, out] obj The CPU atomic Uint to operate upon. |
---|
792 | * @param[in, out] expected The expected value of @a obj. If @a obj has a different |
---|
793 | * value, @a expected is changed to the actual value of @a obj. |
---|
794 | * @param desired The new value of @a obj if the old value of @a obj was as expected. |
---|
795 | * @param succ The order if it is successful. |
---|
796 | * @param fail The order if it fails. |
---|
797 | * |
---|
798 | * @retval true The old value of @a obj was as expected. |
---|
799 | * @retval false The old value of @a obj was not as expected. |
---|
800 | */ |
---|
801 | static inline bool _CPU_atomic_Compare_exchange_uint( CPU_atomic_Uint *obj, unsigned int *expected, unsigned int desired, CPU_atomic_Order succ, CPU_atomic_Order fail ) |
---|
802 | { |
---|
803 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
804 | return obj->compare_exchange_strong( *expected, desired, succ, fail ); |
---|
805 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
806 | return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail ); |
---|
807 | #else |
---|
808 | bool success; |
---|
809 | ISR_Level level; |
---|
810 | unsigned int actual; |
---|
811 | |
---|
812 | (void) succ; |
---|
813 | (void) fail; |
---|
814 | _ISR_Local_disable( level ); |
---|
815 | actual = *obj; |
---|
816 | success = ( actual == *expected ); |
---|
817 | if ( success ) { |
---|
818 | *obj = desired; |
---|
819 | } else { |
---|
820 | *expected = actual; |
---|
821 | } |
---|
822 | _ISR_Local_enable( level ); |
---|
823 | |
---|
824 | return success; |
---|
825 | #endif |
---|
826 | } |
---|
827 | |
---|
828 | /** |
---|
829 | * @brief Checks if value of Ulong is as expected. |
---|
830 | * |
---|
831 | * This method checks if the value of @a obj is equal to the value of @a expected. If |
---|
832 | * this is the case, the value of @a obj is changed to @a desired. Otherwise, the value |
---|
833 | * of @a obj is changed to @a expected. |
---|
834 | * |
---|
835 | * @param[in, out] obj The CPU atomic Ulong to operate upon. |
---|
836 | * @param[in, out] expected The expected value of @a obj. If @a obj has a different |
---|
837 | * value, @a expected is changed to the actual value of @a obj. |
---|
838 | * @param desired The new value of @a obj if the old value of @a obj was as expected. |
---|
839 | * @param succ The order if it is successful. |
---|
840 | * @param fail The order if it fails. |
---|
841 | * |
---|
842 | * @retval true The old value of @a obj was as expected. |
---|
843 | * @retval false The old value of @a obj was not as expected. |
---|
844 | */ |
---|
845 | static inline bool _CPU_atomic_Compare_exchange_ulong( CPU_atomic_Ulong *obj, unsigned long *expected, unsigned long desired, CPU_atomic_Order succ, CPU_atomic_Order fail ) |
---|
846 | { |
---|
847 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
848 | return obj->compare_exchange_strong( *expected, desired, succ, fail ); |
---|
849 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
850 | return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail ); |
---|
851 | #else |
---|
852 | bool success; |
---|
853 | ISR_Level level; |
---|
854 | unsigned long actual; |
---|
855 | |
---|
856 | (void) succ; |
---|
857 | (void) fail; |
---|
858 | _ISR_Local_disable( level ); |
---|
859 | actual = *obj; |
---|
860 | success = ( actual == *expected ); |
---|
861 | if ( success ) { |
---|
862 | *obj = desired; |
---|
863 | } else { |
---|
864 | *expected = actual; |
---|
865 | } |
---|
866 | _ISR_Local_enable( level ); |
---|
867 | |
---|
868 | return success; |
---|
869 | #endif |
---|
870 | } |
---|
871 | |
---|
872 | /** |
---|
873 | * @brief Checks if value of Uintptr is as expected. |
---|
874 | * |
---|
875 | * This method checks if the value of @a obj is equal to the value of @a expected. If |
---|
876 | * this is the case, the value of @a obj is changed to @a desired. Otherwise, the value |
---|
877 | * of @a obj is changed to @a expected. |
---|
878 | * |
---|
879 | * @param[in, out] obj The CPU atomic Uintptr to operate upon. |
---|
880 | * @param[in, out] expected The expected value of @a obj. If @a obj has a different |
---|
881 | * value, @a expected is changed to the actual value of @a obj. |
---|
882 | * @param desired The new value of @a obj if the old value of @a obj was as expected. |
---|
883 | * @param succ The order if it is successful. |
---|
884 | * @param fail The order if it fails. |
---|
885 | * |
---|
886 | * @retval true The old value of @a obj was as expected. |
---|
887 | * @retval false The old value of @a obj was not as expected. |
---|
888 | */ |
---|
889 | static inline bool _CPU_atomic_Compare_exchange_uintptr( CPU_atomic_Uintptr *obj, uintptr_t *expected, uintptr_t desired, CPU_atomic_Order succ, CPU_atomic_Order fail ) |
---|
890 | { |
---|
891 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
892 | return obj->compare_exchange_strong( *expected, desired, succ, fail ); |
---|
893 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
894 | return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail ); |
---|
895 | #else |
---|
896 | bool success; |
---|
897 | ISR_Level level; |
---|
898 | uintptr_t actual; |
---|
899 | |
---|
900 | (void) succ; |
---|
901 | (void) fail; |
---|
902 | _ISR_Local_disable( level ); |
---|
903 | actual = *obj; |
---|
904 | success = ( actual == *expected ); |
---|
905 | if ( success ) { |
---|
906 | *obj = desired; |
---|
907 | } else { |
---|
908 | *expected = actual; |
---|
909 | } |
---|
910 | _ISR_Local_enable( level ); |
---|
911 | |
---|
912 | return success; |
---|
913 | #endif |
---|
914 | } |
---|
915 | |
---|
916 | /** |
---|
917 | * @brief Clears the atomic flag. |
---|
918 | * |
---|
919 | * @param[out] obj The atomic flag to be cleared. |
---|
920 | * @param order The atomic order for the operation. |
---|
921 | */ |
---|
922 | static inline void _CPU_atomic_Flag_clear( CPU_atomic_Flag *obj, CPU_atomic_Order order ) |
---|
923 | { |
---|
924 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
925 | obj->clear( order ); |
---|
926 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
927 | atomic_flag_clear_explicit( obj, order ); |
---|
928 | #else |
---|
929 | (void) order; |
---|
930 | *obj = false; |
---|
931 | #endif |
---|
932 | } |
---|
933 | |
---|
934 | /** |
---|
935 | * @brief Returns current flag state and sets it. |
---|
936 | * |
---|
937 | * @param[in, out] obj The atomic flag to be set. |
---|
938 | * @param order The atomic order for the operation. |
---|
939 | * |
---|
940 | * @retval true @a obj was set prior to this operation. |
---|
941 | * @retval false @a obj was not set prior to this operation. |
---|
942 | */ |
---|
943 | static inline bool _CPU_atomic_Flag_test_and_set( CPU_atomic_Flag *obj, CPU_atomic_Order order ) |
---|
944 | { |
---|
945 | #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC) |
---|
946 | return obj->test_and_set( order ); |
---|
947 | #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC) |
---|
948 | return atomic_flag_test_and_set_explicit( obj, order ); |
---|
949 | #else |
---|
950 | bool flag; |
---|
951 | ISR_Level level; |
---|
952 | |
---|
953 | (void) order; |
---|
954 | _ISR_Local_disable( level ); |
---|
955 | flag = *obj; |
---|
956 | *obj = true; |
---|
957 | _ISR_Local_enable( level ); |
---|
958 | |
---|
959 | return flag; |
---|
960 | #endif |
---|
961 | } |
---|
962 | |
---|
963 | /** @} */ |
---|
964 | |
---|
965 | #endif /* _RTEMS_SCORE_CPUSTDATOMIC_H */ |
---|