source: rtems/cpukit/include/dev/serial/sc16is752.h @ bf70702

5
Last change on this file since bf70702 was bf70702, checked in by Christian Mauderer <christian.mauderer@…>, on 02/09/18 at 07:59:27

dev/sc16is752: Add GPIO access via ioctl.

  • Property mode set to 100644
File size: 6.0 KB
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[9edc7301]1/*
2 * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
3 *
4 *  embedded brains GmbH
5 *  Dornierstr. 4
6 *  82178 Puchheim
7 *  Germany
8 *  <info@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
12 * http://www.rtems.org/license/LICENSE.
13 */
14
15#ifndef _DEV_SERIAL_SC16IS752_H
16#define _DEV_SERIAL_SC16IS752_H
17
18#include <sys/ioccom.h>
19
20#include <rtems/termiostypes.h>
21
22#ifdef __cplusplus
23extern "C" {
24#endif /* __cplusplus */
25
26/**
27 * @defgroup SC16IS752 SC16IS752 Serial Device Driver
28 *
29 * @ingroup TermiostypesSupport
30 */
31
32typedef enum {
33  SC16IS752_MODE_RS232,
34  SC16IS752_MODE_RS485
35} sc16is752_mode;
36
37typedef struct sc16is752_context sc16is752_context;
38
39/**
40 * @brief SC16IS752 device context.
41 */
42struct sc16is752_context {
43  rtems_termios_device_context base;
44
45  /**
46   * @brief Writes a register.
47   *
48   * Internal handler.
49   */
50  int (*write_reg)(
51    sc16is752_context *ctx,
52    uint8_t addr,
53    const uint8_t *data,
54    size_t len
55  );
56
57  /**
58   * @brief Reads a register.
59   *
60   * Internal handler.
61   */
62  int (*read_reg)(
63    sc16is752_context *ctx,
64    uint8_t addr,
65    uint8_t *data,
66    size_t len
67  );
68
69  /**
70   * @brief Reads two registers.
71   *
72   * Internal handler.
73   */
74  int (*read_2_reg)(
75    sc16is752_context *ctx,
76    uint8_t addr_0,
77    uint8_t addr_1,
78    uint8_t data[2]
79  );
80
81  /**
82   * @brief First open.
83   *
84   * Internal handler.
85   */
86  bool (*first_open)(sc16is752_context *ctx);
87
88  /**
89   * @brief Last close.
90   *
91   * Internal handler.
92   */
93  void (*last_close)(sc16is752_context *ctx);
94
95  /**
96   * @brief Shall install the interrupt handler.
97   *
98   * Must be initialized by the user before the device creation.
99   */
100  bool (*install_irq)(sc16is752_context *ctx);
101
102  /**
103   * @brief Shall remove the interrupt handler.
104   *
105   * Must be initialized by the user before the device creation.
106   */
107  void (*remove_irq)(sc16is752_context *ctx);
108
109  /**
110   * @brief Device mode.
111   *
112   * Must be initialized by the user before the device creation.
113   */
114  sc16is752_mode mode;
115
116  /**
117   * @brief Input frequency in Hertz (dependent on crystal, see XTAL1 and XTAL2
118   * pins).
119   *
120   * Must be initialized by the user before the device creation.
121   */
122  uint32_t input_frequency;
123
124  /**
125   * @brief Corresponding Termios structure.
126   *
127   * Internal variable.
128   */
129  rtems_termios_tty *tty;
130
131  /**
132   * @brief Shadow Interrupt Enable Register (IER).
133   *
134   * Internal variable.
135   */
136  uint8_t ier;
137
138  /**
139   * @brief Characters placed into transmit FIFO.
140   *
141   * Internal variable.
142   */
143  uint8_t tx_in_progress;
144
145  /**
146   * @brief Count of free characters in the transmit FIFO.
147   *
148   * Internal variable.
149   */
150  uint8_t tx_fifo_free;
151
152  /**
153   * @brief Shadow Line Control Register (LCR).
154   *
155   * Internal variable.
156   */
157  uint8_t lcr;
158
159  /**
160   * @brief Shadow Extra Features Control Register (EFCR).
161   *
162   * Internal variable.
163   */
164  uint8_t efcr;
165};
166
167/**
168 * @brief SC16IS752 SPI context.
169 */
170typedef struct {
171  sc16is752_context base;
172
173  /**
174   * @brief The SPI bus device file descriptor.
175   *
176   * Internal variable.
177   */
178  int fd;
179
180  /**
181   * @brief The SPI device chip select.
182   *
183   * Must be initialized by the user before the call to sc16is752_spi_create().
184   */
185  uint8_t cs;
186
187  /**
188   * @brief The SPI bus speed in Hertz.
189   *
190   * Must be initialized by the user before the call to sc16is752_spi_create().
191   */
192  uint32_t speed_hz;
193
194  /**
195   * @brief The SPI bus device path.
196   *
197   * Must be initialized by the user before the call to sc16is752_spi_create().
198   */
199  const char *spi_path;
200} sc16is752_spi_context;
201
202/**
203 * @brief SC16IS752 I2C context.
204 */
205typedef struct {
206  sc16is752_context base;
207
208  /**
209   * @brief The I2C bus device file descriptor.
210   *
211   * Internal variable.
212   */
213  int fd;
214
215  /**
216   * @brief The I2C bus device path.
217   *
218   * Must be initialized before the call to sc16is752_i2c_create().
219   */
220  const char *bus_path;
221} sc16is752_i2c_context;
222
223const rtems_termios_device_handler sc16is752_termios_handler;
224
225/**
226 * @brief The interrupt handler for receive and transmit operations.
227 *
228 * @param[in] arg The device context.
229 */
230void sc16is752_interrupt_handler(void *arg);
231
232/**
233 * @brief Creates an SPI connected SC16IS752 device.
234 *
235 * @param[in] ctx The SPI SC16IS752 device context.
236 * @param[in] device_path The device file path for the new device.
237 *
238 * @retval RTEMS_SUCCESSFUL Successful operation.
239 * @retval other See rtems_termios_device_install().
240 */
241rtems_status_code sc16is752_spi_create(
242  sc16is752_spi_context *ctx,
243  const char            *device_path
244);
245
246/**
247 * @brief Enables the sleep mode if non-zero, otherwise disables it.
248 *
249 * The sleep mode is disabled by default.
250 */
251#define SC16IS752_SET_SLEEP_MODE _IOW('d', 0, int)
252
[bf70702]253/**
254 * @brief Set the I/O Control bits except for the SRESET.
255 *
256 * Note that it will not be possible to set the SRESET. Otherwise the driver
257 * might would have an undefined state.
258 */
259#define SC16IS752_SET_IOCONTROL _IOW('d', 1, uint8_t)
260
261/**
262 * @brief Set the I/O pins direction register.
263 */
264#define SC16IS752_SET_IODIR _IOW('d', 2, uint8_t)
265
266/**
267 * @brief Set the I/O pins state register.
268 */
269#define SC16IS752_SET_IOSTATE _IOW('d', 3, uint8_t)
270
[9edc7301]271/**
272 * @brief Returns non-zero in case the sleep mode is enabled, otherwise zero.
273 */
274#define SC16IS752_GET_SLEEP_MODE _IOR('d', 0, int)
275
[bf70702]276/**
277 * @brief Read the I/O Control register.
278 */
279#define SC16IS752_GET_IOCONTROL _IOR('d', 1, uint8_t)
280
281/**
282 * @brief Read the I/O pins direction register.
283 */
284#define SC16IS752_GET_IODIR _IOR('d', 2, uint8_t)
285
286/**
287 * @brief Read the I/O pins state register.
288 */
289#define SC16IS752_GET_IOSTATE _IOR('d', 3, uint8_t)
290
291/**
292 * @brief Bits for the IOCONTROL register.
293 * @{
294 */
295#define SC16IS752_IOCONTROL_SRESET (1u << 3)
296#define SC16IS752_IOCONTROL_GPIO_3_0_OR_MODEM (1u << 2)
297#define SC16IS752_IOCONTROL_GPIO_7_4_OR_MODEM (1u << 1)
298#define SC16IS752_IOCONTROL_IOLATCH (1u << 0)
299/**
300 * @}
301 */
302
[9edc7301]303#ifdef __cplusplus
304}
305#endif /* __cplusplus */
306
307#endif /* _DEV_SERIAL_SC16IS752_H */
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