[9edc7301] | 1 | /* |
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| 2 | * Copyright (c) 2016 embedded brains GmbH. All rights reserved. |
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| 3 | * |
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| 4 | * embedded brains GmbH |
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| 5 | * Dornierstr. 4 |
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| 6 | * 82178 Puchheim |
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| 7 | * Germany |
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| 8 | * <info@embedded-brains.de> |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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| 12 | * http://www.rtems.org/license/LICENSE. |
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| 13 | */ |
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| 14 | |
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| 15 | #ifndef _DEV_SERIAL_SC16IS752_H |
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| 16 | #define _DEV_SERIAL_SC16IS752_H |
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| 17 | |
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| 18 | #include <sys/ioccom.h> |
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| 19 | |
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| 20 | #include <rtems/termiostypes.h> |
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| 21 | |
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| 22 | #ifdef __cplusplus |
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| 23 | extern "C" { |
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| 24 | #endif /* __cplusplus */ |
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| 25 | |
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| 26 | /** |
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| 27 | * @defgroup SC16IS752 SC16IS752 Serial Device Driver |
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| 28 | * |
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| 29 | * @ingroup TermiostypesSupport |
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| 30 | */ |
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| 31 | |
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| 32 | typedef enum { |
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| 33 | SC16IS752_MODE_RS232, |
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| 34 | SC16IS752_MODE_RS485 |
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| 35 | } sc16is752_mode; |
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| 36 | |
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| 37 | typedef struct sc16is752_context sc16is752_context; |
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| 38 | |
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| 39 | /** |
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| 40 | * @brief SC16IS752 device context. |
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| 41 | */ |
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| 42 | struct sc16is752_context { |
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| 43 | rtems_termios_device_context base; |
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| 44 | |
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| 45 | /** |
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| 46 | * @brief Writes a register. |
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| 47 | * |
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| 48 | * Internal handler. |
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| 49 | */ |
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| 50 | int (*write_reg)( |
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| 51 | sc16is752_context *ctx, |
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| 52 | uint8_t addr, |
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| 53 | const uint8_t *data, |
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| 54 | size_t len |
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| 55 | ); |
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| 56 | |
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| 57 | /** |
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| 58 | * @brief Reads a register. |
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| 59 | * |
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| 60 | * Internal handler. |
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| 61 | */ |
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| 62 | int (*read_reg)( |
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| 63 | sc16is752_context *ctx, |
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| 64 | uint8_t addr, |
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| 65 | uint8_t *data, |
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| 66 | size_t len |
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| 67 | ); |
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| 68 | |
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| 69 | /** |
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| 70 | * @brief Reads two registers. |
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| 71 | * |
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| 72 | * Internal handler. |
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| 73 | */ |
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| 74 | int (*read_2_reg)( |
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| 75 | sc16is752_context *ctx, |
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| 76 | uint8_t addr_0, |
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| 77 | uint8_t addr_1, |
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| 78 | uint8_t data[2] |
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| 79 | ); |
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| 80 | |
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| 81 | /** |
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| 82 | * @brief First open. |
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| 83 | * |
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| 84 | * Internal handler. |
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| 85 | */ |
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| 86 | bool (*first_open)(sc16is752_context *ctx); |
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| 87 | |
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| 88 | /** |
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| 89 | * @brief Last close. |
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| 90 | * |
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| 91 | * Internal handler. |
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| 92 | */ |
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| 93 | void (*last_close)(sc16is752_context *ctx); |
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| 94 | |
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| 95 | /** |
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| 96 | * @brief Shall install the interrupt handler. |
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| 97 | * |
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| 98 | * Must be initialized by the user before the device creation. |
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| 99 | */ |
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| 100 | bool (*install_irq)(sc16is752_context *ctx); |
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| 101 | |
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| 102 | /** |
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| 103 | * @brief Shall remove the interrupt handler. |
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| 104 | * |
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| 105 | * Must be initialized by the user before the device creation. |
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| 106 | */ |
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| 107 | void (*remove_irq)(sc16is752_context *ctx); |
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| 108 | |
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| 109 | /** |
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| 110 | * @brief Device mode. |
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| 111 | * |
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| 112 | * Must be initialized by the user before the device creation. |
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| 113 | */ |
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| 114 | sc16is752_mode mode; |
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| 115 | |
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| 116 | /** |
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| 117 | * @brief Input frequency in Hertz (dependent on crystal, see XTAL1 and XTAL2 |
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| 118 | * pins). |
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| 119 | * |
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| 120 | * Must be initialized by the user before the device creation. |
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| 121 | */ |
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| 122 | uint32_t input_frequency; |
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| 123 | |
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| 124 | /** |
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| 125 | * @brief Corresponding Termios structure. |
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| 126 | * |
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| 127 | * Internal variable. |
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| 128 | */ |
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| 129 | rtems_termios_tty *tty; |
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| 130 | |
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| 131 | /** |
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| 132 | * @brief Shadow Interrupt Enable Register (IER). |
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| 133 | * |
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| 134 | * Internal variable. |
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| 135 | */ |
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| 136 | uint8_t ier; |
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| 137 | |
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| 138 | /** |
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| 139 | * @brief Characters placed into transmit FIFO. |
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| 140 | * |
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| 141 | * Internal variable. |
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| 142 | */ |
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| 143 | uint8_t tx_in_progress; |
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| 144 | |
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| 145 | /** |
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| 146 | * @brief Count of free characters in the transmit FIFO. |
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| 147 | * |
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| 148 | * Internal variable. |
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| 149 | */ |
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| 150 | uint8_t tx_fifo_free; |
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| 151 | |
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| 152 | /** |
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| 153 | * @brief Shadow Line Control Register (LCR). |
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| 154 | * |
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| 155 | * Internal variable. |
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| 156 | */ |
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| 157 | uint8_t lcr; |
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| 158 | |
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| 159 | /** |
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| 160 | * @brief Shadow Extra Features Control Register (EFCR). |
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| 161 | * |
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| 162 | * Internal variable. |
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| 163 | */ |
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| 164 | uint8_t efcr; |
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| 165 | }; |
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| 166 | |
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| 167 | /** |
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| 168 | * @brief SC16IS752 SPI context. |
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| 169 | */ |
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| 170 | typedef struct { |
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| 171 | sc16is752_context base; |
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| 172 | |
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| 173 | /** |
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| 174 | * @brief The SPI bus device file descriptor. |
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| 175 | * |
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| 176 | * Internal variable. |
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| 177 | */ |
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| 178 | int fd; |
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| 179 | |
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| 180 | /** |
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| 181 | * @brief The SPI device chip select. |
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| 182 | * |
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| 183 | * Must be initialized by the user before the call to sc16is752_spi_create(). |
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| 184 | */ |
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| 185 | uint8_t cs; |
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| 186 | |
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| 187 | /** |
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| 188 | * @brief The SPI bus speed in Hertz. |
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| 189 | * |
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| 190 | * Must be initialized by the user before the call to sc16is752_spi_create(). |
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| 191 | */ |
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| 192 | uint32_t speed_hz; |
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| 193 | |
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| 194 | /** |
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| 195 | * @brief The SPI bus device path. |
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| 196 | * |
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| 197 | * Must be initialized by the user before the call to sc16is752_spi_create(). |
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| 198 | */ |
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| 199 | const char *spi_path; |
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| 200 | } sc16is752_spi_context; |
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| 201 | |
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| 202 | /** |
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| 203 | * @brief SC16IS752 I2C context. |
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| 204 | */ |
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| 205 | typedef struct { |
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| 206 | sc16is752_context base; |
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| 207 | |
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| 208 | /** |
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| 209 | * @brief The I2C bus device file descriptor. |
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| 210 | * |
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| 211 | * Internal variable. |
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| 212 | */ |
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| 213 | int fd; |
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| 214 | |
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| 215 | /** |
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| 216 | * @brief The I2C bus device path. |
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| 217 | * |
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| 218 | * Must be initialized before the call to sc16is752_i2c_create(). |
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| 219 | */ |
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| 220 | const char *bus_path; |
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| 221 | } sc16is752_i2c_context; |
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| 222 | |
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| 223 | const rtems_termios_device_handler sc16is752_termios_handler; |
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| 224 | |
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| 225 | /** |
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| 226 | * @brief The interrupt handler for receive and transmit operations. |
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| 227 | * |
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| 228 | * @param[in] arg The device context. |
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| 229 | */ |
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| 230 | void sc16is752_interrupt_handler(void *arg); |
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| 231 | |
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| 232 | /** |
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| 233 | * @brief Creates an SPI connected SC16IS752 device. |
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| 234 | * |
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| 235 | * @param[in] ctx The SPI SC16IS752 device context. |
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| 236 | * @param[in] device_path The device file path for the new device. |
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| 237 | * |
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| 238 | * @retval RTEMS_SUCCESSFUL Successful operation. |
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| 239 | * @retval other See rtems_termios_device_install(). |
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| 240 | */ |
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| 241 | rtems_status_code sc16is752_spi_create( |
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| 242 | sc16is752_spi_context *ctx, |
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| 243 | const char *device_path |
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| 244 | ); |
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| 245 | |
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| 246 | /** |
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| 247 | * @brief Enables the sleep mode if non-zero, otherwise disables it. |
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| 248 | * |
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| 249 | * The sleep mode is disabled by default. |
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| 250 | */ |
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| 251 | #define SC16IS752_SET_SLEEP_MODE _IOW('d', 0, int) |
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| 252 | |
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[bf70702] | 253 | /** |
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| 254 | * @brief Set the I/O Control bits except for the SRESET. |
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| 255 | * |
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| 256 | * Note that it will not be possible to set the SRESET. Otherwise the driver |
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| 257 | * might would have an undefined state. |
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| 258 | */ |
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| 259 | #define SC16IS752_SET_IOCONTROL _IOW('d', 1, uint8_t) |
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| 260 | |
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| 261 | /** |
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| 262 | * @brief Set the I/O pins direction register. |
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| 263 | */ |
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| 264 | #define SC16IS752_SET_IODIR _IOW('d', 2, uint8_t) |
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| 265 | |
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| 266 | /** |
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| 267 | * @brief Set the I/O pins state register. |
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| 268 | */ |
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| 269 | #define SC16IS752_SET_IOSTATE _IOW('d', 3, uint8_t) |
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| 270 | |
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[9edc7301] | 271 | /** |
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| 272 | * @brief Returns non-zero in case the sleep mode is enabled, otherwise zero. |
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| 273 | */ |
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| 274 | #define SC16IS752_GET_SLEEP_MODE _IOR('d', 0, int) |
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| 275 | |
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[bf70702] | 276 | /** |
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| 277 | * @brief Read the I/O Control register. |
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| 278 | */ |
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| 279 | #define SC16IS752_GET_IOCONTROL _IOR('d', 1, uint8_t) |
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| 280 | |
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| 281 | /** |
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| 282 | * @brief Read the I/O pins direction register. |
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| 283 | */ |
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| 284 | #define SC16IS752_GET_IODIR _IOR('d', 2, uint8_t) |
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| 285 | |
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| 286 | /** |
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| 287 | * @brief Read the I/O pins state register. |
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| 288 | */ |
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| 289 | #define SC16IS752_GET_IOSTATE _IOR('d', 3, uint8_t) |
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| 290 | |
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| 291 | /** |
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| 292 | * @brief Bits for the IOCONTROL register. |
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| 293 | * @{ |
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| 294 | */ |
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| 295 | #define SC16IS752_IOCONTROL_SRESET (1u << 3) |
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| 296 | #define SC16IS752_IOCONTROL_GPIO_3_0_OR_MODEM (1u << 2) |
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| 297 | #define SC16IS752_IOCONTROL_GPIO_7_4_OR_MODEM (1u << 1) |
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| 298 | #define SC16IS752_IOCONTROL_IOLATCH (1u << 0) |
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| 299 | /** |
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| 300 | * @} |
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| 301 | */ |
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| 302 | |
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[9edc7301] | 303 | #ifdef __cplusplus |
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| 304 | } |
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| 305 | #endif /* __cplusplus */ |
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| 306 | |
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| 307 | #endif /* _DEV_SERIAL_SC16IS752_H */ |
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