[41c5f1b7] | 1 | /** |
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| 2 | * @file |
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| 3 | * |
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| 4 | * @brief Inter-Integrated Circuit (I2C) Bus Implementation |
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| 5 | * |
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| 6 | * @ingroup I2CBus |
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| 7 | */ |
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| 8 | |
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| 9 | /* |
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[dc158ad] | 10 | * Copyright (c) 2014, 2017 embedded brains GmbH. All rights reserved. |
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[41c5f1b7] | 11 | * |
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| 12 | * The license and distribution terms for this file may be |
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| 13 | * found in the file LICENSE in this distribution or at |
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| 14 | * http://www.rtems.org/license/LICENSE. |
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| 15 | */ |
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| 16 | |
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[80cf60e] | 17 | #ifdef HAVE_CONFIG_H |
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| 18 | #include "config.h" |
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[41c5f1b7] | 19 | #endif |
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| 20 | |
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| 21 | #include <dev/i2c/i2c.h> |
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| 22 | |
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| 23 | #include <rtems/imfs.h> |
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| 24 | |
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| 25 | #include <stdlib.h> |
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| 26 | #include <string.h> |
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| 27 | |
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[5bb5e01] | 28 | int i2c_bus_try_obtain(i2c_bus *bus) |
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| 29 | { |
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| 30 | return rtems_recursive_mutex_try_lock(&bus->mutex); |
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| 31 | } |
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| 32 | |
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[41c5f1b7] | 33 | void i2c_bus_obtain(i2c_bus *bus) |
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| 34 | { |
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[dc158ad] | 35 | rtems_recursive_mutex_lock(&bus->mutex); |
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[41c5f1b7] | 36 | } |
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| 37 | |
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| 38 | void i2c_bus_release(i2c_bus *bus) |
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| 39 | { |
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[dc158ad] | 40 | rtems_recursive_mutex_unlock(&bus->mutex); |
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[41c5f1b7] | 41 | } |
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| 42 | |
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[5bb5e01] | 43 | int i2c_bus_do_transfer( |
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| 44 | i2c_bus *bus, |
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| 45 | i2c_msg *msgs, |
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| 46 | uint32_t msg_count, |
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| 47 | uint32_t flags |
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| 48 | ) |
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[41c5f1b7] | 49 | { |
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| 50 | int err; |
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| 51 | uint32_t i; |
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| 52 | uint32_t j; |
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| 53 | |
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| 54 | _Assert(msg_count > 0); |
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| 55 | |
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| 56 | for (i = 0, j = 0; i < msg_count; ++i) { |
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| 57 | if ((msgs[i].flags & I2C_M_NOSTART) != 0) { |
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| 58 | if ((msgs[i].flags & I2C_M_RD) != (msgs[j].flags & I2C_M_RD)) { |
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| 59 | return -EINVAL; |
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| 60 | } |
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| 61 | |
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| 62 | if (msgs[i].addr != msgs[j].addr) { |
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| 63 | return -EINVAL; |
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| 64 | } |
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| 65 | } else { |
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| 66 | j = i; |
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| 67 | } |
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| 68 | } |
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| 69 | |
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[5bb5e01] | 70 | if ((flags & I2C_BUS_NOBLOCK) != 0) { |
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| 71 | if (i2c_bus_try_obtain(bus) != 0) { |
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| 72 | return -EAGAIN; |
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| 73 | } |
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| 74 | } else { |
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| 75 | i2c_bus_obtain(bus); |
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| 76 | } |
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[41c5f1b7] | 77 | err = (*bus->transfer)(bus, msgs, msg_count); |
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| 78 | i2c_bus_release(bus); |
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| 79 | |
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| 80 | return err; |
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| 81 | } |
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| 82 | |
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[5bb5e01] | 83 | int i2c_bus_transfer(i2c_bus *bus, i2c_msg *msgs, uint32_t msg_count) |
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| 84 | { |
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| 85 | return i2c_bus_do_transfer(bus, msgs, msg_count, 0); |
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| 86 | } |
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| 87 | |
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[41c5f1b7] | 88 | static ssize_t i2c_bus_read( |
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| 89 | rtems_libio_t *iop, |
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| 90 | void *buffer, |
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| 91 | size_t count |
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| 92 | ) |
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| 93 | { |
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| 94 | i2c_bus *bus = IMFS_generic_get_context_by_iop(iop); |
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| 95 | i2c_msg msg = { |
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| 96 | .addr = bus->default_address, |
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| 97 | .flags = I2C_M_RD, |
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| 98 | .len = (uint16_t) count, |
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| 99 | .buf = buffer |
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| 100 | }; |
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| 101 | int err; |
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[5bb5e01] | 102 | unsigned flags = 0; |
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[41c5f1b7] | 103 | |
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| 104 | if (bus->ten_bit_address) { |
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| 105 | msg.flags |= I2C_M_TEN; |
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| 106 | } |
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| 107 | |
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[5bb5e01] | 108 | if (rtems_libio_iop_is_no_delay(iop)) { |
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| 109 | flags |= I2C_BUS_NOBLOCK; |
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| 110 | } |
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| 111 | |
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| 112 | err = i2c_bus_do_transfer(bus, &msg, 1, flags); |
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[41c5f1b7] | 113 | if (err == 0) { |
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| 114 | return msg.len; |
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| 115 | } else { |
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| 116 | rtems_set_errno_and_return_minus_one(-err); |
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| 117 | } |
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| 118 | } |
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| 119 | |
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| 120 | static ssize_t i2c_bus_write( |
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| 121 | rtems_libio_t *iop, |
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| 122 | const void *buffer, |
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| 123 | size_t count |
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| 124 | ) |
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| 125 | { |
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| 126 | i2c_bus *bus = IMFS_generic_get_context_by_iop(iop); |
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| 127 | i2c_msg msg = { |
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| 128 | .addr = bus->default_address, |
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| 129 | .flags = 0, |
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| 130 | .len = (uint16_t) count, |
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| 131 | .buf = RTEMS_DECONST(void *, buffer) |
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| 132 | }; |
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| 133 | int err; |
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[5bb5e01] | 134 | unsigned flags = 0; |
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[41c5f1b7] | 135 | |
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| 136 | if (bus->ten_bit_address) { |
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| 137 | msg.flags |= I2C_M_TEN; |
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| 138 | } |
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| 139 | |
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[5bb5e01] | 140 | if (rtems_libio_iop_is_no_delay(iop)) { |
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| 141 | flags |= I2C_BUS_NOBLOCK; |
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| 142 | } |
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| 143 | |
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| 144 | err = i2c_bus_do_transfer(bus, &msg, 1, flags); |
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[41c5f1b7] | 145 | if (err == 0) { |
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| 146 | return msg.len; |
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| 147 | } else { |
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| 148 | rtems_set_errno_and_return_minus_one(-err); |
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| 149 | } |
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| 150 | } |
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| 151 | |
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| 152 | static int i2c_bus_ioctl( |
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| 153 | rtems_libio_t *iop, |
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| 154 | ioctl_command_t command, |
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| 155 | void *arg |
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| 156 | ) |
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| 157 | { |
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| 158 | i2c_bus *bus = IMFS_generic_get_context_by_iop(iop); |
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| 159 | i2c_rdwr_ioctl_data *rdwr; |
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| 160 | int err; |
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[5bb5e01] | 161 | unsigned flags = 0; |
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[41c5f1b7] | 162 | |
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| 163 | switch (command) { |
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| 164 | case I2C_RDWR: |
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| 165 | rdwr = arg; |
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| 166 | if (rdwr->nmsgs > 0) { |
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[5bb5e01] | 167 | if (rtems_libio_iop_is_no_delay(iop)) { |
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| 168 | flags |= I2C_BUS_NOBLOCK; |
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| 169 | } |
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| 170 | err = i2c_bus_do_transfer(bus, rdwr->msgs, rdwr->nmsgs, flags); |
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[41c5f1b7] | 171 | } else { |
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| 172 | err = 0; |
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| 173 | } |
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| 174 | break; |
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| 175 | case I2C_BUS_OBTAIN: |
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| 176 | i2c_bus_obtain(bus); |
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| 177 | err = 0; |
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| 178 | break; |
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| 179 | case I2C_BUS_RELEASE: |
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| 180 | i2c_bus_release(bus); |
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| 181 | err = 0; |
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| 182 | break; |
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| 183 | case I2C_BUS_GET_CONTROL: |
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| 184 | *(i2c_bus **) arg = bus; |
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| 185 | err = 0; |
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| 186 | break; |
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| 187 | case I2C_FUNCS: |
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| 188 | *(unsigned long *) arg = bus->functionality; |
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| 189 | err = 0; |
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| 190 | break; |
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| 191 | case I2C_RETRIES: |
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| 192 | bus->retries = (unsigned long) arg; |
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| 193 | err = 0; |
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| 194 | break; |
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| 195 | case I2C_TIMEOUT: |
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| 196 | bus->timeout = RTEMS_MILLISECONDS_TO_TICKS(10 * (unsigned long) arg); |
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| 197 | err = 0; |
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| 198 | break; |
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| 199 | case I2C_SLAVE: |
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| 200 | case I2C_SLAVE_FORCE: |
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| 201 | bus->default_address = (unsigned long) arg; |
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| 202 | err = 0; |
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| 203 | break; |
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| 204 | case I2C_TENBIT: |
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| 205 | bus->ten_bit_address = (unsigned long) arg != 0; |
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| 206 | err = 0; |
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| 207 | break; |
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| 208 | case I2C_PEC: |
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| 209 | bus->use_pec = (unsigned long) arg != 0; |
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| 210 | err = 0; |
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| 211 | break; |
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| 212 | case I2C_BUS_SET_CLOCK: |
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| 213 | i2c_bus_obtain(bus); |
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| 214 | err = (*bus->set_clock)(bus, (unsigned long) arg); |
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| 215 | i2c_bus_release(bus); |
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| 216 | break; |
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| 217 | default: |
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| 218 | err = -ENOTTY; |
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| 219 | break; |
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| 220 | } |
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| 221 | |
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| 222 | if (err == 0) { |
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| 223 | return 0; |
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| 224 | } else { |
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| 225 | rtems_set_errno_and_return_minus_one(-err); |
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| 226 | } |
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| 227 | } |
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| 228 | |
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| 229 | static const rtems_filesystem_file_handlers_r i2c_bus_handler = { |
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| 230 | .open_h = rtems_filesystem_default_open, |
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| 231 | .close_h = rtems_filesystem_default_close, |
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| 232 | .read_h = i2c_bus_read, |
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| 233 | .write_h = i2c_bus_write, |
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| 234 | .ioctl_h = i2c_bus_ioctl, |
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| 235 | .lseek_h = rtems_filesystem_default_lseek, |
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| 236 | .fstat_h = IMFS_stat, |
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| 237 | .ftruncate_h = rtems_filesystem_default_ftruncate, |
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| 238 | .fsync_h = rtems_filesystem_default_fsync_or_fdatasync, |
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| 239 | .fdatasync_h = rtems_filesystem_default_fsync_or_fdatasync, |
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| 240 | .fcntl_h = rtems_filesystem_default_fcntl, |
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| 241 | .kqfilter_h = rtems_filesystem_default_kqfilter, |
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[c6bb1c33] | 242 | .mmap_h = rtems_filesystem_default_mmap, |
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[41c5f1b7] | 243 | .poll_h = rtems_filesystem_default_poll, |
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| 244 | .readv_h = rtems_filesystem_default_readv, |
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| 245 | .writev_h = rtems_filesystem_default_writev |
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| 246 | }; |
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| 247 | |
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[cf36b70] | 248 | static void i2c_bus_node_destroy(IMFS_jnode_t *node) |
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[41c5f1b7] | 249 | { |
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| 250 | i2c_bus *bus; |
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| 251 | |
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| 252 | bus = IMFS_generic_get_context_by_node(node); |
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| 253 | (*bus->destroy)(bus); |
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| 254 | |
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[cf36b70] | 255 | IMFS_node_destroy_default(node); |
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[41c5f1b7] | 256 | } |
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| 257 | |
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[cf36b70] | 258 | static const IMFS_node_control i2c_bus_node_control = IMFS_GENERIC_INITIALIZER( |
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| 259 | &i2c_bus_handler, |
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| 260 | IMFS_node_initialize_generic, |
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| 261 | i2c_bus_node_destroy |
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| 262 | ); |
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[41c5f1b7] | 263 | |
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| 264 | int i2c_bus_register( |
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| 265 | i2c_bus *bus, |
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| 266 | const char *bus_path |
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| 267 | ) |
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| 268 | { |
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| 269 | int rv; |
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| 270 | |
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| 271 | rv = IMFS_make_generic_node( |
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| 272 | bus_path, |
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| 273 | S_IFCHR | S_IRWXU | S_IRWXG | S_IRWXO, |
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| 274 | &i2c_bus_node_control, |
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| 275 | bus |
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| 276 | ); |
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| 277 | if (rv != 0) { |
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| 278 | (*bus->destroy)(bus); |
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| 279 | } |
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| 280 | |
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| 281 | return rv; |
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| 282 | } |
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| 283 | |
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| 284 | static int i2c_bus_transfer_default( |
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| 285 | i2c_bus *bus, |
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| 286 | i2c_msg *msgs, |
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| 287 | uint32_t msg_count |
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| 288 | ) |
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| 289 | { |
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| 290 | (void) bus; |
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| 291 | (void) msgs; |
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| 292 | (void) msg_count; |
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| 293 | |
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| 294 | return -EIO; |
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| 295 | } |
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| 296 | |
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| 297 | static int i2c_bus_set_clock_default(i2c_bus *bus, unsigned long clock) |
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| 298 | { |
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| 299 | (void) bus; |
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| 300 | (void) clock; |
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| 301 | |
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| 302 | return -EIO; |
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| 303 | } |
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| 304 | |
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| 305 | static int i2c_bus_do_init( |
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| 306 | i2c_bus *bus, |
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| 307 | void (*destroy)(i2c_bus *bus) |
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| 308 | ) |
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| 309 | { |
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[dc158ad] | 310 | rtems_recursive_mutex_init(&bus->mutex, "I2C Bus"); |
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[41c5f1b7] | 311 | bus->transfer = i2c_bus_transfer_default; |
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| 312 | bus->set_clock = i2c_bus_set_clock_default; |
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| 313 | bus->destroy = destroy; |
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| 314 | |
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| 315 | return 0; |
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| 316 | } |
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| 317 | |
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| 318 | void i2c_bus_destroy(i2c_bus *bus) |
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| 319 | { |
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[dc158ad] | 320 | rtems_recursive_mutex_destroy(&bus->mutex); |
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[41c5f1b7] | 321 | } |
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| 322 | |
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| 323 | void i2c_bus_destroy_and_free(i2c_bus *bus) |
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| 324 | { |
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| 325 | i2c_bus_destroy(bus); |
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| 326 | free(bus); |
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| 327 | } |
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| 328 | |
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| 329 | int i2c_bus_init(i2c_bus *bus) |
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| 330 | { |
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| 331 | memset(bus, 0, sizeof(*bus)); |
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| 332 | |
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| 333 | return i2c_bus_do_init(bus, i2c_bus_destroy); |
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| 334 | } |
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| 335 | |
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| 336 | i2c_bus *i2c_bus_alloc_and_init(size_t size) |
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| 337 | { |
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| 338 | i2c_bus *bus = NULL; |
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| 339 | |
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| 340 | if (size >= sizeof(*bus)) { |
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| 341 | bus = calloc(1, size); |
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| 342 | if (bus != NULL) { |
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| 343 | int rv; |
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| 344 | |
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| 345 | rv = i2c_bus_do_init(bus, i2c_bus_destroy_and_free); |
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| 346 | if (rv != 0) { |
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| 347 | return NULL; |
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| 348 | } |
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| 349 | } |
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| 350 | } |
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| 351 | |
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| 352 | return bus; |
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| 353 | } |
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