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rdbg_cpu_asm.S @ 7ed1e747

4.104.114.84.95

Last change on this file since 7ed1e747 was 3695f03b, checked in by Joel Sherrill <joel.sherrill@…>, on 05/14/02 at 15:13:52

2002-05-14 Thomas Doerfler <Thomas.Doerfler@…>

src/m68k/rdbg_cpu_asm.S: Per PR163, Fix incorrect assumption that exception stack frames on M68K members with VBR always are 6 byte long. The incorrect assumption resulted in some gdb commands like "next" to fail on the 68360.

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File size: 6.5 KB

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1	/* rdbg_cpu_asm.s
2	*
3	* This file contains all assembly code for the Motorola m68k implementation
4	* of RDBG.
5	*
6	* $Id$
7	*
8	*/
9
10	#include <asm.h>
11	#include <rtems/score/cpu.h>
12
13	BEGIN_CODE
14
15	/*
16	* void copyback_data_cache_and_invalidate_instr_cache(addr, size)
17	*
18	* This routine performs a copy of the data cache
19	* and invalidate the instruction cache
20	*/
21
22	.align 2
23	PUBLIC (copyback_data_cache_and_invalidate_instr_cache)
24
25	SYM (copyback_data_cache_and_invalidate_instr_cache):
26	nop \| how?
27	rts
28
29
30
31	/*
32	* void enterRdbg(void)
33	*
34	* This function performs trap #4
35	* It is used :
36	* 1 - in the user code, to simulate a Breakpoint.
37	* (with justSaveContext = 0)
38	* 2 - in the RDBG code, to push a ctx in the list.
39	* (with justSaveContext = 1)
40	*
41	* In most of case, it will be use as described in 1.
42	* The 2nd possibility will be used by RDBG to obtain
43	* its own ctx
44	*/
45
46	PUBLIC (enterRdbg)
47
48	SYM (enterRdbg):
49	trap #4
50	rts
51
52
53	/*
54	* void excHandler(void)
55	*
56	* lotsa copypaste from cpu_asm.S
57	*
58	*/
59
60	/*
61	* The RTEMS jump table pushes vector
62	*
63	* The two types of exception frames on m68000 are
64	*
65	* unsigned16 sr <- sp
66	* unsigned32 pc
67	*
68	* unsigned16 fc <- sp
69	* unsigned32 addr
70	* unsigned16 instr
71	* unsigned16 sr
72	* unsigned32 pc
73	*
74	* after real frame we push d0-d1/a0-a1
75	*
76	* after that we push CPU_Exception_frame
77	*
78	* exframe <- sp
79	* d0-d1/a0-a1
80	* frame
81	*/
82	#if ( M68K_COLDFIRE_ARCH == 1 )
83	.set SR_OFFSET, 2 \| Status register offset
84	.set PC_OFFSET, 4 \| Program Counter offset
85	.set FVO_OFFSET, 0 \| Format/vector offset
86	#elif ( M68K_HAS_VBR == 1 )
87	.set SR_OFFSET, 0 \| Status register offset
88	.set PC_OFFSET, 2 \| Program Counter offset
89	.set FVO_OFFSET, 6 \| Format/vector offset
90	#else
91	.set SR_OFFSET, 2 \| Status register offset
92	.set PC_OFFSET, 4 \| Program Counter offset
93	.set FVO_OFFSET, 0 \| Format/vector offset placed in the stack
94	#endif /* M68K_HAS_VBR */
95
96	.align 4
97
98	PUBLIC (excHandler)
99	PUBLIC (BreakPointExcHdl)
100
101	SYM (excFormatLength):
102	/*
103	* size of exception stack frame depending on format type
104	* This is valid for m68k with VBR (68020/030/040/CPU32/CPU32+)
105	* size \| format/name
106	*/
107	dc.w 4*2 \| $0 standard
108	dc.w 4*2 \| $1 throwaway stackframe
109	dc.w 6*2 \| $2 CHK/CHK2/TRAPcc/TRAPV/DIV0/TRACE
110	dc.w 6*2 \| $3 Coprocessor Post-Instruction (040)
111	dc.w 4*2 \| $4 reserved
112	dc.w 4*2 \| $5 reserved
113	dc.w 4*2 \| $6 reserved
114	dc.w 30*2 \| $7 Access Error (040)
115	dc.w 29*2 \| $8 Bus Error (020)
116	dc.w 10*2 \| $9 Coprocessor Mid-Instruction (020)
117	dc.w 16*2 \| $A Short Bus-Error (020)
118	dc.w 46*2 \| $B Long Bus-Error (020)
119	dc.w 12*2 \| $C Bus Error/Address Error (CPU32)
120	dc.w 4*2 \| $D reserved
121	dc.w 4*2 \| $E reserved
122	dc.w 4*2 \| $F reserved
123
124	SYM (excHandler):
125	#if ( M68K_COLDFIRE_ARCH == 1 )
126	lea a7@(-16),a7
127	movm.l d0-d1/a0-a1,a7@ \| save d0-d1,a0-a1
128	movew a7@(16+FVO_OFFSET),d0 \| d0 = F/VO
129	andl #0x0ffc,d0 \| d0 = vector offset in vbr
130	lsrl #2,d0 \| d0 = vector number
131	lea a7@(16),a1 \| address of orig frame
132	lea a7@(16),a0 \| address of orig frame
133	lea a0@(8),a0 \| skip exception frame
134	#else
135	moveml d0-d1/a0-a1,a7@- \| save d0-d1,a0-a1
136	movew a7@(16+FVO_OFFSET),d0 \| d0 = F/VO
137	#if ( M68K_HAS_VBR == 1 )
138	movew d0,d1 \| d1 is copy of F/VO
139	andl #0x0ffc,d0 \| d0 = vector offset in vbr
140	lsrl #2,d0 \| d0 = vector number
141	lsrl #8,d1
142	lsrl #3,d1
143	andl #0x001f,d1 \| d1 is format number
144	lea SYM (excFormatLength),a1
145	movew a1@(d1),d1 \| d1 = size of exc frame
146	lea a7@(16,d1),a0
147	lea a7@(16),a1 \| address of orig frame
148
149	#else /* (M68k_HAS_VBR == 0) */
150	lea a7@(16),a1 \| address of orig frame
151	lea a1@(6),a0 \| skip stack frame
152	/*
153	* skip bus error stack frame...
154	*/
155	cmpi.l #3,d0
156	bgt 1f \| if >3 then normal exc
157	lea a1@(8),a0 \| skip extra stuff
158	lea a0@(6),a0 \| a0 = orig sp
159	1:
160	#endif /* M68K_HAS_VBR */
161	#endif /* ( M68K_COLDFIRE_ARCH == 0 ) */
162
163	/*
164	* at this point:
165	* a0 points to stack above exception stack frame
166	* a1 points to start of exception stack frame
167	*/
168
169	movew a1@(SR_OFFSET),d1 \| d1 = sr
170	andl #0xffff,d1
171	lea a7@(-76),a7 \| reserve room for exception frame
172	\| build CPU_Exception_frame
173	movel d0,a7@ \| vecnum
174	movel d1,a7@(4) \| sr
175	movel a1@(PC_OFFSET),d1 \| d1 = pc
176	#if ( M68K_COLDFIRE_ARCH == 0 )
177	cmpiw #47,d0 \| trap #15, breakpoint?
178	#else
179	cmpil #47,d0 \| trap #15, breakpoint?
180	#endif
181	bne 2f
182	subql #2,d1 \| real PC is at trap insn
183	2: movel d1,a7@(8) \| store pc to exframe struct
184	movel a7@(76),a7@(12) \| the orig d0 pushed at beginning
185	movel a7@(76+4),a7@(16) \| the orig d1 pushed at beginning
186	movel d2,a7@(20)
187	movel d3,a7@(24)
188	movel d4,a7@(28)
189	movel d5,a7@(32)
190	movel d6,a7@(36)
191	movel d7,a7@(40)
192	movel a7@(76+8),a7@(44) \| the orig a0 pushed at beginning
193	movel a7@(76+12),a7@(48) \| the orig a1 pushed at beginning
194	movel a2,a7@(52)
195	movel a3,a7@(56)
196	movel a4,a7@(60)
197	movel a5,a7@(64)
198	movel a6,a7@(68)
199	movel a0,a7@(72) \| stack pointer before exception
200	lea a7@,a0 \| exframe address
201	movel a1,a7@- \| save top of orig frame
202	movel a0,a7@- \| push exframe address
203	jsr SYM(BreakPointExcHdl)
204	addql #4,a7 \| pop exframe address
205	movel a7@+,a1 \| restore orig frame address
206	\| XXX what should be restored from exframe??
207	movel a7@(4),d1 \| sr
208	movew d1,a1@(SR_OFFSET) \| store sr to frame XXX ???
209	movel a7@(8),a1@(PC_OFFSET) \| store pc to frame XXX ???
210	movel a7@(12),a7@(76) \| d0 to be restored from stack
211	movel a7@(16),a7@(76+4) \| d1 to be restored from stack
212	movel a7@(20),d2
213	movel a7@(24),d3
214	movel a7@(28),d4
215	movel a7@(32),d5
216	movel a7@(36),d6
217	movel a7@(40),d7
218	movel a7@(44),a7@(76+8) \| a0 to be restored from stack
219	movel a7@(48),a7@(76+12) \| a1 to be restored from stack
220	movel a7@(52),a2
221	movel a7@(56),a3
222	movel a7@(60),a4
223	movel a7@(64),a5
224	movel a7@(68),a6
225	addl #76,a7 \| pop exframe
226
227	#if ( M68K_COLDFIRE_ARCH == 0 )
228	moveml a7@+,d0-d1/a0-a1 \| restore d0-d1,a0-a1
229	#else
230	moveml a7@,d0-d1/a0-a1 \| restore d0-d1,a0-a1
231	lea a7@(16),a7
232	#endif
233
234	#if ( M68K_HAS_VBR == 0 )
235	addql #2,a7 \| pop format/id
236	#endif /* M68K_HAS_VBR */
237
238	\| XXX bus err cleanup
239
240	rte
241
242	END_CODE
243
244	END

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