1 | /* |
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2 | * This file contains the termios TTY driver for the Motorola MC68681. |
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3 | * |
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4 | * This part is available from a number of secondary sources. |
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5 | * In particular, we know about the following: |
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6 | * |
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7 | * + Exar 88c681 and 68c681 |
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8 | * |
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9 | * COPYRIGHT (c) 1989-1998. |
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10 | * On-Line Applications Research Corporation (OAR). |
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11 | * Copyright assigned to U.S. Government, 1994. |
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12 | * |
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13 | * The license and distribution terms for this file may be |
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14 | * found in the file LICENSE in this distribution or at |
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15 | * http://www.OARcorp.com/rtems/license.html. |
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16 | * |
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17 | * $Id$ |
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18 | */ |
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19 | |
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20 | #include <rtems.h> |
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21 | #include <rtems/libio.h> |
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22 | #include <stdlib.h> |
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23 | #include <ringbuf.h> |
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24 | |
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25 | #include <libchip/serial.h> |
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26 | #include "mc68681_p.h" |
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27 | #include "mc68681.h" |
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28 | |
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29 | /* |
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30 | * Flow control is only supported when using interrupts |
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31 | */ |
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32 | |
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33 | console_flow mc68681_flow_RTSCTS = |
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34 | { |
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35 | mc68681_negate_RTS, /* deviceStopRemoteTx */ |
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36 | mc68681_assert_RTS /* deviceStartRemoteTx */ |
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37 | }; |
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38 | |
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39 | console_flow mc68681_flow_DTRCTS = |
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40 | { |
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41 | mc68681_negate_DTR, /* deviceStopRemoteTx */ |
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42 | mc68681_assert_DTR /* deviceStartRemoteTx */ |
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43 | }; |
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44 | |
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45 | console_fns mc68681_fns = |
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46 | { |
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47 | mc68681_probe, /* deviceProbe */ |
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48 | mc68681_open, /* deviceFirstOpen */ |
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49 | mc68681_flush, /* deviceLastClose */ |
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50 | NULL, /* deviceRead */ |
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51 | mc68681_write_support_int, /* deviceWrite */ |
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52 | mc68681_initialize_interrupts, /* deviceInitialize */ |
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53 | mc68681_write_polled, /* deviceWritePolled */ |
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54 | FALSE, /* deviceOutputUsesInterrupts */ |
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55 | }; |
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56 | |
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57 | console_fns mc68681_fns_polled = |
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58 | { |
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59 | mc68681_probe, /* deviceProbe */ |
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60 | mc68681_open, /* deviceFirstOpen */ |
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61 | mc68681_close, /* deviceLastClose */ |
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62 | mc68681_inbyte_nonblocking_polled, /* deviceRead */ |
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63 | mc68681_write_support_polled, /* deviceWrite */ |
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64 | mc68681_init, /* deviceInitialize */ |
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65 | mc68681_write_polled, /* deviceWritePolled */ |
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66 | FALSE, /* deviceOutputUsesInterrupts */ |
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67 | }; |
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68 | |
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69 | extern void set_vector( rtems_isr_entry, rtems_vector_number, int ); |
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70 | |
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71 | /* |
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72 | * Console Device Driver Entry Points |
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73 | */ |
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74 | |
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75 | static boolean mc68681_probe(int minor) |
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76 | { |
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77 | /* |
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78 | * If the configuration dependent probe has located the device then |
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79 | * assume it is there |
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80 | */ |
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81 | return(TRUE); |
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82 | } |
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83 | |
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84 | static void mc68681_init(int minor) |
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85 | { |
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86 | /* XXX */ |
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87 | unsigned32 pMC68681; |
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88 | unsigned8 ucTrash; |
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89 | unsigned8 ucDataByte; |
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90 | unsigned32 ulBaudDivisor; |
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91 | mc68681_context *pmc68681Context; |
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92 | setRegister_f setReg; |
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93 | getRegister_f getReg; |
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94 | |
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95 | #if 1 |
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96 | ulBaudDivisor = ucDataByte = ucTrash = 0; |
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97 | #endif |
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98 | pmc68681Context = (mc68681_context *) malloc(sizeof(mc68681_context)); |
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99 | |
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100 | Console_Port_Data[minor].pDeviceContext = (void *)pmc68681Context; |
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101 | #if 0 |
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102 | pmc68681Context->ucModemCtrl = SP_MODEM_IRQ; |
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103 | #endif |
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104 | |
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105 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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106 | setReg = Console_Port_Tbl[minor].setRegister; |
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107 | getReg = Console_Port_Tbl[minor].getRegister; |
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108 | |
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109 | #if 0 |
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110 | /* Clear the divisor latch, clear all interrupt enables, |
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111 | * and reset and |
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112 | * disable the FIFO's. |
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113 | */ |
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114 | |
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115 | (*setReg)(pMC68681, MC68681_LINE_CONTROL, 0x0); |
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116 | (*setReg)(pMC68681, MC68681_INTERRUPT_ENABLE, 0x0); |
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117 | |
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118 | /* Set the divisor latch and set the baud rate. */ |
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119 | |
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120 | ulBaudDivisor=MC68681_Baud((unsigned32)Console_Port_Tbl[minor].pDeviceParams); |
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121 | ucDataByte = SP_LINE_DLAB; |
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122 | (*setReg)(pMC68681, MC68681_LINE_CONTROL, ucDataByte); |
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123 | (*setReg)(pMC68681, MC68681_TRANSMIT_BUFFER, ulBaudDivisor&0xff); |
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124 | (*setReg)(pMC68681, MC68681_INTERRUPT_ENABLE, (ulBaudDivisor>>8)&0xff); |
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125 | |
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126 | /* Clear the divisor latch and set the character size to eight bits */ |
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127 | /* with one stop bit and no parity checking. */ |
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128 | ucDataByte = EIGHT_BITS; |
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129 | (*setReg)(pMC68681, MC68681_LINE_CONTROL, ucDataByte); |
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130 | |
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131 | /* Enable and reset transmit and receive FIFOs. TJA */ |
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132 | ucDataByte = SP_FIFO_ENABLE; |
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133 | (*setReg)(pMC68681, MC68681_FIFO_CONTROL, ucDataByte); |
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134 | |
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135 | ucDataByte = SP_FIFO_ENABLE | SP_FIFO_RXRST | SP_FIFO_TXRST; |
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136 | (*setReg)(pMC68681, MC68681_FIFO_CONTROL, ucDataByte); |
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137 | |
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138 | /* |
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139 | * Disable interrupts |
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140 | */ |
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141 | ucDataByte = 0; |
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142 | (*setReg)(pMC68681, MC68681_INTERRUPT_ENABLE, ucDataByte); |
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143 | |
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144 | /* Set data terminal ready. */ |
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145 | /* And open interrupt tristate line */ |
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146 | (*setReg)(pMC68681, MC68681_MODEM_CONTROL,pmc68681Context->ucModemCtrl); |
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147 | |
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148 | ucTrash = (*getReg)(pMC68681, MC68681_LINE_STATUS ); |
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149 | ucTrash = (*getReg)(pMC68681, MC68681_RECEIVE_BUFFER ); |
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150 | #endif |
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151 | } |
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152 | |
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153 | static int mc68681_open( |
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154 | int major, |
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155 | int minor, |
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156 | void * arg |
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157 | ) |
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158 | { |
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159 | /* XXX */ |
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160 | /* |
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161 | * Assert DTR |
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162 | */ |
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163 | |
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164 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_DTRCTS) { |
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165 | mc68681_assert_DTR(minor); |
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166 | } |
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167 | |
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168 | return(RTEMS_SUCCESSFUL); |
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169 | } |
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170 | |
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171 | static int mc68681_close( |
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172 | int major, |
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173 | int minor, |
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174 | void * arg |
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175 | ) |
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176 | { |
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177 | /* XXX */ |
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178 | /* |
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179 | * Negate DTR |
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180 | */ |
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181 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_DTRCTS) { |
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182 | mc68681_negate_DTR(minor); |
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183 | } |
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184 | |
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185 | return(RTEMS_SUCCESSFUL); |
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186 | } |
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187 | |
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188 | /* |
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189 | * mc68681_write_polled |
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190 | */ |
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191 | |
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192 | static void mc68681_write_polled( |
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193 | int minor, |
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194 | char cChar |
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195 | ) |
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196 | { |
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197 | unsigned32 pMC68681; |
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198 | unsigned char ucLineStatus; |
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199 | int iTimeout; |
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200 | getRegister_f getReg; |
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201 | setData_f setData; |
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202 | |
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203 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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204 | getReg = Console_Port_Tbl[minor].getRegister; |
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205 | setData = Console_Port_Tbl[minor].setData; |
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206 | |
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207 | /* |
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208 | * wait for transmitter holding register to be empty |
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209 | */ |
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210 | iTimeout = 1000; |
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211 | ucLineStatus = (*getReg)(pMC68681, MC68681_STATUS_REG); |
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212 | while ((ucLineStatus & MC68681_TX_READY) == 0) { |
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213 | |
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214 | /* |
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215 | * Yield while we wait |
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216 | */ |
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217 | |
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218 | if(_System_state_Is_up(_System_state_Get())) { |
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219 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
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220 | } |
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221 | ucLineStatus = (*getReg)(pMC68681, MC68681_STATUS_REG); |
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222 | if(!--iTimeout) { |
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223 | break; |
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224 | } |
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225 | } |
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226 | |
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227 | /* |
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228 | * transmit character |
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229 | */ |
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230 | |
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231 | (*setData)(pMC68681, cChar); |
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232 | } |
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233 | |
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234 | /* |
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235 | * These routines provide control of the RTS and DTR lines |
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236 | */ |
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237 | |
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238 | /* |
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239 | * mc68681_assert_RTS |
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240 | */ |
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241 | |
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242 | static int mc68681_assert_RTS(int minor) |
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243 | { |
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244 | /* XXX */ |
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245 | |
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246 | unsigned32 pMC68681; |
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247 | unsigned32 Irql; |
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248 | mc68681_context *pmc68681Context; |
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249 | setRegister_f setReg; |
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250 | |
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251 | |
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252 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
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253 | |
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254 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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255 | setReg = Console_Port_Tbl[minor].setRegister; |
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256 | |
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257 | /* |
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258 | * Assert RTS |
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259 | */ |
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260 | rtems_interrupt_disable(Irql); |
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261 | #if 0 |
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262 | pmc68681Context->ucModemCtrl |= SP_MODEM_RTS; |
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263 | (*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl); |
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264 | #endif |
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265 | rtems_interrupt_enable(Irql); |
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266 | return 0; |
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267 | } |
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268 | |
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269 | /* |
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270 | * mc68681_negate_RTS |
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271 | */ |
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272 | static int mc68681_negate_RTS(int minor) |
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273 | { |
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274 | /* XXX */ |
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275 | unsigned32 pMC68681; |
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276 | unsigned32 Irql; |
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277 | mc68681_context *pmc68681Context; |
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278 | setRegister_f setReg; |
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279 | |
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280 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
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281 | |
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282 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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283 | setReg = Console_Port_Tbl[minor].setRegister; |
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284 | |
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285 | /* |
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286 | * Negate RTS |
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287 | */ |
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288 | rtems_interrupt_disable(Irql); |
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289 | #if 0 |
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290 | pmc68681Context->ucModemCtrl &= ~SP_MODEM_RTS; |
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291 | (*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl); |
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292 | #endif |
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293 | rtems_interrupt_enable(Irql); |
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294 | return 0; |
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295 | } |
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296 | |
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297 | /* |
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298 | * These flow control routines utilise a connection from the local DTR |
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299 | * line to the remote CTS line |
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300 | */ |
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301 | |
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302 | /* |
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303 | * mc68681_assert_DTR |
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304 | */ |
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305 | |
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306 | static int mc68681_assert_DTR(int minor) |
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307 | { |
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308 | /* XXX */ |
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309 | unsigned32 pMC68681; |
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310 | unsigned32 Irql; |
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311 | mc68681_context *pmc68681Context; |
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312 | setRegister_f setReg; |
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313 | |
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314 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
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315 | |
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316 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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317 | setReg = Console_Port_Tbl[minor].setRegister; |
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318 | |
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319 | /* |
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320 | * Assert DTR |
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321 | */ |
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322 | rtems_interrupt_disable(Irql); |
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323 | #if 0 |
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324 | pmc68681Context->ucModemCtrl |= SP_MODEM_DTR; |
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325 | (*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl); |
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326 | #endif |
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327 | rtems_interrupt_enable(Irql); |
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328 | return 0; |
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329 | } |
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330 | |
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331 | /* |
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332 | * mc68681_negate_DTR |
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333 | */ |
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334 | |
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335 | static int mc68681_negate_DTR(int minor) |
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336 | { |
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337 | /* XXX */ |
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338 | unsigned32 pMC68681; |
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339 | unsigned32 Irql; |
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340 | mc68681_context *pmc68681Context; |
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341 | setRegister_f setReg; |
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342 | |
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343 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
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344 | |
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345 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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346 | setReg = Console_Port_Tbl[minor].setRegister; |
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347 | |
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348 | /* |
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349 | * Negate DTR |
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350 | */ |
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351 | rtems_interrupt_disable(Irql); |
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352 | #if 0 |
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353 | pmc68681Context->ucModemCtrl &= ~SP_MODEM_DTR; |
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354 | (*setReg)(pMC68681, MC68681_MODEM_CONTROL,pmc68681Context->ucModemCtrl); |
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355 | #endif |
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356 | rtems_interrupt_enable(Irql); |
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357 | return 0; |
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358 | } |
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359 | |
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360 | /* |
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361 | * mc68681_isr |
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362 | * |
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363 | * This routine is the console interrupt handler. |
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364 | * |
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365 | * Input parameters: |
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366 | * vector - vector number |
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367 | * |
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368 | * Output parameters: NONE |
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369 | * |
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370 | * Return values: NONE |
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371 | */ |
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372 | |
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373 | static void mc68681_process( |
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374 | int minor |
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375 | ) |
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376 | { |
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377 | /* XXX */ |
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378 | unsigned32 pMC68681; |
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379 | volatile unsigned8 ucLineStatus; |
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380 | volatile unsigned8 ucInterruptId; |
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381 | char cChar; |
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382 | getRegister_f getReg; |
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383 | setRegister_f setReg; |
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384 | |
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385 | #if 1 |
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386 | cChar = ucInterruptId = ucLineStatus = 0; |
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387 | #endif |
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388 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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389 | getReg = Console_Port_Tbl[minor].getRegister; |
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390 | setReg = Console_Port_Tbl[minor].setRegister; |
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391 | |
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392 | #if 0 |
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393 | do { |
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394 | /* |
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395 | * Deal with any received characters |
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396 | */ |
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397 | while(TRUE) { |
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398 | ucLineStatus = (*getReg)(pMC68681, MC68681_LINE_STATUS); |
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399 | if(~ucLineStatus & SP_LSR_RDY) { |
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400 | break; |
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401 | } |
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402 | cChar = (*getReg)(pMC68681, MC68681_RECEIVE_BUFFER); |
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403 | rtems_termios_enqueue_raw_characters( |
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404 | Console_Port_Data[minor].termios_data, |
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405 | &cChar, |
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406 | 1 |
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407 | ); |
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408 | } |
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409 | |
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410 | while(TRUE) { |
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411 | if(Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) { |
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412 | Console_Port_Data[minor].bActive = FALSE; |
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413 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) { |
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414 | mc68681_negate_RTS(minor); |
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415 | } |
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416 | |
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417 | /* |
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418 | * There is no data to transmit |
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419 | */ |
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420 | break; |
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421 | } |
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422 | |
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423 | ucLineStatus = (*getReg)(pMC68681, MC68681_LINE_STATUS); |
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424 | if(~ucLineStatus & SP_LSR_THOLD) { |
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425 | /* |
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426 | * We'll get another interrupt when |
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427 | * the transmitter holding reg. becomes |
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428 | * free again |
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429 | */ |
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430 | break; |
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431 | } |
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432 | |
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433 | Ring_buffer_Remove_character( &Console_Port_Data[minor].TxBuffer, cChar); |
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434 | /* |
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435 | * transmit character |
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436 | */ |
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437 | (*setReg)(pMC68681, MC68681_TRANSMIT_BUFFER, cChar); |
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438 | } |
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439 | |
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440 | ucInterruptId = (*getReg)(pMC68681, MC68681_INTERRUPT_ID); |
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441 | } |
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442 | while((ucInterruptId&0xf) != 0x1); |
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443 | #endif |
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444 | } |
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445 | |
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446 | static rtems_isr mc68681_isr( |
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447 | rtems_vector_number vector |
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448 | ) |
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449 | { |
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450 | int minor; |
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451 | |
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452 | for(minor=0 ; minor<Console_Port_Count ; minor++) { |
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453 | if(vector == Console_Port_Tbl[minor].ulIntVector) { |
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454 | mc68681_process(minor); |
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455 | } |
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456 | } |
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457 | } |
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458 | |
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459 | /* |
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460 | * mc68681_flush |
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461 | */ |
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462 | |
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463 | static int mc68681_flush(int major, int minor, void *arg) |
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464 | { |
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465 | while(!Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) { |
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466 | /* |
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467 | * Yield while we wait |
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468 | */ |
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469 | if(_System_state_Is_up(_System_state_Get())) { |
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470 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
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471 | } |
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472 | } |
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473 | |
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474 | mc68681_close(major, minor, arg); |
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475 | |
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476 | return(RTEMS_SUCCESSFUL); |
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477 | } |
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478 | |
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479 | /* |
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480 | * mc68681_initialize_interrupts |
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481 | * |
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482 | * This routine initializes the console's receive and transmit |
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483 | * ring buffers and loads the appropriate vectors to handle the interrupts. |
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484 | * |
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485 | * Input parameters: NONE |
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486 | * |
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487 | * Output parameters: NONE |
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488 | * |
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489 | * Return values: NONE |
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490 | */ |
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491 | |
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492 | static void mc68681_enable_interrupts( |
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493 | int minor |
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494 | ) |
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495 | { |
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496 | /* XXX */ |
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497 | unsigned32 pMC68681; |
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498 | unsigned8 ucDataByte; |
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499 | setRegister_f setReg; |
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500 | |
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501 | #if 1 |
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502 | ucDataByte = 0; |
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503 | #endif |
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504 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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505 | setReg = Console_Port_Tbl[minor].setRegister; |
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506 | |
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507 | #if 0 |
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508 | /* |
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509 | * Enable interrupts |
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510 | */ |
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511 | ucDataByte = SP_INT_RX_ENABLE | SP_INT_TX_ENABLE; |
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512 | (*setReg)(pMC68681, MC68681_INTERRUPT_ENABLE, ucDataByte); |
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513 | #endif |
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514 | } |
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515 | |
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516 | static void mc68681_initialize_interrupts(int minor) |
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517 | { |
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518 | mc68681_init(minor); |
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519 | |
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520 | Ring_buffer_Initialize(&Console_Port_Data[minor].TxBuffer); |
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521 | |
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522 | Console_Port_Data[minor].bActive = FALSE; |
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523 | |
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524 | set_vector(mc68681_isr, Console_Port_Tbl[minor].ulIntVector, 1); |
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525 | |
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526 | mc68681_enable_interrupts(minor); |
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527 | } |
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528 | |
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529 | /* |
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530 | * mc68681_write_support_int |
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531 | * |
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532 | * Console Termios output entry point. |
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533 | */ |
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534 | |
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535 | static int mc68681_write_support_int( |
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536 | int minor, |
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537 | const char *buf, |
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538 | int len |
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539 | ) |
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540 | { |
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541 | int i; |
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542 | unsigned32 Irql; |
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543 | |
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544 | for(i=0 ; i<len ;) { |
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545 | if(Ring_buffer_Is_full(&Console_Port_Data[minor].TxBuffer)) { |
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546 | if(!Console_Port_Data[minor].bActive) { |
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547 | /* |
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548 | * Wake up the device |
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549 | */ |
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550 | rtems_interrupt_disable(Irql); |
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551 | Console_Port_Data[minor].bActive = TRUE; |
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552 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) { |
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553 | mc68681_assert_RTS(minor); |
---|
554 | } |
---|
555 | mc68681_process(minor); |
---|
556 | rtems_interrupt_enable(Irql); |
---|
557 | } else { |
---|
558 | /* |
---|
559 | * Yield |
---|
560 | */ |
---|
561 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
---|
562 | } |
---|
563 | |
---|
564 | /* |
---|
565 | * Wait for ring buffer to empty |
---|
566 | */ |
---|
567 | continue; |
---|
568 | } |
---|
569 | else { |
---|
570 | Ring_buffer_Add_character( &Console_Port_Data[minor].TxBuffer, buf[i]); |
---|
571 | i++; |
---|
572 | } |
---|
573 | } |
---|
574 | |
---|
575 | /* |
---|
576 | * Ensure that characters are on the way |
---|
577 | */ |
---|
578 | |
---|
579 | if(!Console_Port_Data[minor].bActive) { |
---|
580 | /* |
---|
581 | * Wake up the device |
---|
582 | */ |
---|
583 | rtems_interrupt_disable(Irql); |
---|
584 | Console_Port_Data[minor].bActive = TRUE; |
---|
585 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) { |
---|
586 | mc68681_assert_RTS(minor); |
---|
587 | } |
---|
588 | mc68681_process(minor); |
---|
589 | rtems_interrupt_enable(Irql); |
---|
590 | } |
---|
591 | |
---|
592 | return (len); |
---|
593 | } |
---|
594 | |
---|
595 | /* |
---|
596 | * mc68681_write_support_polled |
---|
597 | * |
---|
598 | * Console Termios output entry point. |
---|
599 | * |
---|
600 | */ |
---|
601 | |
---|
602 | static int mc68681_write_support_polled( |
---|
603 | int minor, |
---|
604 | const char *buf, |
---|
605 | int len |
---|
606 | ) |
---|
607 | { |
---|
608 | int nwrite = 0; |
---|
609 | |
---|
610 | /* |
---|
611 | * poll each byte in the string out of the port. |
---|
612 | */ |
---|
613 | while (nwrite < len) { |
---|
614 | /* |
---|
615 | * transmit character |
---|
616 | */ |
---|
617 | mc68681_write_polled(minor, *buf++); |
---|
618 | nwrite++; |
---|
619 | } |
---|
620 | |
---|
621 | /* |
---|
622 | * return the number of bytes written. |
---|
623 | */ |
---|
624 | return nwrite; |
---|
625 | } |
---|
626 | |
---|
627 | /* |
---|
628 | * mc68681_inbyte_nonblocking_polled |
---|
629 | * |
---|
630 | * Console Termios polling input entry point. |
---|
631 | */ |
---|
632 | |
---|
633 | static int mc68681_inbyte_nonblocking_polled( |
---|
634 | int minor |
---|
635 | ) |
---|
636 | { |
---|
637 | unsigned32 pMC68681; |
---|
638 | unsigned char ucLineStatus; |
---|
639 | char cChar; |
---|
640 | getRegister_f getReg; |
---|
641 | getData_f getData; |
---|
642 | |
---|
643 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
---|
644 | getReg = Console_Port_Tbl[minor].getRegister; |
---|
645 | getData = Console_Port_Tbl[minor].getData; |
---|
646 | |
---|
647 | ucLineStatus = (*getReg)(pMC68681, MC68681_STATUS_REG); |
---|
648 | if(ucLineStatus & MC68681_RX_READY) { |
---|
649 | cChar = (*getData)(pMC68681); |
---|
650 | return (int)cChar; |
---|
651 | } else { |
---|
652 | return(-1); |
---|
653 | } |
---|
654 | } |
---|