source: rtems/c/src/libchip/serial/mc68681.c @ e78c474b

4.104.114.84.95
Last change on this file since e78c474b was e78c474b, checked in by Joel Sherrill <joel.sherrill@…>, on 07/09/98 at 22:21:54

Added proper handling of extended baud rate table selection at boot time.

Still need to address default terminal settings.

  • Property mode set to 100644
File size: 23.1 KB
RevLine 
[cd58d82]1/*
2 *  This file contains the termios TTY driver for the Motorola MC68681.
3 *
4 *  This part is available from a number of secondary sources.
5 *  In particular, we know about the following:
6 *
7 *     + Exar 88c681 and 68c681
8 *
9 *  COPYRIGHT (c) 1989-1998.
10 *  On-Line Applications Research Corporation (OAR).
11 *  Copyright assigned to U.S. Government, 1994.
12 *
13 *  The license and distribution terms for this file may be
14 *  found in the file LICENSE in this distribution or at
15 *  http://www.OARcorp.com/rtems/license.html.
16 *
17 *  $Id$
18 */
19
20#include <rtems.h>
21#include <rtems/libio.h>
22#include <stdlib.h>
23#include <ringbuf.h>
24
25#include <libchip/serial.h>
[2d8e51aa]26#include "sersupp.h"
[cd58d82]27#include "mc68681_p.h"
[ab2dbd7]28#include "mc68681.h"
[cd58d82]29
30/*
31 * Flow control is only supported when using interrupts
32 */
[424e23ee]33
[cd58d82]34console_fns mc68681_fns =
35{
36  mc68681_probe,                  /* deviceProbe */
37  mc68681_open,                   /* deviceFirstOpen */
38  mc68681_flush,                  /* deviceLastClose */
39  NULL,                           /* deviceRead */
40  mc68681_write_support_int,      /* deviceWrite */
41  mc68681_initialize_interrupts,  /* deviceInitialize */
42  mc68681_write_polled,           /* deviceWritePolled */
[25c3ff91]43  mc68681_set_attributes,         /* deviceSetAttributes */
[cd58d82]44  FALSE,                          /* deviceOutputUsesInterrupts */
45};
46
47console_fns mc68681_fns_polled =
48{
49  mc68681_probe,                       /* deviceProbe */
50  mc68681_open,                        /* deviceFirstOpen */
51  mc68681_close,                       /* deviceLastClose */
52  mc68681_inbyte_nonblocking_polled,   /* deviceRead */
53  mc68681_write_support_polled,        /* deviceWrite */
54  mc68681_init,                        /* deviceInitialize */
55  mc68681_write_polled,                /* deviceWritePolled */
[25c3ff91]56  mc68681_set_attributes,              /* deviceSetAttributes */
[cd58d82]57  FALSE,                               /* deviceOutputUsesInterrupts */
58};
59
60extern void set_vector( rtems_isr_entry, rtems_vector_number, int );
61
62/*
63 *  Console Device Driver Entry Points
64 */
[424e23ee]65
[beaaf49f]66/*
67 *  mc68681_probe
68 *
69 *  Default probe routine which simply say the port is present.
70 */
71
[2d8e51aa]72MC68681_STATIC boolean mc68681_probe(int minor)
[cd58d82]73{
74  /*
[ab2dbd7]75   * If the configuration dependent probe has located the device then
[cd58d82]76   * assume it is there
77   */
78  return(TRUE);
79}
80
[beaaf49f]81/*
82 *  mc68681_baud_rate
83 *
84 *  This routine returns the proper ACR bit and baud rate field values
85 *  based on the requested baud rate.  The baud rate set to be used
86 *  must be configured by the user.
87 */
88
[2d8e51aa]89/* major index of 0 : ACR[7] = 0, X = 0 -- 68c681 only has these */
90/* major index of 1 : ACR[7] = 1, X = 0 -- 68c681 only has these */
91/* major index of 2 : ACR[7] = 0, X = 1 */
92/* major index of 3 : ACR[7] = 1, X = 1 */
93
94/* mc68681_baud_table_t mc68681_baud_rate_table[4] = { */
95mc68681_baud_t mc68681_baud_rate_table[4][RTEMS_TERMIOS_NUMBER_BAUD_RATES] = {
96  { /* ACR[7] = 0, X = 0 */
97    MC68681_BAUD_NOT_VALID,    /* B0 */
98    0x00,                      /* B50 */
99    MC68681_BAUD_NOT_VALID,    /* B75 */
100    0x01,                      /* B110 */
101    0x02,                      /* B134 */
102    MC68681_BAUD_NOT_VALID,    /* B150 */
103    0x03,                      /* B200 */
104    0x04,                      /* B300 */
105    0x05,                      /* B600 */
106    0x06,                      /* B1200 */
107    MC68681_BAUD_NOT_VALID,    /* B1800 */
108    0x08,                      /* B2400 */
109    0x09,                      /* B4800 */
110    0x0B,                      /* B9600 */
111    MC68681_BAUD_NOT_VALID,    /* B19200 */
112    0x0C,                      /* B38400 */
113    MC68681_BAUD_NOT_VALID,    /* B57600 */
114    MC68681_BAUD_NOT_VALID,    /* B115200 */
115    MC68681_BAUD_NOT_VALID,    /* B230400 */
116    MC68681_BAUD_NOT_VALID     /* B460800 */
117  },
118  { /* ACR[7] = 1, X = 0 */
119    MC68681_BAUD_NOT_VALID,    /* B0 */
120    MC68681_BAUD_NOT_VALID,    /* B50 */
121    0x00,                      /* B75 */
122    0x01,                      /* B110 */
123    0x02,                      /* B134 */
124    0x03,                      /* B150 */
125    MC68681_BAUD_NOT_VALID,    /* B200 */
126    0x04,                      /* B300 */
127    0x05,                      /* B600 */
128    0x06,                      /* B1200 */
129    0x0A,                      /* B1800 */
130    0x08,                      /* B2400 */
131    0x09,                      /* B4800 */
132    0x0B,                      /* B9600 */
133    0x0C,                      /* B19200 */
134    MC68681_BAUD_NOT_VALID,    /* B38400 */
135    MC68681_BAUD_NOT_VALID,    /* B57600 */
136    MC68681_BAUD_NOT_VALID,    /* B115200 */
137    MC68681_BAUD_NOT_VALID,    /* B230400 */
138    MC68681_BAUD_NOT_VALID     /* B460800 */
139  },
140  { /* ACR[7] = 0, X = 1 */
141    MC68681_BAUD_NOT_VALID,    /* B0 */
142    MC68681_BAUD_NOT_VALID,    /* B50 */
143    0x00,                      /* B75 */
144    0x01,                      /* B110 */
145    0x02,                      /* B134 */
146    0x03,                      /* B150 */
147    MC68681_BAUD_NOT_VALID,    /* B200 */
148    MC68681_BAUD_NOT_VALID,    /* B300 */
149    MC68681_BAUD_NOT_VALID,    /* B600 */
150    MC68681_BAUD_NOT_VALID,    /* B1200 */
151    0x0A,                      /* B1800 */
152    MC68681_BAUD_NOT_VALID,    /* B2400 */
153    0x08,                      /* B4800 */
154    0x0B,                      /* B9600 */
155    0x0C,                      /* B19200 */
156    MC68681_BAUD_NOT_VALID,    /* B38400 */
157    0x07,                      /* B57600 */
158    0x08,                      /* B115200 */
159    MC68681_BAUD_NOT_VALID,    /* B230400 */
160    MC68681_BAUD_NOT_VALID     /* B460800 */
161  },
162  { /* ACR[7] = 1, X = 1 */
163    MC68681_BAUD_NOT_VALID,    /* B0 */
164    0x00,                      /* B50 */
165    MC68681_BAUD_NOT_VALID,    /* B75 */
166    0x01,                      /* B110 */
167    0x02,                      /* B134 */
168    MC68681_BAUD_NOT_VALID,    /* B150 */
169    0x03,                      /* B200 */
170    MC68681_BAUD_NOT_VALID,    /* B300 */
171    MC68681_BAUD_NOT_VALID,    /* B600 */
172    MC68681_BAUD_NOT_VALID,    /* B1200 */
173    MC68681_BAUD_NOT_VALID,    /* B1800 */
174    MC68681_BAUD_NOT_VALID,    /* B2400 */
175    0x09,                      /* B4800 */
176    0x0B,                      /* B9600 */
177    MC68681_BAUD_NOT_VALID,    /* B19200 */
178    0x0C,                      /* B38400 */
179    0x07,                      /* B57600 */
180    0x08,                      /* B115200 */
181    MC68681_BAUD_NOT_VALID,    /* B230400 */
182    MC68681_BAUD_NOT_VALID     /* B460800 */
183  },
184};
185
186MC68681_STATIC int mc68681_baud_rate(
[25c3ff91]187  int           minor,
188  int           baud,
189  unsigned int *baud_mask_p,
[2d8e51aa]190  unsigned int *acr_bit_p,
191  unsigned int *command
192);
[25c3ff91]193
[beaaf49f]194/*
195 *  mc68681_set_attributes
196 *
197 *  This function sets the DUART channel to reflect the requested termios
198 *  port settings.
199 */
200
[2d8e51aa]201MC68681_STATIC int mc68681_set_attributes(
[25c3ff91]202  int minor,
203  const struct termios *t
204)
205{
206  unsigned32             pMC68681_port;
207  unsigned32             pMC68681;
208  unsigned int           mode1;
209  unsigned int           mode2;
210  unsigned int           baud_mask;
211  unsigned int           acr_bit;
[2d8e51aa]212  unsigned int           cmd;
[25c3ff91]213  setRegister_f          setReg;
214  rtems_interrupt_level  Irql;
[cd58d82]215
[4f0ffa57]216  pMC68681      = Console_Port_Tbl[minor].ulCtrlPort1;
217  pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
[7deeb16]218  setReg        = Console_Port_Tbl[minor].setRegister;
219
220  /*
[25c3ff91]221   *  Set the baud rate
[7deeb16]222   */
223
[2d8e51aa]224  if (mc68681_baud_rate( minor, t->c_cflag, &baud_mask, &acr_bit, &cmd ) == -1)
[25c3ff91]225    return -1;
226
227  baud_mask |=  baud_mask << 4;
228  acr_bit   <<= 7;
[7deeb16]229
230  /*
[25c3ff91]231   *  Parity
[7deeb16]232   */
233
[25c3ff91]234  mode1 = 0;
235  mode2 = 0;
[7deeb16]236
[25c3ff91]237  if (t->c_cflag & PARENB) {
238    if (t->c_cflag & PARODD)
239      mode1 |= 0x04;
240    else
241      mode1 |= 0x04;
242  } else {
243   mode1 |= 0x10;
244  }
[cd58d82]245
[25c3ff91]246  /*
247   *  Character Size
[cd58d82]248   */
249
[25c3ff91]250  if (t->c_cflag & CSIZE) {
251    switch (t->c_cflag & CSIZE) {
252      case CS5:  break;
253      case CS6:  mode1 |= 0x01;  break;
254      case CS7:  mode1 |= 0x02;  break;
255      case CS8:  mode1 |= 0x03;  break;
256    }
257  } else {
258    mode1 |= 0x03;       /* default to 9600,8,N,1 */
259  }
[cd58d82]260
[25c3ff91]261  /*
262   *  Stop Bits
263   */
264 
265  if (t->c_cflag & CSTOPB) {
266    mode2 |= 0x07;                      /* 2 stop bits */
267  } else {
268    if ((t->c_cflag & CSIZE) == CS5)    /* CS5 and 2 stop bits not supported */
269      return -1;
270    mode2 |= 0x0F;                      /* 1 stop bit */
271  }
[cd58d82]272
[25c3ff91]273  rtems_interrupt_disable(Irql);
274    (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr_bit );
275    (*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud_mask );
[2c5ea01]276    if ( cmd ) {
277      (*setReg)( pMC68681_port, MC68681_COMMAND, cmd );         /* RX */
278      (*setReg)( pMC68681_port, MC68681_COMMAND, cmd | 0x20 );  /* TX */
279    }
[25c3ff91]280    (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_MR_PTR );
281    (*setReg)( pMC68681_port, MC68681_MODE, mode1 );
282    (*setReg)( pMC68681_port, MC68681_MODE, mode2 );
283  rtems_interrupt_enable(Irql);
284  return 0;
285}
[cd58d82]286
[beaaf49f]287/*
288 *  mc68681_initialize_context
289 *
290 *  This function sets the default values of the per port context structure.
291 */
292
[2d8e51aa]293MC68681_STATIC void mc68681_initialize_context(
[a5d0c7c]294  int               minor,
295  mc68681_context  *pmc68681Context
296)
297{
298  int          port;
299  unsigned int pMC68681;
300 
301  pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
302
303  pmc68681Context->mate = -1;
304
305  for (port=0 ; port<Console_Port_Count ; port++ ) {
306    if ( Console_Port_Tbl[port].ulCtrlPort1 == pMC68681 ) {
307      pmc68681Context->mate = port;
308      break;
309    }
310  }
311
312}
313
[beaaf49f]314/*
315 *  mc68681_build_imr
316 *
317 *  This function returns the value for the interrupt mask register for this
318 *  DUART.  Since this is a shared register, we must look at the other port
319 *  on this chip to determine whether or not it is using interrupts.
320 */
321
[2d8e51aa]322MC68681_STATIC unsigned int mc68681_build_imr(
[4f0ffa57]323  int  minor,
324  int  enable_flag
[a5d0c7c]325)
326{
327  int              mate;
328  unsigned int     mask;
329  unsigned int     mate_mask;
330  unsigned int     pMC68681;
331  unsigned int     pMC68681_port;
332  mc68681_context *pmc68681Context;
333 
334  pMC68681       = Console_Port_Tbl[minor].ulCtrlPort1;
335  pMC68681_port  = Console_Port_Tbl[minor].ulCtrlPort2;
336  pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext;
337  mate            = pmc68681Context->mate;
338
339  mate_mask = 0;
340
341  /*
342   *  Decide if the other port on this DUART is using interrupts
343   */
344
345  if ( mate != -1 ) {
346    if ( Console_Port_Tbl[mate].pDeviceFns->deviceOutputUsesInterrupts )
347      mate_mask = 0x03;
348
349    /*
350     *  If equal, then minor is A so the mate must be B
351     */
352
353    if ( pMC68681 == pMC68681_port )
354      mate_mask <<= 4;
355  }
356
357  /*
358   *  Add in minor's mask
359   */
360
361  mask = 0;
[4f0ffa57]362  if ( enable_flag ) {
363    if ( Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts ) {
364      if ( pMC68681 == pMC68681_port )
365         mask = 0x03;
366      else
367         mask = 0x30;
368    }
[a5d0c7c]369  }
370
[2c5ea01]371#if 0
[a5d0c7c]372  return mask | mate_mask;
[2c5ea01]373#endif
374
375  return 0;
[a5d0c7c]376}
377
[beaaf49f]378/*
379 *  mc68681_init
380 *
381 *  This function initializes the DUART to a quiecsent state.
382 */
383
[2d8e51aa]384MC68681_STATIC void mc68681_init(int minor)
[25c3ff91]385{
386  unsigned32              pMC68681_port;
387  unsigned32              pMC68681;
388  mc68681_context        *pmc68681Context;
389  setRegister_f           setReg;
390  getRegister_f           getReg;
391
392  pmc68681Context = (mc68681_context *) malloc(sizeof(mc68681_context));
[cd58d82]393
[25c3ff91]394  Console_Port_Data[minor].pDeviceContext = (void *)pmc68681Context;
[a5d0c7c]395
396  mc68681_initialize_context( minor, pmc68681Context );
[cd58d82]397
[4f0ffa57]398  pMC68681      = Console_Port_Tbl[minor].ulCtrlPort1;
399  pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
[25c3ff91]400  setReg        = Console_Port_Tbl[minor].setRegister;
401  getReg        = Console_Port_Tbl[minor].getRegister;
[cd58d82]402
403  /*
[25c3ff91]404   *  Reset everything and leave this port disabled.
[cd58d82]405   */
406
[25c3ff91]407  (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_RESET_RX );
408  (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_RESET_TX );
409  (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_RESET_ERROR );
410  (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_RESET_BREAK );
411  (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_STOP_BREAK );
412  (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX );
413  (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX );
[cd58d82]414
[25c3ff91]415
416  (*setReg)( pMC68681, MC68681_MODE_REG_1A, 0x00 );
417  (*setReg)( pMC68681, MC68681_MODE_REG_2A, 0x02 );
[4f0ffa57]418
419  /*
420   *  Disable interrupts on RX and TX for this port
421   */
422
423  (*setReg)( pMC68681, MC68681_INTERRUPT_MASK_REG, mc68681_build_imr(minor, 0));
[cd58d82]424}
425
[25c3ff91]426/*
[beaaf49f]427 *  mc68681_open
428 *
429 *  This function opens a port for communication.
430 *
431 *  Default state is 9600 baud, 8 bits, No parity, and 1 stop bit.
[25c3ff91]432 */
433
[2d8e51aa]434MC68681_STATIC int mc68681_open(
[cd58d82]435  int      major,
436  int      minor,
[25c3ff91]437  void    *arg
[cd58d82]438)
439{
[25c3ff91]440  unsigned32             pMC68681;
441  unsigned32             pMC68681_port;
442  unsigned int           baud;
443  unsigned int           acr;
444  unsigned int           vector;
[2d8e51aa]445  unsigned int           command;
[25c3ff91]446  rtems_interrupt_level  Irql;
447  setRegister_f          setReg;
448
449  pMC68681      = Console_Port_Tbl[minor].ulCtrlPort1;
450  pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
451  setReg        = Console_Port_Tbl[minor].setRegister;
452  vector        = Console_Port_Tbl[minor].ulIntVector;
453
[e78c474b]454  /* XXX default baud rate should be from configuration table */
455
[2d8e51aa]456  (void) mc68681_baud_rate( minor, B9600, &baud, &acr, &command );
[25c3ff91]457
[b7ebcea3]458  /*
459   *  Set the DUART channel to a default useable state
460   */
461
[25c3ff91]462  rtems_interrupt_disable(Irql);
463    (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr );
464    (*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud );
[e78c474b]465    if ( command ) {
466      (*setReg)( pMC68681_port, MC68681_COMMAND, command );         /* RX */
467      (*setReg)( pMC68681_port, MC68681_COMMAND, command | 0x20 );  /* TX */
468    }
[25c3ff91]469    (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_MR_PTR );
470    (*setReg)( pMC68681_port, MC68681_MODE, 0x13 );
471    (*setReg)( pMC68681_port, MC68681_MODE, 0x07 );
472  rtems_interrupt_enable(Irql);
473
474  (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_ENABLE_TX );
475  (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_ENABLE_RX );
476
477  (*setReg)( pMC68681, MC68681_INTERRUPT_VECTOR_REG, vector );
478
[4f0ffa57]479  return RTEMS_SUCCESSFUL;
[cd58d82]480}
481
[beaaf49f]482/*
483 *  mc68681_close
484 *
485 *  This function shuts down the requested port.
486 */
487
[2d8e51aa]488MC68681_STATIC int mc68681_close(
[cd58d82]489  int      major,
490  int      minor,
[25c3ff91]491  void    *arg
[cd58d82]492)
493{
[b7ebcea3]494  unsigned32      pMC68681;
495  unsigned32      pMC68681_port;
496  setRegister_f   setReg;
497
498  pMC68681      = Console_Port_Tbl[minor].ulCtrlPort1;
499  pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
500  setReg        = Console_Port_Tbl[minor].setRegister;
501
502  /*
503   *  Disable interrupts from this channel and then disable it totally.
504   */
505
506  (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX );
507  (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX );
508
[cd58d82]509  return(RTEMS_SUCCESSFUL);
510}
511
512/*
513 *  mc68681_write_polled
[beaaf49f]514 *
515 *  This routine polls out the requested character.
[cd58d82]516 */
[424e23ee]517
[2d8e51aa]518MC68681_STATIC void mc68681_write_polled(
[cd58d82]519  int   minor,
520  char  cChar
521)
522{
[25c3ff91]523  unsigned32              pMC68681_port;
[cd58d82]524  unsigned char           ucLineStatus;
525  int                     iTimeout;
526  getRegister_f           getReg;
[25c3ff91]527  setRegister_f           setReg;
[cd58d82]528
[25c3ff91]529  pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
530  getReg        = Console_Port_Tbl[minor].getRegister;
531  setReg        = Console_Port_Tbl[minor].setRegister;
[cd58d82]532
533  /*
534   * wait for transmitter holding register to be empty
535   */
[ab2dbd7]536  iTimeout = 1000;
[25c3ff91]537  ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
[2c5ea01]538  while ((ucLineStatus & (MC68681_TX_READY|MC68681_TX_EMPTY)) == 0) {
539
540    if ((ucLineStatus & 0xF0))
541      (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_ERROR );
[ab2dbd7]542
[cd58d82]543    /*
544     * Yield while we wait
545     */
[ab2dbd7]546
[cd58d82]547     if(_System_state_Is_up(_System_state_Get())) {
548       rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
549     }
[25c3ff91]550     ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
[cd58d82]551     if(!--iTimeout) {
552       break;
553     }
554  }
555
556  /*
557   * transmit character
558   */
[ab2dbd7]559
[25c3ff91]560  (*setReg)(pMC68681_port, MC68681_TX_BUFFER, cChar);
[cd58d82]561}
562
563/*
[4f0ffa57]564 *  mc68681_process
[cd58d82]565 *
[4f0ffa57]566 *  This routine is the per port console interrupt handler.
[cd58d82]567 */
568
[2d8e51aa]569MC68681_STATIC void mc68681_process(
[4f0ffa57]570  int  minor
[cd58d82]571)
572{
573  unsigned32              pMC68681;
[4f0ffa57]574  unsigned32              pMC68681_port;
[cd58d82]575  volatile unsigned8      ucLineStatus;
576  char                    cChar;
577  getRegister_f           getReg;
578  setRegister_f           setReg;
579
[4f0ffa57]580  pMC68681      = Console_Port_Tbl[minor].ulCtrlPort1;
581  pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
582  getReg        = Console_Port_Tbl[minor].getRegister;
583  setReg        = Console_Port_Tbl[minor].setRegister;
[cd58d82]584
[4f0ffa57]585  /*
586   * Deal with any received characters
587   */
588  while(TRUE) {
589    ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
590    if(!(ucLineStatus & MC68681_RX_READY)) {
591      break;
592    }
[cd58d82]593    /*
[4f0ffa57]594     *  If there is a RX error, then dump all the data.
[cd58d82]595     */
[4f0ffa57]596    if ( ucLineStatus & MC68681_RX_ERRORS ) {
597      do {
598        cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER);
599        ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
600      } while ( ucLineStatus & MC68681_RX_READY );
601      continue;
[cd58d82]602    }
[4f0ffa57]603    cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER);
604    rtems_termios_enqueue_raw_characters(
605      Console_Port_Data[minor].termios_data,
606      &cChar,
607      1
608    );
609  }
[cd58d82]610
[4f0ffa57]611  /*
612   *  Deal with the transmitter
613   */
[cd58d82]614
[4f0ffa57]615  while(TRUE) {
616    if(Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) {
617      Console_Port_Data[minor].bActive = FALSE;
[cd58d82]618
[4f0ffa57]619      /*
620       * There is no data to transmit
621       */
622      break;
623    }
[cd58d82]624
[4f0ffa57]625    ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
626    if(!(ucLineStatus & (MC68681_TX_EMPTY|MC68681_TX_READY))) {
[cd58d82]627      /*
[4f0ffa57]628       *  We'll get another interrupt when the TX can take another character.
[cd58d82]629       */
[4f0ffa57]630      break;
[cd58d82]631    }
632
[4f0ffa57]633    Ring_buffer_Remove_character( &Console_Port_Data[minor].TxBuffer, cChar);
634    /*
635     * transmit character
636     */
637    (*setReg)(pMC68681_port, MC68681_TX_BUFFER, cChar);
[cd58d82]638  }
[4f0ffa57]639
[cd58d82]640}
641
[4f0ffa57]642/*
643 *  mc68681_isr
644 *
645 *  This is the single interrupt entry point which parcels interrupts
646 *  out to the various ports.
647 */
648
[2d8e51aa]649MC68681_STATIC rtems_isr mc68681_isr(
[cd58d82]650  rtems_vector_number vector
651)
652{
653  int     minor;
654
[ab2dbd7]655  for(minor=0 ; minor<Console_Port_Count ; minor++) {
656    if(vector == Console_Port_Tbl[minor].ulIntVector) {
[cd58d82]657      mc68681_process(minor);
658    }
659  }
660}
661
662/*
663 *  mc68681_flush
[beaaf49f]664 *
665 *  This routine waits before all output is completed before closing
666 *  the requested port.
667 *
668 *  NOTE:  This is the "interrupt mode" close entry point.
[cd58d82]669 */
[ab2dbd7]670
[2d8e51aa]671MC68681_STATIC int mc68681_flush(int major, int minor, void *arg)
[cd58d82]672{
673  while(!Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) {
674    /*
675     * Yield while we wait
676     */
677    if(_System_state_Is_up(_System_state_Get())) {
678      rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
679    }
680  }
681
682  mc68681_close(major, minor, arg);
683
684  return(RTEMS_SUCCESSFUL);
685}
686
687/*
[beaaf49f]688 *  mc68681_enable_interrupts
[cd58d82]689 *
[beaaf49f]690 *  This function initializes the hardware for this port to use interrupts.
[cd58d82]691 */
692
[2d8e51aa]693MC68681_STATIC void mc68681_enable_interrupts(
[cd58d82]694  int minor
695)
696{
697  unsigned32            pMC68681;
[ab2dbd7]698  setRegister_f         setReg;
[cd58d82]699
700  pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1;
701  setReg   = Console_Port_Tbl[minor].setRegister;
702
703  /*
[a5d0c7c]704   *  Enable interrupts on RX and TX -- not break
[cd58d82]705   */
[a5d0c7c]706
[4f0ffa57]707  (*setReg)( pMC68681, MC68681_INTERRUPT_MASK_REG, mc68681_build_imr(minor, 1));
[cd58d82]708}
709
[beaaf49f]710/*
711 *  mc68681_initialize_interrupts
712 *
713 *  This routine initializes the console's receive and transmit
714 *  ring buffers and loads the appropriate vectors to handle the interrupts.
715 */
716
[2d8e51aa]717MC68681_STATIC void mc68681_initialize_interrupts(int minor)
[cd58d82]718{
719  mc68681_init(minor);
720
721  Ring_buffer_Initialize(&Console_Port_Data[minor].TxBuffer);
722
723  Console_Port_Data[minor].bActive = FALSE;
724
725  set_vector(mc68681_isr, Console_Port_Tbl[minor].ulIntVector, 1);
726
727  mc68681_enable_interrupts(minor);
728}
729
730/*
731 *  mc68681_write_support_int
732 *
[beaaf49f]733 *  Console Termios output entry point when using interrupt driven output.
[cd58d82]734 */
[ab2dbd7]735
[2d8e51aa]736MC68681_STATIC int mc68681_write_support_int(
[cd58d82]737  int   minor,
738  const char *buf,
739  int   len
740)
741{
742  int i;
743  unsigned32 Irql;
744
[ab2dbd7]745  for(i=0 ; i<len ;) {
[cd58d82]746    if(Ring_buffer_Is_full(&Console_Port_Data[minor].TxBuffer)) {
747      if(!Console_Port_Data[minor].bActive) {
748        /*
749         * Wake up the device
750         */
751        rtems_interrupt_disable(Irql);
752        Console_Port_Data[minor].bActive = TRUE;
753        mc68681_process(minor);
754        rtems_interrupt_enable(Irql);
755      } else {
756        /*
757         * Yield
758         */
759        rtems_task_wake_after(RTEMS_YIELD_PROCESSOR);
760      }
761
762      /*
763       * Wait for ring buffer to empty
764       */
765      continue;
766    }
767    else {
768      Ring_buffer_Add_character( &Console_Port_Data[minor].TxBuffer, buf[i]);
769      i++;
770    }
771  }
772
773  /*
774   * Ensure that characters are on the way
775   */
[ab2dbd7]776
[cd58d82]777  if(!Console_Port_Data[minor].bActive) {
778    /*
779     * Wake up the device
780     */
781    rtems_interrupt_disable(Irql);
782    Console_Port_Data[minor].bActive = TRUE;
783    mc68681_process(minor);
784    rtems_interrupt_enable(Irql);
785  }
786
787  return (len);
788}
789
790/*
791 *  mc68681_write_support_polled
792 *
[beaaf49f]793 *  Console Termios output entry point when using polled output.
[cd58d82]794 *
795 */
[ab2dbd7]796
[2d8e51aa]797MC68681_STATIC int mc68681_write_support_polled(
[cd58d82]798  int         minor,
799  const char *buf,
800  int         len
801)
802{
803  int nwrite = 0;
804
805  /*
806   * poll each byte in the string out of the port.
807   */
808  while (nwrite < len) {
809    /*
810     * transmit character
811     */
812    mc68681_write_polled(minor, *buf++);
813    nwrite++;
814  }
815
816  /*
817   * return the number of bytes written.
818   */
819  return nwrite;
820}
821
822/*
823 *  mc68681_inbyte_nonblocking_polled
824 *
825 *  Console Termios polling input entry point.
826 */
827
[2d8e51aa]828MC68681_STATIC int mc68681_inbyte_nonblocking_polled(
[cd58d82]829  int minor
830)
831{
[25c3ff91]832  unsigned32           pMC68681_port;
[cd58d82]833  unsigned char        ucLineStatus;
[2c5ea01]834  unsigned char        cChar;
[cd58d82]835  getRegister_f        getReg;
836
[25c3ff91]837  pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2;
838  getReg        = Console_Port_Tbl[minor].getRegister;
[cd58d82]839
[25c3ff91]840  ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS);
[ab2dbd7]841  if(ucLineStatus & MC68681_RX_READY) {
[25c3ff91]842    cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER);
[ab2dbd7]843    return (int)cChar;
[cd58d82]844  } else {
[25c3ff91]845    return -1;
[cd58d82]846  }
847}
[2d8e51aa]848
849MC68681_STATIC int mc68681_baud_rate(
850  int           minor,
851  int           baud,
852  unsigned int *baud_mask_p,
853  unsigned int *acr_bit_p,
854  unsigned int *command
855)
856{
857  unsigned int     baud_mask;
858  unsigned int     acr_bit;
859  int              status;
860  int              is_extended;
861  int              baud_requested;
862  mc68681_baud_table_t  *baud_tbl;
863
864  baud_mask = 0;
865  acr_bit = 0;
866  status = 0;
867
868  if ( !(Console_Port_Tbl[minor].ulDataPort & MC68681_DATA_BAUD_RATE_SET_1) )
869    acr_bit = 1;
870
871  is_extended = 0;
872
873  switch (Console_Port_Tbl[minor].ulDataPort & MC68681_XBRG_MASK) {
874    case MC68681_XBRG_IGNORED:
875      *command = 0x00;
876      break;
877    case MC68681_XBRG_ENABLED:
[2c5ea01]878      *command = 0x80;
[2d8e51aa]879      is_extended = 1;
880      break;
881    case MC68681_XBRG_DISABLED:
[2c5ea01]882      *command = 0x90;
[2d8e51aa]883      break;
884  }
885
886  baud_requested = baud & CBAUD;
887  if (!baud_requested)
[2c5ea01]888    baud_requested = B9600;              /* default to 9600 baud */
[2d8e51aa]889 
890  baud_requested = termios_baud_to_index( baud_requested );
891
892  baud_tbl = (mc68681_baud_table_t *) Console_Port_Tbl[minor].ulClock;
893  if (!baud_tbl)
894    baud_tbl = (mc68681_baud_table_t *)mc68681_baud_rate_table;
895
896  if ( is_extended )
897    baud_mask = (unsigned int)baud_tbl[ acr_bit + 2 ][ baud_requested ];
898  else
899    baud_mask = baud_tbl[ acr_bit ][ baud_requested ];
900
901  if ( baud_mask == MC68681_BAUD_NOT_VALID )
902    status = -1;
903
[2c5ea01]904  /*
905   *  upper nibble is receiver and lower nibble is transmitter
906   */
907
908  *baud_mask_p = (baud_mask << 4) | baud_mask;
[2d8e51aa]909  *acr_bit_p   = acr_bit;
910  return status;
911}
912
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