[cd58d82] | 1 | /* |
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| 2 | * This file contains the termios TTY driver for the Motorola MC68681. |
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| 3 | * |
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| 4 | * This part is available from a number of secondary sources. |
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| 5 | * In particular, we know about the following: |
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| 6 | * |
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| 7 | * + Exar 88c681 and 68c681 |
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| 8 | * |
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| 9 | * COPYRIGHT (c) 1989-1998. |
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| 10 | * On-Line Applications Research Corporation (OAR). |
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| 11 | * Copyright assigned to U.S. Government, 1994. |
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| 12 | * |
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| 13 | * The license and distribution terms for this file may be |
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| 14 | * found in the file LICENSE in this distribution or at |
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| 15 | * http://www.OARcorp.com/rtems/license.html. |
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| 16 | * |
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| 17 | * $Id$ |
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| 18 | */ |
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| 19 | |
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| 20 | #include <rtems.h> |
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| 21 | #include <rtems/libio.h> |
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| 22 | #include <stdlib.h> |
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| 23 | #include <ringbuf.h> |
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| 24 | |
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| 25 | #include <libchip/serial.h> |
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| 26 | #include "mc68681_p.h" |
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[ab2dbd7] | 27 | #include "mc68681.h" |
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[cd58d82] | 28 | |
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| 29 | /* |
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| 30 | * Flow control is only supported when using interrupts |
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| 31 | */ |
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[424e23ee] | 32 | |
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[cd58d82] | 33 | console_flow mc68681_flow_RTSCTS = |
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| 34 | { |
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| 35 | mc68681_negate_RTS, /* deviceStopRemoteTx */ |
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| 36 | mc68681_assert_RTS /* deviceStartRemoteTx */ |
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| 37 | }; |
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| 38 | |
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| 39 | console_flow mc68681_flow_DTRCTS = |
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| 40 | { |
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| 41 | mc68681_negate_DTR, /* deviceStopRemoteTx */ |
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| 42 | mc68681_assert_DTR /* deviceStartRemoteTx */ |
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| 43 | }; |
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| 44 | |
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| 45 | console_fns mc68681_fns = |
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| 46 | { |
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| 47 | mc68681_probe, /* deviceProbe */ |
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| 48 | mc68681_open, /* deviceFirstOpen */ |
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| 49 | mc68681_flush, /* deviceLastClose */ |
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| 50 | NULL, /* deviceRead */ |
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| 51 | mc68681_write_support_int, /* deviceWrite */ |
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| 52 | mc68681_initialize_interrupts, /* deviceInitialize */ |
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| 53 | mc68681_write_polled, /* deviceWritePolled */ |
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[25c3ff91] | 54 | mc68681_set_attributes, /* deviceSetAttributes */ |
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[cd58d82] | 55 | FALSE, /* deviceOutputUsesInterrupts */ |
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| 56 | }; |
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| 57 | |
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| 58 | console_fns mc68681_fns_polled = |
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| 59 | { |
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| 60 | mc68681_probe, /* deviceProbe */ |
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| 61 | mc68681_open, /* deviceFirstOpen */ |
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| 62 | mc68681_close, /* deviceLastClose */ |
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| 63 | mc68681_inbyte_nonblocking_polled, /* deviceRead */ |
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| 64 | mc68681_write_support_polled, /* deviceWrite */ |
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| 65 | mc68681_init, /* deviceInitialize */ |
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| 66 | mc68681_write_polled, /* deviceWritePolled */ |
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[25c3ff91] | 67 | mc68681_set_attributes, /* deviceSetAttributes */ |
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[cd58d82] | 68 | FALSE, /* deviceOutputUsesInterrupts */ |
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| 69 | }; |
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| 70 | |
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| 71 | extern void set_vector( rtems_isr_entry, rtems_vector_number, int ); |
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| 72 | |
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| 73 | /* |
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| 74 | * Console Device Driver Entry Points |
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| 75 | */ |
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[424e23ee] | 76 | |
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[beaaf49f] | 77 | /* |
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| 78 | * mc68681_probe |
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| 79 | * |
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| 80 | * Default probe routine which simply say the port is present. |
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| 81 | */ |
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| 82 | |
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[cd58d82] | 83 | static boolean mc68681_probe(int minor) |
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| 84 | { |
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| 85 | /* |
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[ab2dbd7] | 86 | * If the configuration dependent probe has located the device then |
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[cd58d82] | 87 | * assume it is there |
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| 88 | */ |
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| 89 | return(TRUE); |
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| 90 | } |
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| 91 | |
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[beaaf49f] | 92 | /* |
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| 93 | * mc68681_baud_rate |
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| 94 | * |
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| 95 | * This routine returns the proper ACR bit and baud rate field values |
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| 96 | * based on the requested baud rate. The baud rate set to be used |
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| 97 | * must be configured by the user. |
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| 98 | */ |
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| 99 | |
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[25c3ff91] | 100 | static int mc68681_baud_rate( |
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| 101 | int minor, |
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| 102 | int baud, |
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| 103 | unsigned int *baud_mask_p, |
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| 104 | unsigned int *acr_bit_p |
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| 105 | ) |
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[cd58d82] | 106 | { |
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[25c3ff91] | 107 | unsigned int baud_mask; |
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| 108 | unsigned int acr_bit; |
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| 109 | int status; |
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[cd58d82] | 110 | |
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[25c3ff91] | 111 | baud_mask = 0; |
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| 112 | acr_bit = 0; |
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| 113 | status = 0; |
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[cd58d82] | 114 | |
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[25c3ff91] | 115 | if ( !(Console_Port_Tbl[minor].ulDataPort & MC68681_DATA_BAUD_RATE_SET_1) ) |
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| 116 | acr_bit = 1; |
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| 117 | |
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| 118 | if (!(baud & CBAUD)) { |
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| 119 | *baud_mask_p = 0x0B; /* default to 9600 baud */ |
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| 120 | *acr_bit_p = acr_bit; |
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| 121 | return status; |
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| 122 | } |
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| 123 | |
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| 124 | if ( !acr_bit ) { |
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| 125 | switch (baud & CBAUD) { |
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| 126 | case B50: baud_mask = 0x00; break; |
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| 127 | case B110: baud_mask = 0x01; break; |
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| 128 | case B134: baud_mask = 0x02; break; |
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| 129 | case B200: baud_mask = 0x03; break; |
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| 130 | case B300: baud_mask = 0x04; break; |
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| 131 | case B600: baud_mask = 0x05; break; |
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| 132 | case B1200: baud_mask = 0x06; break; |
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| 133 | case B2400: baud_mask = 0x08; break; |
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| 134 | case B4800: baud_mask = 0x09; break; |
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| 135 | case B9600: baud_mask = 0x0B; break; |
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| 136 | case B38400: baud_mask = 0x0C; break; |
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| 137 | |
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| 138 | case B0: |
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| 139 | case B75: |
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| 140 | case B150: |
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| 141 | case B1800: |
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| 142 | case B19200: |
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| 143 | case B57600: |
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| 144 | case B115200: |
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| 145 | case B230400: |
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| 146 | case B460800: |
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| 147 | status = -1; |
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| 148 | break; |
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| 149 | } |
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| 150 | } else { |
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| 151 | switch (baud & CBAUD) { |
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| 152 | case B75: baud_mask = 0x00; break; |
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| 153 | case B110: baud_mask = 0x01; break; |
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| 154 | case B134: baud_mask = 0x02; break; |
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| 155 | case B150: baud_mask = 0x03; break; |
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| 156 | case B300: baud_mask = 0x04; break; |
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| 157 | case B600: baud_mask = 0x05; break; |
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| 158 | case B1200: baud_mask = 0x06; break; |
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| 159 | case B1800: baud_mask = 0x0A; break; |
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| 160 | case B2400: baud_mask = 0x08; break; |
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| 161 | case B4800: baud_mask = 0x09; break; |
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| 162 | case B9600: baud_mask = 0x0B; break; |
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| 163 | case B19200: baud_mask = 0x0C; break; |
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| 164 | |
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| 165 | case B0: |
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| 166 | case B50: |
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| 167 | case B200: |
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| 168 | case B38400: |
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| 169 | case B57600: |
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| 170 | case B115200: |
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| 171 | case B230400: |
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| 172 | case B460800: |
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| 173 | status = -1; |
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| 174 | break; |
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| 175 | } |
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| 176 | } |
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| 177 | |
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| 178 | *baud_mask_p = baud_mask; |
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| 179 | *acr_bit_p = acr_bit; |
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| 180 | return status; |
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| 181 | } |
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| 182 | |
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[beaaf49f] | 183 | /* |
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| 184 | * mc68681_set_attributes |
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| 185 | * |
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| 186 | * This function sets the DUART channel to reflect the requested termios |
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| 187 | * port settings. |
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| 188 | */ |
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| 189 | |
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[25c3ff91] | 190 | static int mc68681_set_attributes( |
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| 191 | int minor, |
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| 192 | const struct termios *t |
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| 193 | ) |
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| 194 | { |
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| 195 | unsigned32 pMC68681_port; |
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| 196 | unsigned32 pMC68681; |
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| 197 | unsigned int mode1; |
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| 198 | unsigned int mode2; |
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| 199 | unsigned int baud_mask; |
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| 200 | unsigned int acr_bit; |
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| 201 | setRegister_f setReg; |
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| 202 | rtems_interrupt_level Irql; |
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[cd58d82] | 203 | |
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[7deeb16] | 204 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 205 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 206 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 207 | |
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| 208 | /* |
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[25c3ff91] | 209 | * Set the baud rate |
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[7deeb16] | 210 | */ |
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| 211 | |
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[25c3ff91] | 212 | if ( mc68681_baud_rate( minor, t->c_cflag, &baud_mask, &acr_bit ) == -1 ) |
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| 213 | return -1; |
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| 214 | |
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| 215 | baud_mask |= baud_mask << 4; |
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| 216 | acr_bit <<= 7; |
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[7deeb16] | 217 | |
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| 218 | /* |
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[25c3ff91] | 219 | * Parity |
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[7deeb16] | 220 | */ |
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| 221 | |
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[25c3ff91] | 222 | mode1 = 0; |
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| 223 | mode2 = 0; |
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[7deeb16] | 224 | |
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[25c3ff91] | 225 | if (t->c_cflag & PARENB) { |
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| 226 | if (t->c_cflag & PARODD) |
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| 227 | mode1 |= 0x04; |
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| 228 | else |
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| 229 | mode1 |= 0x04; |
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| 230 | } else { |
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| 231 | mode1 |= 0x10; |
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| 232 | } |
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[cd58d82] | 233 | |
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[25c3ff91] | 234 | /* |
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| 235 | * Character Size |
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[cd58d82] | 236 | */ |
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| 237 | |
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[25c3ff91] | 238 | if (t->c_cflag & CSIZE) { |
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| 239 | switch (t->c_cflag & CSIZE) { |
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| 240 | case CS5: break; |
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| 241 | case CS6: mode1 |= 0x01; break; |
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| 242 | case CS7: mode1 |= 0x02; break; |
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| 243 | case CS8: mode1 |= 0x03; break; |
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| 244 | } |
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| 245 | } else { |
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| 246 | mode1 |= 0x03; /* default to 9600,8,N,1 */ |
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| 247 | } |
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[cd58d82] | 248 | |
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[25c3ff91] | 249 | /* |
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| 250 | * Stop Bits |
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| 251 | */ |
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| 252 | |
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| 253 | if (t->c_cflag & CSTOPB) { |
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| 254 | mode2 |= 0x07; /* 2 stop bits */ |
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| 255 | } else { |
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| 256 | if ((t->c_cflag & CSIZE) == CS5) /* CS5 and 2 stop bits not supported */ |
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| 257 | return -1; |
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| 258 | mode2 |= 0x0F; /* 1 stop bit */ |
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| 259 | } |
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[cd58d82] | 260 | |
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[25c3ff91] | 261 | rtems_interrupt_disable(Irql); |
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| 262 | (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr_bit ); |
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| 263 | (*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud_mask ); |
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| 264 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_MR_PTR ); |
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| 265 | (*setReg)( pMC68681_port, MC68681_MODE, mode1 ); |
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| 266 | (*setReg)( pMC68681_port, MC68681_MODE, mode2 ); |
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| 267 | rtems_interrupt_enable(Irql); |
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| 268 | return 0; |
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| 269 | } |
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[cd58d82] | 270 | |
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[beaaf49f] | 271 | /* |
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| 272 | * mc68681_initialize_context |
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| 273 | * |
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| 274 | * This function sets the default values of the per port context structure. |
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| 275 | */ |
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| 276 | |
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[a5d0c7c] | 277 | static void mc68681_initialize_context( |
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| 278 | int minor, |
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| 279 | mc68681_context *pmc68681Context |
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| 280 | ) |
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| 281 | { |
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| 282 | int port; |
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| 283 | unsigned int pMC68681; |
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| 284 | |
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| 285 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 286 | |
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| 287 | pmc68681Context->mate = -1; |
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| 288 | |
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| 289 | for (port=0 ; port<Console_Port_Count ; port++ ) { |
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| 290 | if ( Console_Port_Tbl[port].ulCtrlPort1 == pMC68681 ) { |
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| 291 | pmc68681Context->mate = port; |
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| 292 | break; |
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| 293 | } |
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| 294 | } |
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| 295 | |
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| 296 | pmc68681Context->ucModemCtrl = 0x00; /* XXX */ |
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| 297 | } |
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| 298 | |
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[beaaf49f] | 299 | /* |
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| 300 | * mc68681_build_imr |
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| 301 | * |
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| 302 | * This function returns the value for the interrupt mask register for this |
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| 303 | * DUART. Since this is a shared register, we must look at the other port |
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| 304 | * on this chip to determine whether or not it is using interrupts. |
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| 305 | */ |
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| 306 | |
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[a5d0c7c] | 307 | static unsigned int mc68681_build_imr( |
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| 308 | int minor |
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| 309 | ) |
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| 310 | { |
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| 311 | int mate; |
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| 312 | unsigned int mask; |
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| 313 | unsigned int mate_mask; |
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| 314 | unsigned int pMC68681; |
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| 315 | unsigned int pMC68681_port; |
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| 316 | mc68681_context *pmc68681Context; |
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| 317 | |
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| 318 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 319 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 320 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
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| 321 | mate = pmc68681Context->mate; |
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| 322 | |
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| 323 | mate_mask = 0; |
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| 324 | |
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| 325 | /* |
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| 326 | * Decide if the other port on this DUART is using interrupts |
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| 327 | */ |
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| 328 | |
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| 329 | if ( mate != -1 ) { |
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| 330 | if ( Console_Port_Tbl[mate].pDeviceFns->deviceOutputUsesInterrupts ) |
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| 331 | mate_mask = 0x03; |
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| 332 | |
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| 333 | /* |
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| 334 | * If equal, then minor is A so the mate must be B |
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| 335 | */ |
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| 336 | |
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| 337 | if ( pMC68681 == pMC68681_port ) |
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| 338 | mate_mask <<= 4; |
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| 339 | } |
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| 340 | |
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| 341 | /* |
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| 342 | * Add in minor's mask |
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| 343 | */ |
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| 344 | |
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| 345 | mask = 0; |
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| 346 | if ( Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts ) { |
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| 347 | if ( pMC68681 == pMC68681_port ) |
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| 348 | mask = 0x03; |
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| 349 | else |
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| 350 | mask = 0x30; |
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| 351 | } |
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| 352 | |
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| 353 | return mask | mate_mask; |
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| 354 | } |
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| 355 | |
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[beaaf49f] | 356 | /* |
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| 357 | * mc68681_init |
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| 358 | * |
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| 359 | * This function initializes the DUART to a quiecsent state. |
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| 360 | */ |
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| 361 | |
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[25c3ff91] | 362 | static void mc68681_init(int minor) |
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| 363 | { |
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| 364 | unsigned32 pMC68681_port; |
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| 365 | unsigned32 pMC68681; |
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| 366 | mc68681_context *pmc68681Context; |
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| 367 | setRegister_f setReg; |
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| 368 | getRegister_f getReg; |
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| 369 | |
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| 370 | pmc68681Context = (mc68681_context *) malloc(sizeof(mc68681_context)); |
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[cd58d82] | 371 | |
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[25c3ff91] | 372 | Console_Port_Data[minor].pDeviceContext = (void *)pmc68681Context; |
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[a5d0c7c] | 373 | |
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| 374 | mc68681_initialize_context( minor, pmc68681Context ); |
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[cd58d82] | 375 | |
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[25c3ff91] | 376 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 377 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 378 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 379 | getReg = Console_Port_Tbl[minor].getRegister; |
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[cd58d82] | 380 | |
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| 381 | /* |
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[25c3ff91] | 382 | * Reset everything and leave this port disabled. |
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[cd58d82] | 383 | */ |
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| 384 | |
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[25c3ff91] | 385 | (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_RESET_RX ); |
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| 386 | (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_RESET_TX ); |
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| 387 | (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_RESET_ERROR ); |
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| 388 | (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_RESET_BREAK ); |
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| 389 | (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_STOP_BREAK ); |
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| 390 | (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX ); |
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| 391 | (*setReg)( pMC68681, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX ); |
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[cd58d82] | 392 | |
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[25c3ff91] | 393 | |
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| 394 | (*setReg)( pMC68681, MC68681_MODE_REG_1A, 0x00 ); |
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| 395 | (*setReg)( pMC68681, MC68681_MODE_REG_2A, 0x02 ); |
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[cd58d82] | 396 | } |
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| 397 | |
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[25c3ff91] | 398 | /* |
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[beaaf49f] | 399 | * mc68681_open |
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| 400 | * |
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| 401 | * This function opens a port for communication. |
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| 402 | * |
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| 403 | * Default state is 9600 baud, 8 bits, No parity, and 1 stop bit. |
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[25c3ff91] | 404 | */ |
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| 405 | |
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[cd58d82] | 406 | static int mc68681_open( |
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| 407 | int major, |
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| 408 | int minor, |
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[25c3ff91] | 409 | void *arg |
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[cd58d82] | 410 | ) |
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| 411 | { |
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[25c3ff91] | 412 | unsigned32 pMC68681; |
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| 413 | unsigned32 pMC68681_port; |
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| 414 | unsigned int baud; |
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| 415 | unsigned int acr; |
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| 416 | unsigned int vector; |
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| 417 | rtems_interrupt_level Irql; |
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| 418 | setRegister_f setReg; |
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| 419 | |
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| 420 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 421 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 422 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 423 | vector = Console_Port_Tbl[minor].ulIntVector; |
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| 424 | |
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| 425 | (void) mc68681_baud_rate( minor, B9600, &baud, &acr ); |
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| 426 | |
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[b7ebcea3] | 427 | /* |
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| 428 | * Set the DUART channel to a default useable state |
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| 429 | */ |
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| 430 | |
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[25c3ff91] | 431 | rtems_interrupt_disable(Irql); |
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| 432 | (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr ); |
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| 433 | (*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud ); |
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| 434 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_MR_PTR ); |
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| 435 | (*setReg)( pMC68681_port, MC68681_MODE, 0x13 ); |
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| 436 | (*setReg)( pMC68681_port, MC68681_MODE, 0x07 ); |
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| 437 | rtems_interrupt_enable(Irql); |
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| 438 | |
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| 439 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_ENABLE_TX ); |
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| 440 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_ENABLE_RX ); |
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| 441 | |
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| 442 | (*setReg)( pMC68681, MC68681_INTERRUPT_VECTOR_REG, vector ); |
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| 443 | |
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[cd58d82] | 444 | /* |
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| 445 | * Assert DTR |
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| 446 | */ |
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| 447 | |
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| 448 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_DTRCTS) { |
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| 449 | mc68681_assert_DTR(minor); |
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| 450 | } |
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| 451 | |
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| 452 | return(RTEMS_SUCCESSFUL); |
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| 453 | } |
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| 454 | |
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[beaaf49f] | 455 | /* |
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| 456 | * mc68681_close |
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| 457 | * |
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| 458 | * This function shuts down the requested port. |
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| 459 | */ |
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| 460 | |
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[cd58d82] | 461 | static int mc68681_close( |
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| 462 | int major, |
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| 463 | int minor, |
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[25c3ff91] | 464 | void *arg |
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[cd58d82] | 465 | ) |
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| 466 | { |
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[b7ebcea3] | 467 | unsigned32 pMC68681; |
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| 468 | unsigned32 pMC68681_port; |
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| 469 | setRegister_f setReg; |
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| 470 | |
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| 471 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 472 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 473 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 474 | |
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| 475 | /* |
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| 476 | * Disable interrupts from this channel and then disable it totally. |
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| 477 | */ |
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| 478 | |
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| 479 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX ); |
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| 480 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX ); |
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| 481 | |
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[cd58d82] | 482 | /* |
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| 483 | * Negate DTR |
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| 484 | */ |
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[b7ebcea3] | 485 | |
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[cd58d82] | 486 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_DTRCTS) { |
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| 487 | mc68681_negate_DTR(minor); |
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| 488 | } |
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| 489 | |
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| 490 | return(RTEMS_SUCCESSFUL); |
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| 491 | } |
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| 492 | |
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| 493 | /* |
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| 494 | * mc68681_write_polled |
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[beaaf49f] | 495 | * |
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| 496 | * This routine polls out the requested character. |
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[cd58d82] | 497 | */ |
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[424e23ee] | 498 | |
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[cd58d82] | 499 | static void mc68681_write_polled( |
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| 500 | int minor, |
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| 501 | char cChar |
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| 502 | ) |
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| 503 | { |
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[25c3ff91] | 504 | unsigned32 pMC68681_port; |
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[cd58d82] | 505 | unsigned char ucLineStatus; |
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| 506 | int iTimeout; |
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| 507 | getRegister_f getReg; |
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[25c3ff91] | 508 | setRegister_f setReg; |
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[cd58d82] | 509 | |
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[25c3ff91] | 510 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 511 | getReg = Console_Port_Tbl[minor].getRegister; |
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| 512 | setReg = Console_Port_Tbl[minor].setRegister; |
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[cd58d82] | 513 | |
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| 514 | /* |
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| 515 | * wait for transmitter holding register to be empty |
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| 516 | */ |
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[ab2dbd7] | 517 | iTimeout = 1000; |
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[25c3ff91] | 518 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
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[ab2dbd7] | 519 | while ((ucLineStatus & MC68681_TX_READY) == 0) { |
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| 520 | |
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[cd58d82] | 521 | /* |
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| 522 | * Yield while we wait |
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| 523 | */ |
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[ab2dbd7] | 524 | |
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[cd58d82] | 525 | if(_System_state_Is_up(_System_state_Get())) { |
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| 526 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
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| 527 | } |
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[25c3ff91] | 528 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
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[cd58d82] | 529 | if(!--iTimeout) { |
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| 530 | break; |
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| 531 | } |
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| 532 | } |
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| 533 | |
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| 534 | /* |
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| 535 | * transmit character |
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| 536 | */ |
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[ab2dbd7] | 537 | |
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[25c3ff91] | 538 | (*setReg)(pMC68681_port, MC68681_TX_BUFFER, cChar); |
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[cd58d82] | 539 | } |
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| 540 | |
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| 541 | /* |
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| 542 | * These routines provide control of the RTS and DTR lines |
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| 543 | */ |
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[ab2dbd7] | 544 | |
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[cd58d82] | 545 | /* |
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| 546 | * mc68681_assert_RTS |
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| 547 | */ |
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[ab2dbd7] | 548 | |
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[cd58d82] | 549 | static int mc68681_assert_RTS(int minor) |
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| 550 | { |
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[ab2dbd7] | 551 | /* XXX */ |
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| 552 | |
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[cd58d82] | 553 | unsigned32 pMC68681; |
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| 554 | unsigned32 Irql; |
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[ab2dbd7] | 555 | mc68681_context *pmc68681Context; |
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[cd58d82] | 556 | setRegister_f setReg; |
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| 557 | |
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[ab2dbd7] | 558 | |
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| 559 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
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[cd58d82] | 560 | |
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| 561 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 562 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 563 | |
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| 564 | /* |
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| 565 | * Assert RTS |
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| 566 | */ |
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| 567 | rtems_interrupt_disable(Irql); |
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[ab2dbd7] | 568 | #if 0 |
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| 569 | pmc68681Context->ucModemCtrl |= SP_MODEM_RTS; |
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| 570 | (*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl); |
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| 571 | #endif |
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[cd58d82] | 572 | rtems_interrupt_enable(Irql); |
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| 573 | return 0; |
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| 574 | } |
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| 575 | |
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| 576 | /* |
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| 577 | * mc68681_negate_RTS |
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| 578 | */ |
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[beaaf49f] | 579 | |
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[cd58d82] | 580 | static int mc68681_negate_RTS(int minor) |
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| 581 | { |
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[ab2dbd7] | 582 | /* XXX */ |
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[cd58d82] | 583 | unsigned32 pMC68681; |
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| 584 | unsigned32 Irql; |
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[ab2dbd7] | 585 | mc68681_context *pmc68681Context; |
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[cd58d82] | 586 | setRegister_f setReg; |
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| 587 | |
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[ab2dbd7] | 588 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
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[cd58d82] | 589 | |
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| 590 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 591 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 592 | |
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| 593 | /* |
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| 594 | * Negate RTS |
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| 595 | */ |
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| 596 | rtems_interrupt_disable(Irql); |
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[ab2dbd7] | 597 | #if 0 |
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| 598 | pmc68681Context->ucModemCtrl &= ~SP_MODEM_RTS; |
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| 599 | (*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl); |
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| 600 | #endif |
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[cd58d82] | 601 | rtems_interrupt_enable(Irql); |
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| 602 | return 0; |
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| 603 | } |
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| 604 | |
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| 605 | /* |
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[beaaf49f] | 606 | * These flow control routines utilize a connection from the local DTR |
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[cd58d82] | 607 | * line to the remote CTS line |
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| 608 | */ |
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[ab2dbd7] | 609 | |
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[cd58d82] | 610 | /* |
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| 611 | * mc68681_assert_DTR |
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| 612 | */ |
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[ab2dbd7] | 613 | |
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[cd58d82] | 614 | static int mc68681_assert_DTR(int minor) |
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| 615 | { |
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[ab2dbd7] | 616 | /* XXX */ |
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[cd58d82] | 617 | unsigned32 pMC68681; |
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| 618 | unsigned32 Irql; |
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[ab2dbd7] | 619 | mc68681_context *pmc68681Context; |
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[cd58d82] | 620 | setRegister_f setReg; |
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| 621 | |
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[ab2dbd7] | 622 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
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[cd58d82] | 623 | |
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| 624 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 625 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 626 | |
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| 627 | /* |
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| 628 | * Assert DTR |
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| 629 | */ |
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| 630 | rtems_interrupt_disable(Irql); |
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[ab2dbd7] | 631 | #if 0 |
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| 632 | pmc68681Context->ucModemCtrl |= SP_MODEM_DTR; |
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| 633 | (*setReg)(pMC68681, MC68681_MODEM_CONTROL, pmc68681Context->ucModemCtrl); |
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| 634 | #endif |
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[cd58d82] | 635 | rtems_interrupt_enable(Irql); |
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| 636 | return 0; |
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| 637 | } |
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| 638 | |
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| 639 | /* |
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| 640 | * mc68681_negate_DTR |
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| 641 | */ |
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[ab2dbd7] | 642 | |
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[cd58d82] | 643 | static int mc68681_negate_DTR(int minor) |
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| 644 | { |
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[ab2dbd7] | 645 | /* XXX */ |
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[cd58d82] | 646 | unsigned32 pMC68681; |
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| 647 | unsigned32 Irql; |
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[ab2dbd7] | 648 | mc68681_context *pmc68681Context; |
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[cd58d82] | 649 | setRegister_f setReg; |
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| 650 | |
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[ab2dbd7] | 651 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
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[cd58d82] | 652 | |
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| 653 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 654 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 655 | |
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| 656 | /* |
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| 657 | * Negate DTR |
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| 658 | */ |
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| 659 | rtems_interrupt_disable(Irql); |
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[ab2dbd7] | 660 | #if 0 |
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| 661 | pmc68681Context->ucModemCtrl &= ~SP_MODEM_DTR; |
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| 662 | (*setReg)(pMC68681, MC68681_MODEM_CONTROL,pmc68681Context->ucModemCtrl); |
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| 663 | #endif |
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[cd58d82] | 664 | rtems_interrupt_enable(Irql); |
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| 665 | return 0; |
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| 666 | } |
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| 667 | |
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| 668 | /* |
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| 669 | * mc68681_isr |
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| 670 | * |
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[ab2dbd7] | 671 | * This routine is the console interrupt handler. |
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[cd58d82] | 672 | */ |
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| 673 | |
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| 674 | static void mc68681_process( |
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| 675 | int minor |
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| 676 | ) |
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| 677 | { |
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[ab2dbd7] | 678 | /* XXX */ |
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[cd58d82] | 679 | unsigned32 pMC68681; |
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| 680 | volatile unsigned8 ucLineStatus; |
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| 681 | volatile unsigned8 ucInterruptId; |
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| 682 | char cChar; |
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| 683 | getRegister_f getReg; |
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| 684 | setRegister_f setReg; |
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| 685 | |
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[ab2dbd7] | 686 | #if 1 |
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| 687 | cChar = ucInterruptId = ucLineStatus = 0; |
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| 688 | #endif |
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[cd58d82] | 689 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 690 | getReg = Console_Port_Tbl[minor].getRegister; |
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| 691 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 692 | |
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[ab2dbd7] | 693 | #if 0 |
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[cd58d82] | 694 | do { |
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| 695 | /* |
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| 696 | * Deal with any received characters |
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| 697 | */ |
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| 698 | while(TRUE) { |
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[ab2dbd7] | 699 | ucLineStatus = (*getReg)(pMC68681, MC68681_LINE_STATUS); |
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[cd58d82] | 700 | if(~ucLineStatus & SP_LSR_RDY) { |
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| 701 | break; |
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| 702 | } |
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[ab2dbd7] | 703 | cChar = (*getReg)(pMC68681, MC68681_RECEIVE_BUFFER); |
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[cd58d82] | 704 | rtems_termios_enqueue_raw_characters( |
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| 705 | Console_Port_Data[minor].termios_data, |
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| 706 | &cChar, |
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| 707 | 1 |
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| 708 | ); |
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| 709 | } |
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| 710 | |
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| 711 | while(TRUE) { |
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| 712 | if(Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) { |
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[ab2dbd7] | 713 | Console_Port_Data[minor].bActive = FALSE; |
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| 714 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) { |
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[cd58d82] | 715 | mc68681_negate_RTS(minor); |
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| 716 | } |
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| 717 | |
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| 718 | /* |
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| 719 | * There is no data to transmit |
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| 720 | */ |
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| 721 | break; |
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| 722 | } |
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| 723 | |
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[ab2dbd7] | 724 | ucLineStatus = (*getReg)(pMC68681, MC68681_LINE_STATUS); |
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[cd58d82] | 725 | if(~ucLineStatus & SP_LSR_THOLD) { |
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| 726 | /* |
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| 727 | * We'll get another interrupt when |
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| 728 | * the transmitter holding reg. becomes |
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| 729 | * free again |
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| 730 | */ |
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| 731 | break; |
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| 732 | } |
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| 733 | |
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| 734 | Ring_buffer_Remove_character( &Console_Port_Data[minor].TxBuffer, cChar); |
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| 735 | /* |
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| 736 | * transmit character |
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| 737 | */ |
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[ab2dbd7] | 738 | (*setReg)(pMC68681, MC68681_TRANSMIT_BUFFER, cChar); |
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[cd58d82] | 739 | } |
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| 740 | |
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[ab2dbd7] | 741 | ucInterruptId = (*getReg)(pMC68681, MC68681_INTERRUPT_ID); |
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[cd58d82] | 742 | } |
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[ab2dbd7] | 743 | while((ucInterruptId&0xf) != 0x1); |
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| 744 | #endif |
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[cd58d82] | 745 | } |
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| 746 | |
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| 747 | static rtems_isr mc68681_isr( |
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| 748 | rtems_vector_number vector |
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| 749 | ) |
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| 750 | { |
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| 751 | int minor; |
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| 752 | |
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[ab2dbd7] | 753 | for(minor=0 ; minor<Console_Port_Count ; minor++) { |
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| 754 | if(vector == Console_Port_Tbl[minor].ulIntVector) { |
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[cd58d82] | 755 | mc68681_process(minor); |
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| 756 | } |
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| 757 | } |
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| 758 | } |
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| 759 | |
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| 760 | /* |
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| 761 | * mc68681_flush |
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[beaaf49f] | 762 | * |
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| 763 | * This routine waits before all output is completed before closing |
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| 764 | * the requested port. |
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| 765 | * |
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| 766 | * NOTE: This is the "interrupt mode" close entry point. |
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[cd58d82] | 767 | */ |
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[ab2dbd7] | 768 | |
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[cd58d82] | 769 | static int mc68681_flush(int major, int minor, void *arg) |
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| 770 | { |
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| 771 | while(!Ring_buffer_Is_empty(&Console_Port_Data[minor].TxBuffer)) { |
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| 772 | /* |
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| 773 | * Yield while we wait |
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| 774 | */ |
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| 775 | if(_System_state_Is_up(_System_state_Get())) { |
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| 776 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
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| 777 | } |
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| 778 | } |
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| 779 | |
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| 780 | mc68681_close(major, minor, arg); |
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| 781 | |
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| 782 | return(RTEMS_SUCCESSFUL); |
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| 783 | } |
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| 784 | |
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| 785 | /* |
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[beaaf49f] | 786 | * mc68681_enable_interrupts |
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[cd58d82] | 787 | * |
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[beaaf49f] | 788 | * This function initializes the hardware for this port to use interrupts. |
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[cd58d82] | 789 | */ |
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| 790 | |
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| 791 | static void mc68681_enable_interrupts( |
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| 792 | int minor |
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| 793 | ) |
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| 794 | { |
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| 795 | unsigned32 pMC68681; |
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[ab2dbd7] | 796 | setRegister_f setReg; |
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[cd58d82] | 797 | |
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| 798 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 799 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 800 | |
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| 801 | /* |
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[a5d0c7c] | 802 | * Enable interrupts on RX and TX -- not break |
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[cd58d82] | 803 | */ |
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[a5d0c7c] | 804 | |
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| 805 | (*setReg)( pMC68681, MC68681_INTERRUPT_MASK_REG, mc68681_build_imr( minor )); |
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[cd58d82] | 806 | } |
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| 807 | |
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[beaaf49f] | 808 | /* |
---|
| 809 | * mc68681_initialize_interrupts |
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| 810 | * |
---|
| 811 | * This routine initializes the console's receive and transmit |
---|
| 812 | * ring buffers and loads the appropriate vectors to handle the interrupts. |
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| 813 | */ |
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| 814 | |
---|
[cd58d82] | 815 | static void mc68681_initialize_interrupts(int minor) |
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| 816 | { |
---|
| 817 | mc68681_init(minor); |
---|
| 818 | |
---|
| 819 | Ring_buffer_Initialize(&Console_Port_Data[minor].TxBuffer); |
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| 820 | |
---|
| 821 | Console_Port_Data[minor].bActive = FALSE; |
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| 822 | |
---|
| 823 | set_vector(mc68681_isr, Console_Port_Tbl[minor].ulIntVector, 1); |
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| 824 | |
---|
| 825 | mc68681_enable_interrupts(minor); |
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| 826 | } |
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| 827 | |
---|
| 828 | /* |
---|
| 829 | * mc68681_write_support_int |
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| 830 | * |
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[beaaf49f] | 831 | * Console Termios output entry point when using interrupt driven output. |
---|
[cd58d82] | 832 | */ |
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[ab2dbd7] | 833 | |
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[cd58d82] | 834 | static int mc68681_write_support_int( |
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| 835 | int minor, |
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| 836 | const char *buf, |
---|
| 837 | int len |
---|
| 838 | ) |
---|
| 839 | { |
---|
| 840 | int i; |
---|
| 841 | unsigned32 Irql; |
---|
| 842 | |
---|
[ab2dbd7] | 843 | for(i=0 ; i<len ;) { |
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[cd58d82] | 844 | if(Ring_buffer_Is_full(&Console_Port_Data[minor].TxBuffer)) { |
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| 845 | if(!Console_Port_Data[minor].bActive) { |
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| 846 | /* |
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| 847 | * Wake up the device |
---|
| 848 | */ |
---|
| 849 | rtems_interrupt_disable(Irql); |
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| 850 | Console_Port_Data[minor].bActive = TRUE; |
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| 851 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) { |
---|
| 852 | mc68681_assert_RTS(minor); |
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| 853 | } |
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| 854 | mc68681_process(minor); |
---|
| 855 | rtems_interrupt_enable(Irql); |
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| 856 | } else { |
---|
| 857 | /* |
---|
| 858 | * Yield |
---|
| 859 | */ |
---|
| 860 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
---|
| 861 | } |
---|
| 862 | |
---|
| 863 | /* |
---|
| 864 | * Wait for ring buffer to empty |
---|
| 865 | */ |
---|
| 866 | continue; |
---|
| 867 | } |
---|
| 868 | else { |
---|
| 869 | Ring_buffer_Add_character( &Console_Port_Data[minor].TxBuffer, buf[i]); |
---|
| 870 | i++; |
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| 871 | } |
---|
| 872 | } |
---|
| 873 | |
---|
| 874 | /* |
---|
| 875 | * Ensure that characters are on the way |
---|
| 876 | */ |
---|
[ab2dbd7] | 877 | |
---|
[cd58d82] | 878 | if(!Console_Port_Data[minor].bActive) { |
---|
| 879 | /* |
---|
| 880 | * Wake up the device |
---|
| 881 | */ |
---|
| 882 | rtems_interrupt_disable(Irql); |
---|
| 883 | Console_Port_Data[minor].bActive = TRUE; |
---|
[ab2dbd7] | 884 | if(Console_Port_Tbl[minor].pDeviceFlow != &mc68681_flow_RTSCTS) { |
---|
[cd58d82] | 885 | mc68681_assert_RTS(minor); |
---|
| 886 | } |
---|
| 887 | mc68681_process(minor); |
---|
| 888 | rtems_interrupt_enable(Irql); |
---|
| 889 | } |
---|
| 890 | |
---|
| 891 | return (len); |
---|
| 892 | } |
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| 893 | |
---|
| 894 | /* |
---|
| 895 | * mc68681_write_support_polled |
---|
| 896 | * |
---|
[beaaf49f] | 897 | * Console Termios output entry point when using polled output. |
---|
[cd58d82] | 898 | * |
---|
| 899 | */ |
---|
[ab2dbd7] | 900 | |
---|
[cd58d82] | 901 | static int mc68681_write_support_polled( |
---|
| 902 | int minor, |
---|
| 903 | const char *buf, |
---|
| 904 | int len |
---|
| 905 | ) |
---|
| 906 | { |
---|
| 907 | int nwrite = 0; |
---|
| 908 | |
---|
| 909 | /* |
---|
| 910 | * poll each byte in the string out of the port. |
---|
| 911 | */ |
---|
| 912 | while (nwrite < len) { |
---|
| 913 | /* |
---|
| 914 | * transmit character |
---|
| 915 | */ |
---|
| 916 | mc68681_write_polled(minor, *buf++); |
---|
| 917 | nwrite++; |
---|
| 918 | } |
---|
| 919 | |
---|
| 920 | /* |
---|
| 921 | * return the number of bytes written. |
---|
| 922 | */ |
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| 923 | return nwrite; |
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| 924 | } |
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| 925 | |
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| 926 | /* |
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| 927 | * mc68681_inbyte_nonblocking_polled |
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| 928 | * |
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| 929 | * Console Termios polling input entry point. |
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| 930 | */ |
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| 931 | |
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| 932 | static int mc68681_inbyte_nonblocking_polled( |
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| 933 | int minor |
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| 934 | ) |
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| 935 | { |
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[25c3ff91] | 936 | unsigned32 pMC68681_port; |
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[cd58d82] | 937 | unsigned char ucLineStatus; |
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| 938 | char cChar; |
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| 939 | getRegister_f getReg; |
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| 940 | |
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[25c3ff91] | 941 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 942 | getReg = Console_Port_Tbl[minor].getRegister; |
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[cd58d82] | 943 | |
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[25c3ff91] | 944 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
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[ab2dbd7] | 945 | if(ucLineStatus & MC68681_RX_READY) { |
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[25c3ff91] | 946 | cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER); |
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[ab2dbd7] | 947 | return (int)cChar; |
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[cd58d82] | 948 | } else { |
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[25c3ff91] | 949 | return -1; |
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[cd58d82] | 950 | } |
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| 951 | } |
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