[cd58d82] | 1 | /* |
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| 2 | * This file contains the termios TTY driver for the Motorola MC68681. |
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| 3 | * |
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| 4 | * This part is available from a number of secondary sources. |
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| 5 | * In particular, we know about the following: |
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| 6 | * |
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| 7 | * + Exar 88c681 and 68c681 |
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| 8 | * |
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[08311cc3] | 9 | * COPYRIGHT (c) 1989-1999. |
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[cd58d82] | 10 | * On-Line Applications Research Corporation (OAR). |
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| 11 | * |
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| 12 | * The license and distribution terms for this file may be |
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| 13 | * found in the file LICENSE in this distribution or at |
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[94365d9] | 14 | * http://www.rtems.com/license/LICENSE. |
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[cd58d82] | 15 | * |
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| 16 | * $Id$ |
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| 17 | */ |
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| 18 | |
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| 19 | #include <rtems.h> |
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| 20 | #include <rtems/libio.h> |
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| 21 | #include <stdlib.h> |
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| 22 | |
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| 23 | #include <libchip/serial.h> |
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[a6f441b] | 24 | #include <libchip/mc68681.h> |
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[7e05b53] | 25 | #include <libchip/sersupp.h> |
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[cd58d82] | 26 | #include "mc68681_p.h" |
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| 27 | |
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| 28 | /* |
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| 29 | * Flow control is only supported when using interrupts |
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| 30 | */ |
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[424e23ee] | 31 | |
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[cd58d82] | 32 | console_fns mc68681_fns = |
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| 33 | { |
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[693b5b88] | 34 | libchip_serial_default_probe, /* deviceProbe */ |
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[cd58d82] | 35 | mc68681_open, /* deviceFirstOpen */ |
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[198d851] | 36 | NULL, /* deviceLastClose */ |
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[cd58d82] | 37 | NULL, /* deviceRead */ |
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| 38 | mc68681_write_support_int, /* deviceWrite */ |
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| 39 | mc68681_initialize_interrupts, /* deviceInitialize */ |
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| 40 | mc68681_write_polled, /* deviceWritePolled */ |
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[25c3ff91] | 41 | mc68681_set_attributes, /* deviceSetAttributes */ |
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[6640459d] | 42 | true /* deviceOutputUsesInterrupts */ |
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[cd58d82] | 43 | }; |
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| 44 | |
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| 45 | console_fns mc68681_fns_polled = |
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| 46 | { |
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[693b5b88] | 47 | libchip_serial_default_probe, /* deviceProbe */ |
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[cd58d82] | 48 | mc68681_open, /* deviceFirstOpen */ |
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| 49 | mc68681_close, /* deviceLastClose */ |
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| 50 | mc68681_inbyte_nonblocking_polled, /* deviceRead */ |
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| 51 | mc68681_write_support_polled, /* deviceWrite */ |
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| 52 | mc68681_init, /* deviceInitialize */ |
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| 53 | mc68681_write_polled, /* deviceWritePolled */ |
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[25c3ff91] | 54 | mc68681_set_attributes, /* deviceSetAttributes */ |
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[6640459d] | 55 | false, /* deviceOutputUsesInterrupts */ |
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[cd58d82] | 56 | }; |
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| 57 | |
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| 58 | extern void set_vector( rtems_isr_entry, rtems_vector_number, int ); |
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| 59 | |
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| 60 | /* |
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| 61 | * Console Device Driver Entry Points |
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| 62 | */ |
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[424e23ee] | 63 | |
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[beaaf49f] | 64 | /* |
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| 65 | * mc68681_baud_rate |
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| 66 | * |
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| 67 | * This routine returns the proper ACR bit and baud rate field values |
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| 68 | * based on the requested baud rate. The baud rate set to be used |
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| 69 | * must be configured by the user. |
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| 70 | */ |
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| 71 | |
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[2d8e51aa] | 72 | MC68681_STATIC int mc68681_baud_rate( |
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[25c3ff91] | 73 | int minor, |
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| 74 | int baud, |
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| 75 | unsigned int *baud_mask_p, |
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[2d8e51aa] | 76 | unsigned int *acr_bit_p, |
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| 77 | unsigned int *command |
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| 78 | ); |
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[25c3ff91] | 79 | |
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[beaaf49f] | 80 | /* |
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| 81 | * mc68681_set_attributes |
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| 82 | * |
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| 83 | * This function sets the DUART channel to reflect the requested termios |
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| 84 | * port settings. |
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| 85 | */ |
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| 86 | |
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[a3d3d9a] | 87 | MC68681_STATIC int mc68681_set_attributes( |
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[25c3ff91] | 88 | int minor, |
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| 89 | const struct termios *t |
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| 90 | ) |
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| 91 | { |
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[ee4f57d] | 92 | uint32_t pMC68681_port; |
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| 93 | uint32_t pMC68681; |
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[25c3ff91] | 94 | unsigned int mode1; |
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| 95 | unsigned int mode2; |
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| 96 | unsigned int baud_mask; |
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| 97 | unsigned int acr_bit; |
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[b7acc4ad] | 98 | unsigned int cmd = 0; |
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[25c3ff91] | 99 | setRegister_f setReg; |
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| 100 | rtems_interrupt_level Irql; |
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[cd58d82] | 101 | |
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[4f0ffa57] | 102 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 103 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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[7deeb16] | 104 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 105 | |
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| 106 | /* |
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[25c3ff91] | 107 | * Set the baud rate |
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[7deeb16] | 108 | */ |
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| 109 | |
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[2d8e51aa] | 110 | if (mc68681_baud_rate( minor, t->c_cflag, &baud_mask, &acr_bit, &cmd ) == -1) |
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[25c3ff91] | 111 | return -1; |
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| 112 | |
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| 113 | baud_mask |= baud_mask << 4; |
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| 114 | acr_bit <<= 7; |
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[7deeb16] | 115 | |
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| 116 | /* |
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[25c3ff91] | 117 | * Parity |
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[7deeb16] | 118 | */ |
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| 119 | |
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[25c3ff91] | 120 | mode1 = 0; |
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| 121 | mode2 = 0; |
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[7deeb16] | 122 | |
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[25c3ff91] | 123 | if (t->c_cflag & PARENB) { |
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| 124 | if (t->c_cflag & PARODD) |
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| 125 | mode1 |= 0x04; |
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[5ca5a54] | 126 | /* else |
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| 127 | mode1 |= 0x04; */ |
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[25c3ff91] | 128 | } else { |
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| 129 | mode1 |= 0x10; |
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| 130 | } |
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[cd58d82] | 131 | |
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[25c3ff91] | 132 | /* |
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| 133 | * Character Size |
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[cd58d82] | 134 | */ |
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| 135 | |
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[25c3ff91] | 136 | if (t->c_cflag & CSIZE) { |
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| 137 | switch (t->c_cflag & CSIZE) { |
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| 138 | case CS5: break; |
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| 139 | case CS6: mode1 |= 0x01; break; |
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| 140 | case CS7: mode1 |= 0x02; break; |
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| 141 | case CS8: mode1 |= 0x03; break; |
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| 142 | } |
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| 143 | } else { |
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| 144 | mode1 |= 0x03; /* default to 9600,8,N,1 */ |
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| 145 | } |
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[cd58d82] | 146 | |
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[25c3ff91] | 147 | /* |
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| 148 | * Stop Bits |
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| 149 | */ |
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[a3d3d9a] | 150 | |
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[25c3ff91] | 151 | if (t->c_cflag & CSTOPB) { |
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[5ca5a54] | 152 | mode2 |= 0x0F; /* 2 stop bits */ |
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[25c3ff91] | 153 | } else { |
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[5ca5a54] | 154 | if ((t->c_cflag & CSIZE) == CS5) /* CS5 and 1 stop bits not supported */ |
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[25c3ff91] | 155 | return -1; |
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[5ca5a54] | 156 | mode2 |= 0x07; /* 1 stop bit */ |
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[25c3ff91] | 157 | } |
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[cd58d82] | 158 | |
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[5ca5a54] | 159 | /* |
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| 160 | * Hardware Flow Control |
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| 161 | */ |
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| 162 | |
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| 163 | if(t->c_cflag & CRTSCTS) { |
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| 164 | mode1 |= 0x80; /* Enable Rx RTS Control */ |
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| 165 | mode2 |= 0x10; /* Enable CTS Enable Tx */ |
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| 166 | } |
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| 167 | |
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| 168 | |
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[25c3ff91] | 169 | rtems_interrupt_disable(Irql); |
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| 170 | (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr_bit ); |
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| 171 | (*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud_mask ); |
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[2c5ea01] | 172 | if ( cmd ) { |
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| 173 | (*setReg)( pMC68681_port, MC68681_COMMAND, cmd ); /* RX */ |
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| 174 | (*setReg)( pMC68681_port, MC68681_COMMAND, cmd | 0x20 ); /* TX */ |
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| 175 | } |
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[25c3ff91] | 176 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_MR_PTR ); |
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| 177 | (*setReg)( pMC68681_port, MC68681_MODE, mode1 ); |
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| 178 | (*setReg)( pMC68681_port, MC68681_MODE, mode2 ); |
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| 179 | rtems_interrupt_enable(Irql); |
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| 180 | return 0; |
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| 181 | } |
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[cd58d82] | 182 | |
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[beaaf49f] | 183 | /* |
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| 184 | * mc68681_initialize_context |
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| 185 | * |
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| 186 | * This function sets the default values of the per port context structure. |
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| 187 | */ |
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| 188 | |
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[2d8e51aa] | 189 | MC68681_STATIC void mc68681_initialize_context( |
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[a5d0c7c] | 190 | int minor, |
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| 191 | mc68681_context *pmc68681Context |
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| 192 | ) |
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| 193 | { |
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| 194 | int port; |
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| 195 | unsigned int pMC68681; |
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[be8cbbf] | 196 | unsigned int pMC68681_port; |
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[a3d3d9a] | 197 | |
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[be8cbbf] | 198 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 199 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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[a5d0c7c] | 200 | |
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| 201 | pmc68681Context->mate = -1; |
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| 202 | |
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| 203 | for (port=0 ; port<Console_Port_Count ; port++ ) { |
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[a3d3d9a] | 204 | if ( Console_Port_Tbl[port].ulCtrlPort1 == pMC68681 && |
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[be8cbbf] | 205 | Console_Port_Tbl[port].ulCtrlPort2 != pMC68681_port ) { |
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[a5d0c7c] | 206 | pmc68681Context->mate = port; |
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[198d851] | 207 | pmc68681Context->imr = 0; |
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[a5d0c7c] | 208 | break; |
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| 209 | } |
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| 210 | } |
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| 211 | |
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| 212 | } |
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| 213 | |
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[beaaf49f] | 214 | /* |
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| 215 | * mc68681_init |
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| 216 | * |
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| 217 | * This function initializes the DUART to a quiecsent state. |
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| 218 | */ |
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| 219 | |
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[2d8e51aa] | 220 | MC68681_STATIC void mc68681_init(int minor) |
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[25c3ff91] | 221 | { |
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[ee4f57d] | 222 | uint32_t pMC68681_port; |
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| 223 | uint32_t pMC68681; |
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[25c3ff91] | 224 | mc68681_context *pmc68681Context; |
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| 225 | setRegister_f setReg; |
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| 226 | getRegister_f getReg; |
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| 227 | |
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| 228 | pmc68681Context = (mc68681_context *) malloc(sizeof(mc68681_context)); |
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[cd58d82] | 229 | |
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[25c3ff91] | 230 | Console_Port_Data[minor].pDeviceContext = (void *)pmc68681Context; |
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[a5d0c7c] | 231 | |
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| 232 | mc68681_initialize_context( minor, pmc68681Context ); |
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[cd58d82] | 233 | |
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[4f0ffa57] | 234 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 235 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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[25c3ff91] | 236 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 237 | getReg = Console_Port_Tbl[minor].getRegister; |
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[cd58d82] | 238 | |
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| 239 | /* |
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[25c3ff91] | 240 | * Reset everything and leave this port disabled. |
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[cd58d82] | 241 | */ |
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| 242 | |
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[198d851] | 243 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_RX ); |
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| 244 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_TX ); |
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| 245 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_ERROR ); |
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| 246 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_BREAK ); |
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| 247 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_STOP_BREAK ); |
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| 248 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX ); |
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| 249 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX ); |
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[cd58d82] | 250 | |
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[25c3ff91] | 251 | |
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[198d851] | 252 | (*setReg)( pMC68681_port, MC68681_MODE_REG_1A, 0x00 ); |
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| 253 | (*setReg)( pMC68681_port, MC68681_MODE_REG_2A, 0x02 ); |
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[4f0ffa57] | 254 | |
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| 255 | /* |
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| 256 | * Disable interrupts on RX and TX for this port |
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| 257 | */ |
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| 258 | |
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[198d851] | 259 | mc68681_enable_interrupts( minor, MC68681_IMR_DISABLE_ALL ); |
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[cd58d82] | 260 | } |
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| 261 | |
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[25c3ff91] | 262 | /* |
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[beaaf49f] | 263 | * mc68681_open |
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| 264 | * |
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| 265 | * This function opens a port for communication. |
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| 266 | * |
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| 267 | * Default state is 9600 baud, 8 bits, No parity, and 1 stop bit. |
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[25c3ff91] | 268 | */ |
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| 269 | |
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[2d8e51aa] | 270 | MC68681_STATIC int mc68681_open( |
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[cd58d82] | 271 | int major, |
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| 272 | int minor, |
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[25c3ff91] | 273 | void *arg |
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[cd58d82] | 274 | ) |
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| 275 | { |
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[ee4f57d] | 276 | uint32_t pMC68681; |
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| 277 | uint32_t pMC68681_port; |
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[25c3ff91] | 278 | unsigned int baud; |
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[5ca5a54] | 279 | unsigned int acr_bit; |
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[25c3ff91] | 280 | unsigned int vector; |
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[48b8259] | 281 | unsigned int command = 0; |
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[25c3ff91] | 282 | rtems_interrupt_level Irql; |
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| 283 | setRegister_f setReg; |
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[5ca5a54] | 284 | unsigned int status; |
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[a3d3d9a] | 285 | |
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| 286 | |
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[25c3ff91] | 287 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 288 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 289 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 290 | vector = Console_Port_Tbl[minor].ulIntVector; |
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[a3d3d9a] | 291 | |
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[e78c474b] | 292 | /* XXX default baud rate should be from configuration table */ |
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| 293 | |
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[5ca5a54] | 294 | status = mc68681_baud_rate( minor, B9600, &baud, &acr_bit, &command ); |
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| 295 | if (status < 0) rtems_fatal_error_occurred (RTEMS_NOT_DEFINED); |
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[25c3ff91] | 296 | |
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[b7ebcea3] | 297 | /* |
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| 298 | * Set the DUART channel to a default useable state |
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| 299 | */ |
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| 300 | |
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[25c3ff91] | 301 | rtems_interrupt_disable(Irql); |
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[5ca5a54] | 302 | (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr_bit << 7 ); |
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[25c3ff91] | 303 | (*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud ); |
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[e78c474b] | 304 | if ( command ) { |
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| 305 | (*setReg)( pMC68681_port, MC68681_COMMAND, command ); /* RX */ |
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| 306 | (*setReg)( pMC68681_port, MC68681_COMMAND, command | 0x20 ); /* TX */ |
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| 307 | } |
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[25c3ff91] | 308 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_MR_PTR ); |
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| 309 | (*setReg)( pMC68681_port, MC68681_MODE, 0x13 ); |
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| 310 | (*setReg)( pMC68681_port, MC68681_MODE, 0x07 ); |
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| 311 | rtems_interrupt_enable(Irql); |
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| 312 | |
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| 313 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_ENABLE_TX ); |
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| 314 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_ENABLE_RX ); |
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| 315 | |
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| 316 | (*setReg)( pMC68681, MC68681_INTERRUPT_VECTOR_REG, vector ); |
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| 317 | |
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[4f0ffa57] | 318 | return RTEMS_SUCCESSFUL; |
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[cd58d82] | 319 | } |
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| 320 | |
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[beaaf49f] | 321 | /* |
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| 322 | * mc68681_close |
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| 323 | * |
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| 324 | * This function shuts down the requested port. |
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| 325 | */ |
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| 326 | |
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[2d8e51aa] | 327 | MC68681_STATIC int mc68681_close( |
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[cd58d82] | 328 | int major, |
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| 329 | int minor, |
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[25c3ff91] | 330 | void *arg |
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[cd58d82] | 331 | ) |
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| 332 | { |
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[ee4f57d] | 333 | uint32_t pMC68681; |
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| 334 | uint32_t pMC68681_port; |
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[b7ebcea3] | 335 | setRegister_f setReg; |
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| 336 | |
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| 337 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
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| 338 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 339 | setReg = Console_Port_Tbl[minor].setRegister; |
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| 340 | |
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| 341 | /* |
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| 342 | * Disable interrupts from this channel and then disable it totally. |
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| 343 | */ |
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| 344 | |
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[70502bc4] | 345 | #if 0 |
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[b7ebcea3] | 346 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX ); |
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| 347 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX ); |
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[70502bc4] | 348 | #endif |
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[b7ebcea3] | 349 | |
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[cd58d82] | 350 | return(RTEMS_SUCCESSFUL); |
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| 351 | } |
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| 352 | |
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[a3d3d9a] | 353 | /* |
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[cd58d82] | 354 | * mc68681_write_polled |
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[beaaf49f] | 355 | * |
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| 356 | * This routine polls out the requested character. |
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[cd58d82] | 357 | */ |
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[424e23ee] | 358 | |
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[2d8e51aa] | 359 | MC68681_STATIC void mc68681_write_polled( |
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[a3d3d9a] | 360 | int minor, |
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[cd58d82] | 361 | char cChar |
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| 362 | ) |
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| 363 | { |
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[ee4f57d] | 364 | uint32_t pMC68681_port; |
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[cd58d82] | 365 | unsigned char ucLineStatus; |
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| 366 | int iTimeout; |
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| 367 | getRegister_f getReg; |
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[25c3ff91] | 368 | setRegister_f setReg; |
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[cd58d82] | 369 | |
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[25c3ff91] | 370 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 371 | getReg = Console_Port_Tbl[minor].getRegister; |
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| 372 | setReg = Console_Port_Tbl[minor].setRegister; |
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[cd58d82] | 373 | |
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| 374 | /* |
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| 375 | * wait for transmitter holding register to be empty |
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| 376 | */ |
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[ab2dbd7] | 377 | iTimeout = 1000; |
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[25c3ff91] | 378 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
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[2c5ea01] | 379 | while ((ucLineStatus & (MC68681_TX_READY|MC68681_TX_EMPTY)) == 0) { |
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| 380 | |
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| 381 | if ((ucLineStatus & 0xF0)) |
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| 382 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_ERROR ); |
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[ab2dbd7] | 383 | |
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[cd58d82] | 384 | /* |
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| 385 | * Yield while we wait |
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| 386 | */ |
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[ab2dbd7] | 387 | |
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[0eb85ae] | 388 | #if 0 |
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[cd58d82] | 389 | if(_System_state_Is_up(_System_state_Get())) { |
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| 390 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
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| 391 | } |
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[0eb85ae] | 392 | #endif |
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[25c3ff91] | 393 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
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[cd58d82] | 394 | if(!--iTimeout) { |
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| 395 | break; |
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| 396 | } |
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| 397 | } |
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| 398 | |
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| 399 | /* |
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| 400 | * transmit character |
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| 401 | */ |
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[ab2dbd7] | 402 | |
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[25c3ff91] | 403 | (*setReg)(pMC68681_port, MC68681_TX_BUFFER, cChar); |
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[cd58d82] | 404 | } |
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| 405 | |
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[4f0ffa57] | 406 | /* |
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| 407 | * mc68681_isr |
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| 408 | * |
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| 409 | * This is the single interrupt entry point which parcels interrupts |
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| 410 | * out to the various ports. |
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| 411 | */ |
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| 412 | |
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[2d8e51aa] | 413 | MC68681_STATIC rtems_isr mc68681_isr( |
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[cd58d82] | 414 | rtems_vector_number vector |
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| 415 | ) |
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| 416 | { |
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| 417 | int minor; |
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| 418 | |
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[ab2dbd7] | 419 | for(minor=0 ; minor<Console_Port_Count ; minor++) { |
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[a3d3d9a] | 420 | if(Console_Port_Tbl[minor].ulIntVector == vector && |
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[198d851] | 421 | Console_Port_Tbl[minor].deviceType == SERIAL_MC68681 ) { |
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[cd58d82] | 422 | mc68681_process(minor); |
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| 423 | } |
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| 424 | } |
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| 425 | } |
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| 426 | |
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[beaaf49f] | 427 | /* |
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| 428 | * mc68681_initialize_interrupts |
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| 429 | * |
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| 430 | * This routine initializes the console's receive and transmit |
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| 431 | * ring buffers and loads the appropriate vectors to handle the interrupts. |
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| 432 | */ |
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| 433 | |
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[2d8e51aa] | 434 | MC68681_STATIC void mc68681_initialize_interrupts(int minor) |
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[cd58d82] | 435 | { |
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| 436 | mc68681_init(minor); |
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| 437 | |
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| 438 | Console_Port_Data[minor].bActive = FALSE; |
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| 439 | |
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| 440 | set_vector(mc68681_isr, Console_Port_Tbl[minor].ulIntVector, 1); |
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| 441 | |
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[198d851] | 442 | mc68681_enable_interrupts(minor,MC68681_IMR_ENABLE_ALL_EXCEPT_TX); |
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[cd58d82] | 443 | } |
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| 444 | |
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[a3d3d9a] | 445 | /* |
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[cd58d82] | 446 | * mc68681_write_support_int |
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| 447 | * |
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[beaaf49f] | 448 | * Console Termios output entry point when using interrupt driven output. |
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[cd58d82] | 449 | */ |
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[ab2dbd7] | 450 | |
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[3ed964f9] | 451 | MC68681_STATIC ssize_t mc68681_write_support_int( |
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[a3d3d9a] | 452 | int minor, |
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| 453 | const char *buf, |
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[3ed964f9] | 454 | size_t len |
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[cd58d82] | 455 | ) |
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| 456 | { |
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[ee4f57d] | 457 | uint32_t Irql; |
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| 458 | uint32_t pMC68681_port; |
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[198d851] | 459 | setRegister_f setReg; |
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| 460 | |
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| 461 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 462 | setReg = Console_Port_Tbl[minor].setRegister; |
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[cd58d82] | 463 | |
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| 464 | /* |
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[b070d69a] | 465 | * We are using interrupt driven output and termios only sends us |
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| 466 | * one character at a time. |
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[cd58d82] | 467 | */ |
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[ab2dbd7] | 468 | |
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[198d851] | 469 | if ( !len ) |
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| 470 | return 0; |
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[cd58d82] | 471 | |
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[198d851] | 472 | /* |
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[b070d69a] | 473 | * Put the character out and enable interrupts if necessary. |
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[198d851] | 474 | */ |
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[b070d69a] | 475 | |
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[198d851] | 476 | rtems_interrupt_disable(Irql); |
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[c68b990] | 477 | if ( Console_Port_Data[minor].bActive == FALSE ) { |
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| 478 | Console_Port_Data[minor].bActive = TRUE; |
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| 479 | mc68681_enable_interrupts(minor, MC68681_IMR_ENABLE_ALL); |
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| 480 | } |
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[198d851] | 481 | (*setReg)(pMC68681_port, MC68681_TX_BUFFER, *buf); |
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| 482 | rtems_interrupt_enable(Irql); |
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[b070d69a] | 483 | |
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[3ed964f9] | 484 | return 0; |
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[cd58d82] | 485 | } |
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| 486 | |
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[a3d3d9a] | 487 | /* |
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[cd58d82] | 488 | * mc68681_write_support_polled |
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| 489 | * |
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[beaaf49f] | 490 | * Console Termios output entry point when using polled output. |
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[cd58d82] | 491 | * |
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| 492 | */ |
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[ab2dbd7] | 493 | |
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[3ed964f9] | 494 | MC68681_STATIC ssize_t mc68681_write_support_polled( |
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[a3d3d9a] | 495 | int minor, |
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| 496 | const char *buf, |
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[3ed964f9] | 497 | size_t len |
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[cd58d82] | 498 | ) |
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| 499 | { |
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| 500 | int nwrite = 0; |
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| 501 | |
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| 502 | /* |
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| 503 | * poll each byte in the string out of the port. |
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| 504 | */ |
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| 505 | while (nwrite < len) { |
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| 506 | /* |
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| 507 | * transmit character |
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| 508 | */ |
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| 509 | mc68681_write_polled(minor, *buf++); |
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| 510 | nwrite++; |
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| 511 | } |
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| 512 | |
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| 513 | /* |
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| 514 | * return the number of bytes written. |
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| 515 | */ |
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| 516 | return nwrite; |
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| 517 | } |
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| 518 | |
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[a3d3d9a] | 519 | /* |
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| 520 | * mc68681_inbyte_nonblocking_polled |
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[cd58d82] | 521 | * |
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| 522 | * Console Termios polling input entry point. |
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| 523 | */ |
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| 524 | |
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[a3d3d9a] | 525 | MC68681_STATIC int mc68681_inbyte_nonblocking_polled( |
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| 526 | int minor |
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[cd58d82] | 527 | ) |
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| 528 | { |
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[ee4f57d] | 529 | uint32_t pMC68681_port; |
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[cd58d82] | 530 | unsigned char ucLineStatus; |
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[2c5ea01] | 531 | unsigned char cChar; |
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[cd58d82] | 532 | getRegister_f getReg; |
---|
| 533 | |
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[25c3ff91] | 534 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
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| 535 | getReg = Console_Port_Tbl[minor].getRegister; |
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[cd58d82] | 536 | |
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[25c3ff91] | 537 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
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[ab2dbd7] | 538 | if(ucLineStatus & MC68681_RX_READY) { |
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[25c3ff91] | 539 | cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER); |
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[ab2dbd7] | 540 | return (int)cChar; |
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[cd58d82] | 541 | } else { |
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[25c3ff91] | 542 | return -1; |
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[cd58d82] | 543 | } |
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| 544 | } |
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[2d8e51aa] | 545 | |
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[749c54e] | 546 | /* |
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| 547 | * mc68681_baud_rate |
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| 548 | */ |
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| 549 | |
---|
[2d8e51aa] | 550 | MC68681_STATIC int mc68681_baud_rate( |
---|
| 551 | int minor, |
---|
| 552 | int baud, |
---|
| 553 | unsigned int *baud_mask_p, |
---|
| 554 | unsigned int *acr_bit_p, |
---|
| 555 | unsigned int *command |
---|
| 556 | ) |
---|
| 557 | { |
---|
[dd5d2f04] | 558 | unsigned int baud_mask; |
---|
| 559 | unsigned int acr_bit; |
---|
| 560 | int status; |
---|
| 561 | int is_extended; |
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| 562 | int baud_requested; |
---|
[2d8e51aa] | 563 | mc68681_baud_table_t *baud_tbl; |
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| 564 | |
---|
| 565 | baud_mask = 0; |
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| 566 | acr_bit = 0; |
---|
| 567 | status = 0; |
---|
| 568 | |
---|
[5ca5a54] | 569 | if (Console_Port_Tbl[minor].ulDataPort & MC68681_DATA_BAUD_RATE_SET_2) |
---|
| 570 | { |
---|
[2d8e51aa] | 571 | acr_bit = 1; |
---|
[5ca5a54] | 572 | } |
---|
[2d8e51aa] | 573 | |
---|
| 574 | is_extended = 0; |
---|
| 575 | |
---|
| 576 | switch (Console_Port_Tbl[minor].ulDataPort & MC68681_XBRG_MASK) { |
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| 577 | case MC68681_XBRG_IGNORED: |
---|
| 578 | *command = 0x00; |
---|
| 579 | break; |
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| 580 | case MC68681_XBRG_ENABLED: |
---|
[2c5ea01] | 581 | *command = 0x80; |
---|
[2d8e51aa] | 582 | is_extended = 1; |
---|
| 583 | break; |
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| 584 | case MC68681_XBRG_DISABLED: |
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[2c5ea01] | 585 | *command = 0x90; |
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[2d8e51aa] | 586 | break; |
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| 587 | } |
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| 588 | |
---|
| 589 | baud_requested = baud & CBAUD; |
---|
| 590 | if (!baud_requested) |
---|
[2c5ea01] | 591 | baud_requested = B9600; /* default to 9600 baud */ |
---|
[a3d3d9a] | 592 | |
---|
[64a1529] | 593 | baud_requested = rtems_termios_baud_to_index( baud_requested ); |
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[2d8e51aa] | 594 | |
---|
| 595 | baud_tbl = (mc68681_baud_table_t *) Console_Port_Tbl[minor].ulClock; |
---|
| 596 | if (!baud_tbl) |
---|
[a6f441b] | 597 | rtems_fatal_error_occurred(RTEMS_INVALID_ADDRESS); |
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[2d8e51aa] | 598 | |
---|
| 599 | if ( is_extended ) |
---|
| 600 | baud_mask = (unsigned int)baud_tbl[ acr_bit + 2 ][ baud_requested ]; |
---|
| 601 | else |
---|
| 602 | baud_mask = baud_tbl[ acr_bit ][ baud_requested ]; |
---|
| 603 | |
---|
| 604 | if ( baud_mask == MC68681_BAUD_NOT_VALID ) |
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| 605 | status = -1; |
---|
| 606 | |
---|
[2c5ea01] | 607 | /* |
---|
| 608 | * upper nibble is receiver and lower nibble is transmitter |
---|
| 609 | */ |
---|
| 610 | |
---|
| 611 | *baud_mask_p = (baud_mask << 4) | baud_mask; |
---|
[2d8e51aa] | 612 | *acr_bit_p = acr_bit; |
---|
| 613 | return status; |
---|
| 614 | } |
---|
| 615 | |
---|
[be8cbbf] | 616 | /* |
---|
| 617 | * mc68681_process |
---|
| 618 | * |
---|
| 619 | * This routine is the per port console interrupt handler. |
---|
| 620 | */ |
---|
| 621 | |
---|
| 622 | MC68681_STATIC void mc68681_process( |
---|
| 623 | int minor |
---|
| 624 | ) |
---|
| 625 | { |
---|
[ee4f57d] | 626 | uint32_t pMC68681; |
---|
| 627 | uint32_t pMC68681_port; |
---|
[a3d3d9a] | 628 | volatile uint8_t ucLineStatus; |
---|
| 629 | volatile uint8_t ucISRStatus; |
---|
[e11bf43] | 630 | char cChar; |
---|
[be8cbbf] | 631 | getRegister_f getReg; |
---|
| 632 | setRegister_f setReg; |
---|
| 633 | |
---|
| 634 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
---|
| 635 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
---|
| 636 | getReg = Console_Port_Tbl[minor].getRegister; |
---|
| 637 | setReg = Console_Port_Tbl[minor].setRegister; |
---|
| 638 | |
---|
[a3d3d9a] | 639 | /* Get ISR at the beginning of the IT routine */ |
---|
[5ca5a54] | 640 | ucISRStatus = (*getReg)(pMC68681, MC68681_INTERRUPT_STATUS_REG); |
---|
[a3d3d9a] | 641 | |
---|
[5ca5a54] | 642 | /* Get good ISR a or b channel */ |
---|
| 643 | if (pMC68681 != pMC68681_port){ |
---|
| 644 | ucISRStatus >>= 4; |
---|
| 645 | } |
---|
[a3d3d9a] | 646 | |
---|
[5ca5a54] | 647 | /* See if is usefull to call rtems_termios_dequeue */ |
---|
| 648 | if(Console_Port_Data[minor].bActive == FALSE) { |
---|
| 649 | ucISRStatus = ucISRStatus & ~MC68681_IR_TX_READY; |
---|
| 650 | } |
---|
| 651 | |
---|
[be8cbbf] | 652 | /* |
---|
| 653 | * Deal with any received characters |
---|
| 654 | */ |
---|
[6640459d] | 655 | while(true) { |
---|
[be8cbbf] | 656 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
---|
| 657 | if(!(ucLineStatus & MC68681_RX_READY)) { |
---|
| 658 | break; |
---|
| 659 | } |
---|
| 660 | /* |
---|
| 661 | * If there is a RX error, then dump all the data. |
---|
| 662 | */ |
---|
| 663 | if ( ucLineStatus & MC68681_RX_ERRORS ) { |
---|
| 664 | do { |
---|
| 665 | cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER); |
---|
| 666 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
---|
| 667 | } while ( ucLineStatus & MC68681_RX_READY ); |
---|
| 668 | continue; |
---|
| 669 | } |
---|
| 670 | cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER); |
---|
[a3d3d9a] | 671 | rtems_termios_enqueue_raw_characters( |
---|
[be8cbbf] | 672 | Console_Port_Data[minor].termios_data, |
---|
[a3d3d9a] | 673 | &cChar, |
---|
| 674 | 1 |
---|
[be8cbbf] | 675 | ); |
---|
| 676 | } |
---|
| 677 | |
---|
| 678 | /* |
---|
| 679 | * Deal with the transmitter |
---|
| 680 | */ |
---|
| 681 | |
---|
[5ca5a54] | 682 | if (ucISRStatus & MC68681_IR_TX_READY) { |
---|
| 683 | if (!rtems_termios_dequeue_characters( |
---|
| 684 | Console_Port_Data[minor].termios_data, 1)) { |
---|
| 685 | /* If no more char to send, disable TX interrupt */ |
---|
[c68b990] | 686 | Console_Port_Data[minor].bActive = FALSE; |
---|
| 687 | mc68681_enable_interrupts(minor, MC68681_IMR_ENABLE_ALL_EXCEPT_TX); |
---|
| 688 | } |
---|
[be8cbbf] | 689 | } |
---|
| 690 | } |
---|
| 691 | |
---|
| 692 | /* |
---|
| 693 | * mc68681_build_imr |
---|
| 694 | * |
---|
| 695 | * This function returns the value for the interrupt mask register for this |
---|
| 696 | * DUART. Since this is a shared register, we must look at the other port |
---|
| 697 | * on this chip to determine whether or not it is using interrupts. |
---|
| 698 | */ |
---|
| 699 | |
---|
| 700 | MC68681_STATIC unsigned int mc68681_build_imr( |
---|
| 701 | int minor, |
---|
| 702 | int enable_flag |
---|
| 703 | ) |
---|
| 704 | { |
---|
| 705 | int mate; |
---|
[198d851] | 706 | int is_a; |
---|
[be8cbbf] | 707 | unsigned int mask; |
---|
| 708 | unsigned int mate_mask; |
---|
| 709 | unsigned int pMC68681; |
---|
| 710 | unsigned int pMC68681_port; |
---|
| 711 | mc68681_context *pmc68681Context; |
---|
[198d851] | 712 | mc68681_context *mateContext; |
---|
[a3d3d9a] | 713 | |
---|
[be8cbbf] | 714 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
---|
| 715 | pMC68681_port = Console_Port_Tbl[minor].ulCtrlPort2; |
---|
| 716 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
---|
| 717 | mate = pmc68681Context->mate; |
---|
| 718 | |
---|
[198d851] | 719 | mask = 0; |
---|
[be8cbbf] | 720 | mate_mask = 0; |
---|
| 721 | |
---|
[198d851] | 722 | is_a = (pMC68681 == pMC68681_port); |
---|
[a3d3d9a] | 723 | |
---|
[be8cbbf] | 724 | /* |
---|
[198d851] | 725 | * If there is a mate for this port, get its IMR mask. |
---|
[be8cbbf] | 726 | */ |
---|
| 727 | |
---|
| 728 | if ( mate != -1 ) { |
---|
[198d851] | 729 | mateContext = Console_Port_Data[mate].pDeviceContext; |
---|
[a3d3d9a] | 730 | |
---|
[198d851] | 731 | if (mateContext) |
---|
| 732 | mate_mask = mateContext->imr; |
---|
| 733 | } |
---|
[be8cbbf] | 734 | |
---|
[198d851] | 735 | /* |
---|
| 736 | * Calculate this port's IMR mask and save it in the context area. |
---|
| 737 | */ |
---|
[be8cbbf] | 738 | |
---|
[198d851] | 739 | if ( Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts ) |
---|
| 740 | mask = enable_flag; |
---|
| 741 | |
---|
| 742 | pmc68681Context->imr = mask; |
---|
[be8cbbf] | 743 | |
---|
| 744 | /* |
---|
[198d851] | 745 | * Now return the full IMR value |
---|
[be8cbbf] | 746 | */ |
---|
| 747 | |
---|
[198d851] | 748 | if (is_a) |
---|
| 749 | return (mate_mask << 4) | mask; |
---|
| 750 | |
---|
| 751 | return (mask << 4) | mate_mask; |
---|
| 752 | } |
---|
| 753 | |
---|
| 754 | /* |
---|
| 755 | * mc68681_enable_interrupts |
---|
| 756 | * |
---|
[70502bc4] | 757 | * This function enables specific interrupt sources on the DUART. |
---|
[198d851] | 758 | */ |
---|
| 759 | |
---|
| 760 | MC68681_STATIC void mc68681_enable_interrupts( |
---|
| 761 | int minor, |
---|
| 762 | int imr_mask |
---|
| 763 | ) |
---|
| 764 | { |
---|
[ee4f57d] | 765 | uint32_t pMC68681; |
---|
[198d851] | 766 | setRegister_f setReg; |
---|
| 767 | |
---|
| 768 | pMC68681 = Console_Port_Tbl[minor].ulCtrlPort1; |
---|
| 769 | setReg = Console_Port_Tbl[minor].setRegister; |
---|
| 770 | |
---|
| 771 | /* |
---|
| 772 | * Enable interrupts on RX and TX -- not break |
---|
| 773 | */ |
---|
[be8cbbf] | 774 | |
---|
[198d851] | 775 | (*setReg)( |
---|
| 776 | pMC68681, |
---|
| 777 | MC68681_INTERRUPT_MASK_REG, |
---|
| 778 | mc68681_build_imr(minor, imr_mask) |
---|
| 779 | ); |
---|
[be8cbbf] | 780 | } |
---|