[cd58d82] | 1 | /* |
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| 2 | * This file contains the termios TTY driver for the Motorola MC68681. |
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| 3 | * |
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| 4 | * This part is available from a number of secondary sources. |
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| 5 | * In particular, we know about the following: |
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| 6 | * |
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| 7 | * + Exar 88c681 and 68c681 |
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| 8 | * |
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[08311cc3] | 9 | * COPYRIGHT (c) 1989-1999. |
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[cd58d82] | 10 | * On-Line Applications Research Corporation (OAR). |
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| 11 | * |
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| 12 | * The license and distribution terms for this file may be |
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| 13 | * found in the file LICENSE in this distribution or at |
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[c499856] | 14 | * http://www.rtems.org/license/LICENSE. |
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[cd58d82] | 15 | */ |
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| 16 | |
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| 17 | #include <rtems.h> |
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| 18 | #include <rtems/libio.h> |
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[39046f7] | 19 | #include <rtems/score/sysstate.h> |
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[cd58d82] | 20 | #include <stdlib.h> |
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| 21 | |
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| 22 | #include <libchip/serial.h> |
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[a6f441b] | 23 | #include <libchip/mc68681.h> |
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[7e05b53] | 24 | #include <libchip/sersupp.h> |
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[cd58d82] | 25 | #include "mc68681_p.h" |
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| 26 | |
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| 27 | /* |
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| 28 | * Flow control is only supported when using interrupts |
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| 29 | */ |
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[424e23ee] | 30 | |
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[c8bd3cd] | 31 | const console_fns mc68681_fns = |
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[cd58d82] | 32 | { |
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[693b5b88] | 33 | libchip_serial_default_probe, /* deviceProbe */ |
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[cd58d82] | 34 | mc68681_open, /* deviceFirstOpen */ |
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[198d851] | 35 | NULL, /* deviceLastClose */ |
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[cd58d82] | 36 | NULL, /* deviceRead */ |
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| 37 | mc68681_write_support_int, /* deviceWrite */ |
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| 38 | mc68681_initialize_interrupts, /* deviceInitialize */ |
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| 39 | mc68681_write_polled, /* deviceWritePolled */ |
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[25c3ff91] | 40 | mc68681_set_attributes, /* deviceSetAttributes */ |
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[6640459d] | 41 | true /* deviceOutputUsesInterrupts */ |
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[cd58d82] | 42 | }; |
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| 43 | |
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[c8bd3cd] | 44 | const console_fns mc68681_fns_polled = |
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[cd58d82] | 45 | { |
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[693b5b88] | 46 | libchip_serial_default_probe, /* deviceProbe */ |
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[cd58d82] | 47 | mc68681_open, /* deviceFirstOpen */ |
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| 48 | mc68681_close, /* deviceLastClose */ |
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| 49 | mc68681_inbyte_nonblocking_polled, /* deviceRead */ |
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| 50 | mc68681_write_support_polled, /* deviceWrite */ |
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| 51 | mc68681_init, /* deviceInitialize */ |
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| 52 | mc68681_write_polled, /* deviceWritePolled */ |
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[25c3ff91] | 53 | mc68681_set_attributes, /* deviceSetAttributes */ |
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[6640459d] | 54 | false, /* deviceOutputUsesInterrupts */ |
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[cd58d82] | 55 | }; |
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| 56 | |
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[a29909cb] | 57 | |
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| 58 | #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE) |
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| 59 | extern void set_vector( rtems_isr_entry, rtems_vector_number, int ); |
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| 60 | #endif |
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[cd58d82] | 61 | |
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| 62 | /* |
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| 63 | * Console Device Driver Entry Points |
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| 64 | */ |
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[424e23ee] | 65 | |
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[beaaf49f] | 66 | /* |
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| 67 | * mc68681_baud_rate |
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| 68 | * |
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| 69 | * This routine returns the proper ACR bit and baud rate field values |
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| 70 | * based on the requested baud rate. The baud rate set to be used |
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| 71 | * must be configured by the user. |
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| 72 | */ |
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| 73 | |
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[2d8e51aa] | 74 | MC68681_STATIC int mc68681_baud_rate( |
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[25c3ff91] | 75 | int minor, |
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| 76 | int baud, |
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| 77 | unsigned int *baud_mask_p, |
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[2d8e51aa] | 78 | unsigned int *acr_bit_p, |
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| 79 | unsigned int *command |
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| 80 | ); |
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[25c3ff91] | 81 | |
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[beaaf49f] | 82 | /* |
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| 83 | * mc68681_set_attributes |
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| 84 | * |
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| 85 | * This function sets the DUART channel to reflect the requested termios |
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| 86 | * port settings. |
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| 87 | */ |
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| 88 | |
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[a3d3d9a] | 89 | MC68681_STATIC int mc68681_set_attributes( |
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[25c3ff91] | 90 | int minor, |
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| 91 | const struct termios *t |
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| 92 | ) |
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| 93 | { |
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[ee4f57d] | 94 | uint32_t pMC68681_port; |
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| 95 | uint32_t pMC68681; |
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[25c3ff91] | 96 | unsigned int mode1; |
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| 97 | unsigned int mode2; |
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| 98 | unsigned int baud_mask; |
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| 99 | unsigned int acr_bit; |
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[b7acc4ad] | 100 | unsigned int cmd = 0; |
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[25c3ff91] | 101 | setRegister_f setReg; |
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| 102 | rtems_interrupt_level Irql; |
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[cd58d82] | 103 | |
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[229bcca8] | 104 | pMC68681 = Console_Port_Tbl[minor]->ulCtrlPort1; |
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| 105 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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| 106 | setReg = Console_Port_Tbl[minor]->setRegister; |
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[7deeb16] | 107 | |
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| 108 | /* |
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[25c3ff91] | 109 | * Set the baud rate |
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[7deeb16] | 110 | */ |
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| 111 | |
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[2d8e51aa] | 112 | if (mc68681_baud_rate( minor, t->c_cflag, &baud_mask, &acr_bit, &cmd ) == -1) |
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[25c3ff91] | 113 | return -1; |
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| 114 | |
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| 115 | baud_mask |= baud_mask << 4; |
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| 116 | acr_bit <<= 7; |
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[7deeb16] | 117 | |
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| 118 | /* |
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[25c3ff91] | 119 | * Parity |
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[7deeb16] | 120 | */ |
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| 121 | |
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[25c3ff91] | 122 | mode1 = 0; |
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| 123 | mode2 = 0; |
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[7deeb16] | 124 | |
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[25c3ff91] | 125 | if (t->c_cflag & PARENB) { |
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| 126 | if (t->c_cflag & PARODD) |
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| 127 | mode1 |= 0x04; |
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[5ca5a54] | 128 | /* else |
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| 129 | mode1 |= 0x04; */ |
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[25c3ff91] | 130 | } else { |
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| 131 | mode1 |= 0x10; |
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| 132 | } |
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[cd58d82] | 133 | |
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[25c3ff91] | 134 | /* |
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| 135 | * Character Size |
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[cd58d82] | 136 | */ |
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| 137 | |
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[25c3ff91] | 138 | if (t->c_cflag & CSIZE) { |
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| 139 | switch (t->c_cflag & CSIZE) { |
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| 140 | case CS5: break; |
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| 141 | case CS6: mode1 |= 0x01; break; |
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| 142 | case CS7: mode1 |= 0x02; break; |
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| 143 | case CS8: mode1 |= 0x03; break; |
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| 144 | } |
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| 145 | } else { |
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| 146 | mode1 |= 0x03; /* default to 9600,8,N,1 */ |
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| 147 | } |
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[cd58d82] | 148 | |
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[25c3ff91] | 149 | /* |
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| 150 | * Stop Bits |
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| 151 | */ |
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[a3d3d9a] | 152 | |
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[25c3ff91] | 153 | if (t->c_cflag & CSTOPB) { |
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[5ca5a54] | 154 | mode2 |= 0x0F; /* 2 stop bits */ |
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[25c3ff91] | 155 | } else { |
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[5ca5a54] | 156 | if ((t->c_cflag & CSIZE) == CS5) /* CS5 and 1 stop bits not supported */ |
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[25c3ff91] | 157 | return -1; |
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[5ca5a54] | 158 | mode2 |= 0x07; /* 1 stop bit */ |
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[25c3ff91] | 159 | } |
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[cd58d82] | 160 | |
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[5ca5a54] | 161 | /* |
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| 162 | * Hardware Flow Control |
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| 163 | */ |
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| 164 | |
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| 165 | if(t->c_cflag & CRTSCTS) { |
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| 166 | mode1 |= 0x80; /* Enable Rx RTS Control */ |
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| 167 | mode2 |= 0x10; /* Enable CTS Enable Tx */ |
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| 168 | } |
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| 169 | |
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| 170 | |
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[25c3ff91] | 171 | rtems_interrupt_disable(Irql); |
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| 172 | (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr_bit ); |
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| 173 | (*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud_mask ); |
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[2c5ea01] | 174 | if ( cmd ) { |
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| 175 | (*setReg)( pMC68681_port, MC68681_COMMAND, cmd ); /* RX */ |
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| 176 | (*setReg)( pMC68681_port, MC68681_COMMAND, cmd | 0x20 ); /* TX */ |
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| 177 | } |
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[25c3ff91] | 178 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_MR_PTR ); |
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| 179 | (*setReg)( pMC68681_port, MC68681_MODE, mode1 ); |
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| 180 | (*setReg)( pMC68681_port, MC68681_MODE, mode2 ); |
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| 181 | rtems_interrupt_enable(Irql); |
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| 182 | return 0; |
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| 183 | } |
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[cd58d82] | 184 | |
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[beaaf49f] | 185 | /* |
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| 186 | * mc68681_initialize_context |
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| 187 | * |
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| 188 | * This function sets the default values of the per port context structure. |
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| 189 | */ |
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| 190 | |
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[2d8e51aa] | 191 | MC68681_STATIC void mc68681_initialize_context( |
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[a5d0c7c] | 192 | int minor, |
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| 193 | mc68681_context *pmc68681Context |
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| 194 | ) |
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| 195 | { |
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| 196 | int port; |
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| 197 | unsigned int pMC68681; |
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[be8cbbf] | 198 | unsigned int pMC68681_port; |
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[a3d3d9a] | 199 | |
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[229bcca8] | 200 | pMC68681 = Console_Port_Tbl[minor]->ulCtrlPort1; |
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| 201 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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[a5d0c7c] | 202 | |
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| 203 | pmc68681Context->mate = -1; |
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| 204 | |
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| 205 | for (port=0 ; port<Console_Port_Count ; port++ ) { |
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[229bcca8] | 206 | if ( Console_Port_Tbl[port]->ulCtrlPort1 == pMC68681 && |
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| 207 | Console_Port_Tbl[port]->ulCtrlPort2 != pMC68681_port ) { |
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[a5d0c7c] | 208 | pmc68681Context->mate = port; |
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[198d851] | 209 | pmc68681Context->imr = 0; |
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[a5d0c7c] | 210 | break; |
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| 211 | } |
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| 212 | } |
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| 213 | |
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| 214 | } |
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| 215 | |
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[beaaf49f] | 216 | /* |
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| 217 | * mc68681_init |
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| 218 | * |
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| 219 | * This function initializes the DUART to a quiecsent state. |
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| 220 | */ |
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| 221 | |
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[2d8e51aa] | 222 | MC68681_STATIC void mc68681_init(int minor) |
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[25c3ff91] | 223 | { |
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[ee4f57d] | 224 | uint32_t pMC68681_port; |
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[25c3ff91] | 225 | mc68681_context *pmc68681Context; |
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| 226 | setRegister_f setReg; |
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| 227 | |
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| 228 | pmc68681Context = (mc68681_context *) malloc(sizeof(mc68681_context)); |
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[cd58d82] | 229 | |
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[25c3ff91] | 230 | Console_Port_Data[minor].pDeviceContext = (void *)pmc68681Context; |
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[a5d0c7c] | 231 | |
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| 232 | mc68681_initialize_context( minor, pmc68681Context ); |
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[cd58d82] | 233 | |
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[229bcca8] | 234 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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| 235 | setReg = Console_Port_Tbl[minor]->setRegister; |
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[cd58d82] | 236 | |
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| 237 | /* |
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[25c3ff91] | 238 | * Reset everything and leave this port disabled. |
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[cd58d82] | 239 | */ |
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| 240 | |
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[198d851] | 241 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_RX ); |
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| 242 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_TX ); |
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| 243 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_ERROR ); |
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| 244 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_BREAK ); |
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| 245 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_STOP_BREAK ); |
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| 246 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX ); |
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| 247 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX ); |
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[cd58d82] | 248 | |
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[25c3ff91] | 249 | |
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[198d851] | 250 | (*setReg)( pMC68681_port, MC68681_MODE_REG_1A, 0x00 ); |
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| 251 | (*setReg)( pMC68681_port, MC68681_MODE_REG_2A, 0x02 ); |
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[4f0ffa57] | 252 | |
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| 253 | /* |
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| 254 | * Disable interrupts on RX and TX for this port |
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| 255 | */ |
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| 256 | |
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[198d851] | 257 | mc68681_enable_interrupts( minor, MC68681_IMR_DISABLE_ALL ); |
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[cd58d82] | 258 | } |
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| 259 | |
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[25c3ff91] | 260 | /* |
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[beaaf49f] | 261 | * mc68681_open |
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| 262 | * |
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| 263 | * This function opens a port for communication. |
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| 264 | * |
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| 265 | * Default state is 9600 baud, 8 bits, No parity, and 1 stop bit. |
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[25c3ff91] | 266 | */ |
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| 267 | |
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[2d8e51aa] | 268 | MC68681_STATIC int mc68681_open( |
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[cd58d82] | 269 | int major, |
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| 270 | int minor, |
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[25c3ff91] | 271 | void *arg |
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[cd58d82] | 272 | ) |
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| 273 | { |
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[ee4f57d] | 274 | uint32_t pMC68681; |
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| 275 | uint32_t pMC68681_port; |
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[25c3ff91] | 276 | unsigned int baud; |
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[5ca5a54] | 277 | unsigned int acr_bit; |
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[25c3ff91] | 278 | unsigned int vector; |
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[48b8259] | 279 | unsigned int command = 0; |
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[25c3ff91] | 280 | rtems_interrupt_level Irql; |
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| 281 | setRegister_f setReg; |
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[2186f401] | 282 | int status; |
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[a3d3d9a] | 283 | |
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| 284 | |
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[229bcca8] | 285 | pMC68681 = Console_Port_Tbl[minor]->ulCtrlPort1; |
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| 286 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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| 287 | setReg = Console_Port_Tbl[minor]->setRegister; |
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| 288 | vector = Console_Port_Tbl[minor]->ulIntVector; |
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[a3d3d9a] | 289 | |
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[e78c474b] | 290 | /* XXX default baud rate should be from configuration table */ |
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| 291 | |
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[5ca5a54] | 292 | status = mc68681_baud_rate( minor, B9600, &baud, &acr_bit, &command ); |
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| 293 | if (status < 0) rtems_fatal_error_occurred (RTEMS_NOT_DEFINED); |
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[25c3ff91] | 294 | |
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[b7ebcea3] | 295 | /* |
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| 296 | * Set the DUART channel to a default useable state |
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| 297 | */ |
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| 298 | |
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[25c3ff91] | 299 | rtems_interrupt_disable(Irql); |
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[5ca5a54] | 300 | (*setReg)( pMC68681, MC68681_AUX_CTRL_REG, acr_bit << 7 ); |
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[25c3ff91] | 301 | (*setReg)( pMC68681_port, MC68681_CLOCK_SELECT, baud ); |
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[e78c474b] | 302 | if ( command ) { |
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| 303 | (*setReg)( pMC68681_port, MC68681_COMMAND, command ); /* RX */ |
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| 304 | (*setReg)( pMC68681_port, MC68681_COMMAND, command | 0x20 ); /* TX */ |
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| 305 | } |
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[25c3ff91] | 306 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_MR_PTR ); |
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| 307 | (*setReg)( pMC68681_port, MC68681_MODE, 0x13 ); |
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| 308 | (*setReg)( pMC68681_port, MC68681_MODE, 0x07 ); |
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| 309 | rtems_interrupt_enable(Irql); |
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| 310 | |
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| 311 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_ENABLE_TX ); |
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| 312 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_ENABLE_RX ); |
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| 313 | |
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| 314 | (*setReg)( pMC68681, MC68681_INTERRUPT_VECTOR_REG, vector ); |
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| 315 | |
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[4f0ffa57] | 316 | return RTEMS_SUCCESSFUL; |
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[cd58d82] | 317 | } |
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| 318 | |
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[beaaf49f] | 319 | /* |
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| 320 | * mc68681_close |
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| 321 | * |
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| 322 | * This function shuts down the requested port. |
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| 323 | */ |
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| 324 | |
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[2d8e51aa] | 325 | MC68681_STATIC int mc68681_close( |
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[cd58d82] | 326 | int major, |
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| 327 | int minor, |
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[25c3ff91] | 328 | void *arg |
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[cd58d82] | 329 | ) |
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| 330 | { |
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[ee4f57d] | 331 | uint32_t pMC68681_port; |
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[b7ebcea3] | 332 | setRegister_f setReg; |
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| 333 | |
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[229bcca8] | 334 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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| 335 | setReg = Console_Port_Tbl[minor]->setRegister; |
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[b7ebcea3] | 336 | |
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| 337 | /* |
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| 338 | * Disable interrupts from this channel and then disable it totally. |
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| 339 | */ |
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| 340 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_TX ); |
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| 341 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_DISABLE_RX ); |
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| 342 | |
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[cd58d82] | 343 | return(RTEMS_SUCCESSFUL); |
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| 344 | } |
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| 345 | |
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[a3d3d9a] | 346 | /* |
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[cd58d82] | 347 | * mc68681_write_polled |
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[beaaf49f] | 348 | * |
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| 349 | * This routine polls out the requested character. |
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[cd58d82] | 350 | */ |
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[424e23ee] | 351 | |
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[2d8e51aa] | 352 | MC68681_STATIC void mc68681_write_polled( |
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[a3d3d9a] | 353 | int minor, |
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[cd58d82] | 354 | char cChar |
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| 355 | ) |
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| 356 | { |
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[ee4f57d] | 357 | uint32_t pMC68681_port; |
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[cd58d82] | 358 | unsigned char ucLineStatus; |
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| 359 | int iTimeout; |
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| 360 | getRegister_f getReg; |
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[25c3ff91] | 361 | setRegister_f setReg; |
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[cd58d82] | 362 | |
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[229bcca8] | 363 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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| 364 | getReg = Console_Port_Tbl[minor]->getRegister; |
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| 365 | setReg = Console_Port_Tbl[minor]->setRegister; |
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[cd58d82] | 366 | |
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| 367 | /* |
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| 368 | * wait for transmitter holding register to be empty |
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| 369 | */ |
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[ab2dbd7] | 370 | iTimeout = 1000; |
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[25c3ff91] | 371 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
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[2c5ea01] | 372 | while ((ucLineStatus & (MC68681_TX_READY|MC68681_TX_EMPTY)) == 0) { |
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| 373 | |
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| 374 | if ((ucLineStatus & 0xF0)) |
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| 375 | (*setReg)( pMC68681_port, MC68681_COMMAND, MC68681_MODE_REG_RESET_ERROR ); |
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[ab2dbd7] | 376 | |
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[cd58d82] | 377 | /* |
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| 378 | * Yield while we wait |
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| 379 | */ |
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[ab2dbd7] | 380 | |
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[0eb85ae] | 381 | #if 0 |
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[cd58d82] | 382 | if(_System_state_Is_up(_System_state_Get())) { |
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| 383 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
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| 384 | } |
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[0eb85ae] | 385 | #endif |
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[25c3ff91] | 386 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
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[cd58d82] | 387 | if(!--iTimeout) { |
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| 388 | break; |
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| 389 | } |
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| 390 | } |
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| 391 | |
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| 392 | /* |
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| 393 | * transmit character |
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| 394 | */ |
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[ab2dbd7] | 395 | |
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[25c3ff91] | 396 | (*setReg)(pMC68681_port, MC68681_TX_BUFFER, cChar); |
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[cd58d82] | 397 | } |
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| 398 | |
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[4f0ffa57] | 399 | /* |
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| 400 | * mc68681_isr |
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| 401 | * |
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| 402 | * This is the single interrupt entry point which parcels interrupts |
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| 403 | * out to the various ports. |
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| 404 | */ |
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| 405 | |
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[2d8e51aa] | 406 | MC68681_STATIC rtems_isr mc68681_isr( |
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[cd58d82] | 407 | rtems_vector_number vector |
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| 408 | ) |
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| 409 | { |
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| 410 | int minor; |
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| 411 | |
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[ab2dbd7] | 412 | for(minor=0 ; minor<Console_Port_Count ; minor++) { |
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[229bcca8] | 413 | if(Console_Port_Tbl[minor]->ulIntVector == vector && |
---|
| 414 | Console_Port_Tbl[minor]->deviceType == SERIAL_MC68681 ) { |
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[cd58d82] | 415 | mc68681_process(minor); |
---|
| 416 | } |
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| 417 | } |
---|
| 418 | } |
---|
| 419 | |
---|
[beaaf49f] | 420 | /* |
---|
| 421 | * mc68681_initialize_interrupts |
---|
| 422 | * |
---|
| 423 | * This routine initializes the console's receive and transmit |
---|
| 424 | * ring buffers and loads the appropriate vectors to handle the interrupts. |
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| 425 | */ |
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| 426 | |
---|
[2d8e51aa] | 427 | MC68681_STATIC void mc68681_initialize_interrupts(int minor) |
---|
[cd58d82] | 428 | { |
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| 429 | mc68681_init(minor); |
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| 430 | |
---|
| 431 | Console_Port_Data[minor].bActive = FALSE; |
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| 432 | |
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[a29909cb] | 433 | #if (CPU_SIMPLE_VECTORED_INTERRUPTS == TRUE) |
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[229bcca8] | 434 | set_vector(mc68681_isr, Console_Port_Tbl[minor]->ulIntVector, 1); |
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[a29909cb] | 435 | #endif |
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[cd58d82] | 436 | |
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[198d851] | 437 | mc68681_enable_interrupts(minor,MC68681_IMR_ENABLE_ALL_EXCEPT_TX); |
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[cd58d82] | 438 | } |
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| 439 | |
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[a3d3d9a] | 440 | /* |
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[cd58d82] | 441 | * mc68681_write_support_int |
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| 442 | * |
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[beaaf49f] | 443 | * Console Termios output entry point when using interrupt driven output. |
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[cd58d82] | 444 | */ |
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[ab2dbd7] | 445 | |
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[3ed964f9] | 446 | MC68681_STATIC ssize_t mc68681_write_support_int( |
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[a3d3d9a] | 447 | int minor, |
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| 448 | const char *buf, |
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[3ed964f9] | 449 | size_t len |
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[cd58d82] | 450 | ) |
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| 451 | { |
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[ee4f57d] | 452 | uint32_t Irql; |
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| 453 | uint32_t pMC68681_port; |
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[198d851] | 454 | setRegister_f setReg; |
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| 455 | |
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[229bcca8] | 456 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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| 457 | setReg = Console_Port_Tbl[minor]->setRegister; |
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[cd58d82] | 458 | |
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| 459 | /* |
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[b070d69a] | 460 | * We are using interrupt driven output and termios only sends us |
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| 461 | * one character at a time. |
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[cd58d82] | 462 | */ |
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[ab2dbd7] | 463 | |
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[198d851] | 464 | if ( !len ) |
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| 465 | return 0; |
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[cd58d82] | 466 | |
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[198d851] | 467 | /* |
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[b070d69a] | 468 | * Put the character out and enable interrupts if necessary. |
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[198d851] | 469 | */ |
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[b070d69a] | 470 | |
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[198d851] | 471 | rtems_interrupt_disable(Irql); |
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[c68b990] | 472 | if ( Console_Port_Data[minor].bActive == FALSE ) { |
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| 473 | Console_Port_Data[minor].bActive = TRUE; |
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| 474 | mc68681_enable_interrupts(minor, MC68681_IMR_ENABLE_ALL); |
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| 475 | } |
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[198d851] | 476 | (*setReg)(pMC68681_port, MC68681_TX_BUFFER, *buf); |
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| 477 | rtems_interrupt_enable(Irql); |
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[b070d69a] | 478 | |
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[3ed964f9] | 479 | return 0; |
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[cd58d82] | 480 | } |
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| 481 | |
---|
[a3d3d9a] | 482 | /* |
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[cd58d82] | 483 | * mc68681_write_support_polled |
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| 484 | * |
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[beaaf49f] | 485 | * Console Termios output entry point when using polled output. |
---|
[cd58d82] | 486 | * |
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| 487 | */ |
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[ab2dbd7] | 488 | |
---|
[3ed964f9] | 489 | MC68681_STATIC ssize_t mc68681_write_support_polled( |
---|
[a3d3d9a] | 490 | int minor, |
---|
| 491 | const char *buf, |
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[3ed964f9] | 492 | size_t len |
---|
[cd58d82] | 493 | ) |
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| 494 | { |
---|
| 495 | int nwrite = 0; |
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| 496 | |
---|
| 497 | /* |
---|
| 498 | * poll each byte in the string out of the port. |
---|
| 499 | */ |
---|
| 500 | while (nwrite < len) { |
---|
| 501 | /* |
---|
| 502 | * transmit character |
---|
| 503 | */ |
---|
| 504 | mc68681_write_polled(minor, *buf++); |
---|
| 505 | nwrite++; |
---|
| 506 | } |
---|
| 507 | |
---|
| 508 | /* |
---|
| 509 | * return the number of bytes written. |
---|
| 510 | */ |
---|
| 511 | return nwrite; |
---|
| 512 | } |
---|
| 513 | |
---|
[a3d3d9a] | 514 | /* |
---|
| 515 | * mc68681_inbyte_nonblocking_polled |
---|
[cd58d82] | 516 | * |
---|
| 517 | * Console Termios polling input entry point. |
---|
| 518 | */ |
---|
| 519 | |
---|
[a3d3d9a] | 520 | MC68681_STATIC int mc68681_inbyte_nonblocking_polled( |
---|
| 521 | int minor |
---|
[cd58d82] | 522 | ) |
---|
| 523 | { |
---|
[ee4f57d] | 524 | uint32_t pMC68681_port; |
---|
[cd58d82] | 525 | unsigned char ucLineStatus; |
---|
[2c5ea01] | 526 | unsigned char cChar; |
---|
[cd58d82] | 527 | getRegister_f getReg; |
---|
| 528 | |
---|
[229bcca8] | 529 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
---|
| 530 | getReg = Console_Port_Tbl[minor]->getRegister; |
---|
[cd58d82] | 531 | |
---|
[25c3ff91] | 532 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
---|
[ab2dbd7] | 533 | if(ucLineStatus & MC68681_RX_READY) { |
---|
[25c3ff91] | 534 | cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER); |
---|
[ab2dbd7] | 535 | return (int)cChar; |
---|
[cd58d82] | 536 | } else { |
---|
[25c3ff91] | 537 | return -1; |
---|
[cd58d82] | 538 | } |
---|
| 539 | } |
---|
[2d8e51aa] | 540 | |
---|
[749c54e] | 541 | /* |
---|
| 542 | * mc68681_baud_rate |
---|
| 543 | */ |
---|
| 544 | |
---|
[2d8e51aa] | 545 | MC68681_STATIC int mc68681_baud_rate( |
---|
| 546 | int minor, |
---|
| 547 | int baud, |
---|
| 548 | unsigned int *baud_mask_p, |
---|
| 549 | unsigned int *acr_bit_p, |
---|
| 550 | unsigned int *command |
---|
| 551 | ) |
---|
| 552 | { |
---|
[dd5d2f04] | 553 | unsigned int baud_mask; |
---|
| 554 | unsigned int acr_bit; |
---|
| 555 | int status; |
---|
| 556 | int is_extended; |
---|
| 557 | int baud_requested; |
---|
[2d8e51aa] | 558 | mc68681_baud_table_t *baud_tbl; |
---|
| 559 | |
---|
| 560 | baud_mask = 0; |
---|
| 561 | acr_bit = 0; |
---|
| 562 | status = 0; |
---|
| 563 | |
---|
[229bcca8] | 564 | if (Console_Port_Tbl[minor]->ulDataPort & MC68681_DATA_BAUD_RATE_SET_2) |
---|
[5ca5a54] | 565 | { |
---|
[2d8e51aa] | 566 | acr_bit = 1; |
---|
[5ca5a54] | 567 | } |
---|
[2d8e51aa] | 568 | |
---|
| 569 | is_extended = 0; |
---|
| 570 | |
---|
[229bcca8] | 571 | switch (Console_Port_Tbl[minor]->ulDataPort & MC68681_XBRG_MASK) { |
---|
[2d8e51aa] | 572 | case MC68681_XBRG_IGNORED: |
---|
| 573 | *command = 0x00; |
---|
| 574 | break; |
---|
| 575 | case MC68681_XBRG_ENABLED: |
---|
[2c5ea01] | 576 | *command = 0x80; |
---|
[2d8e51aa] | 577 | is_extended = 1; |
---|
| 578 | break; |
---|
| 579 | case MC68681_XBRG_DISABLED: |
---|
[2c5ea01] | 580 | *command = 0x90; |
---|
[2d8e51aa] | 581 | break; |
---|
| 582 | } |
---|
| 583 | |
---|
[1c6926c1] | 584 | baud_requested = baud; |
---|
[2d8e51aa] | 585 | if (!baud_requested) |
---|
[2c5ea01] | 586 | baud_requested = B9600; /* default to 9600 baud */ |
---|
[a3d3d9a] | 587 | |
---|
[64a1529] | 588 | baud_requested = rtems_termios_baud_to_index( baud_requested ); |
---|
[17d1aa7] | 589 | if (baud_requested == -1) |
---|
| 590 | return -1; |
---|
[2d8e51aa] | 591 | |
---|
[642c500] | 592 | baud_tbl = (mc68681_baud_table_t *) |
---|
[229bcca8] | 593 | ((uintptr_t)Console_Port_Tbl[minor]->ulClock); |
---|
[2d8e51aa] | 594 | if (!baud_tbl) |
---|
[a6f441b] | 595 | rtems_fatal_error_occurred(RTEMS_INVALID_ADDRESS); |
---|
[2d8e51aa] | 596 | |
---|
| 597 | if ( is_extended ) |
---|
| 598 | baud_mask = (unsigned int)baud_tbl[ acr_bit + 2 ][ baud_requested ]; |
---|
| 599 | else |
---|
| 600 | baud_mask = baud_tbl[ acr_bit ][ baud_requested ]; |
---|
| 601 | |
---|
| 602 | if ( baud_mask == MC68681_BAUD_NOT_VALID ) |
---|
| 603 | status = -1; |
---|
| 604 | |
---|
[2c5ea01] | 605 | /* |
---|
| 606 | * upper nibble is receiver and lower nibble is transmitter |
---|
| 607 | */ |
---|
| 608 | |
---|
| 609 | *baud_mask_p = (baud_mask << 4) | baud_mask; |
---|
[2d8e51aa] | 610 | *acr_bit_p = acr_bit; |
---|
| 611 | return status; |
---|
| 612 | } |
---|
| 613 | |
---|
[be8cbbf] | 614 | /* |
---|
| 615 | * mc68681_process |
---|
| 616 | * |
---|
| 617 | * This routine is the per port console interrupt handler. |
---|
| 618 | */ |
---|
| 619 | |
---|
| 620 | MC68681_STATIC void mc68681_process( |
---|
| 621 | int minor |
---|
| 622 | ) |
---|
| 623 | { |
---|
[ee4f57d] | 624 | uint32_t pMC68681; |
---|
| 625 | uint32_t pMC68681_port; |
---|
[a3d3d9a] | 626 | volatile uint8_t ucLineStatus; |
---|
| 627 | volatile uint8_t ucISRStatus; |
---|
[e11bf43] | 628 | char cChar; |
---|
[be8cbbf] | 629 | getRegister_f getReg; |
---|
| 630 | |
---|
[229bcca8] | 631 | pMC68681 = Console_Port_Tbl[minor]->ulCtrlPort1; |
---|
| 632 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
---|
| 633 | getReg = Console_Port_Tbl[minor]->getRegister; |
---|
[be8cbbf] | 634 | |
---|
[a3d3d9a] | 635 | /* Get ISR at the beginning of the IT routine */ |
---|
[5ca5a54] | 636 | ucISRStatus = (*getReg)(pMC68681, MC68681_INTERRUPT_STATUS_REG); |
---|
[a3d3d9a] | 637 | |
---|
[5ca5a54] | 638 | /* Get good ISR a or b channel */ |
---|
| 639 | if (pMC68681 != pMC68681_port){ |
---|
| 640 | ucISRStatus >>= 4; |
---|
| 641 | } |
---|
[a3d3d9a] | 642 | |
---|
[5ca5a54] | 643 | /* See if is usefull to call rtems_termios_dequeue */ |
---|
| 644 | if(Console_Port_Data[minor].bActive == FALSE) { |
---|
| 645 | ucISRStatus = ucISRStatus & ~MC68681_IR_TX_READY; |
---|
| 646 | } |
---|
| 647 | |
---|
[be8cbbf] | 648 | /* |
---|
| 649 | * Deal with any received characters |
---|
| 650 | */ |
---|
[6640459d] | 651 | while(true) { |
---|
[be8cbbf] | 652 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
---|
| 653 | if(!(ucLineStatus & MC68681_RX_READY)) { |
---|
| 654 | break; |
---|
| 655 | } |
---|
| 656 | /* |
---|
| 657 | * If there is a RX error, then dump all the data. |
---|
| 658 | */ |
---|
| 659 | if ( ucLineStatus & MC68681_RX_ERRORS ) { |
---|
| 660 | do { |
---|
| 661 | cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER); |
---|
| 662 | ucLineStatus = (*getReg)(pMC68681_port, MC68681_STATUS); |
---|
| 663 | } while ( ucLineStatus & MC68681_RX_READY ); |
---|
| 664 | continue; |
---|
| 665 | } |
---|
| 666 | cChar = (*getReg)(pMC68681_port, MC68681_RX_BUFFER); |
---|
[a3d3d9a] | 667 | rtems_termios_enqueue_raw_characters( |
---|
[be8cbbf] | 668 | Console_Port_Data[minor].termios_data, |
---|
[a3d3d9a] | 669 | &cChar, |
---|
| 670 | 1 |
---|
[be8cbbf] | 671 | ); |
---|
| 672 | } |
---|
| 673 | |
---|
| 674 | /* |
---|
| 675 | * Deal with the transmitter |
---|
| 676 | */ |
---|
| 677 | |
---|
[5ca5a54] | 678 | if (ucISRStatus & MC68681_IR_TX_READY) { |
---|
| 679 | if (!rtems_termios_dequeue_characters( |
---|
| 680 | Console_Port_Data[minor].termios_data, 1)) { |
---|
| 681 | /* If no more char to send, disable TX interrupt */ |
---|
[c68b990] | 682 | Console_Port_Data[minor].bActive = FALSE; |
---|
| 683 | mc68681_enable_interrupts(minor, MC68681_IMR_ENABLE_ALL_EXCEPT_TX); |
---|
| 684 | } |
---|
[be8cbbf] | 685 | } |
---|
| 686 | } |
---|
| 687 | |
---|
| 688 | /* |
---|
| 689 | * mc68681_build_imr |
---|
| 690 | * |
---|
| 691 | * This function returns the value for the interrupt mask register for this |
---|
| 692 | * DUART. Since this is a shared register, we must look at the other port |
---|
| 693 | * on this chip to determine whether or not it is using interrupts. |
---|
| 694 | */ |
---|
| 695 | |
---|
| 696 | MC68681_STATIC unsigned int mc68681_build_imr( |
---|
| 697 | int minor, |
---|
| 698 | int enable_flag |
---|
| 699 | ) |
---|
| 700 | { |
---|
| 701 | int mate; |
---|
[198d851] | 702 | int is_a; |
---|
[be8cbbf] | 703 | unsigned int mask; |
---|
| 704 | unsigned int mate_mask; |
---|
| 705 | unsigned int pMC68681; |
---|
| 706 | unsigned int pMC68681_port; |
---|
| 707 | mc68681_context *pmc68681Context; |
---|
[198d851] | 708 | mc68681_context *mateContext; |
---|
[a3d3d9a] | 709 | |
---|
[229bcca8] | 710 | pMC68681 = Console_Port_Tbl[minor]->ulCtrlPort1; |
---|
| 711 | pMC68681_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
---|
[be8cbbf] | 712 | pmc68681Context = (mc68681_context *) Console_Port_Data[minor].pDeviceContext; |
---|
| 713 | mate = pmc68681Context->mate; |
---|
| 714 | |
---|
[198d851] | 715 | mask = 0; |
---|
[be8cbbf] | 716 | mate_mask = 0; |
---|
| 717 | |
---|
[198d851] | 718 | is_a = (pMC68681 == pMC68681_port); |
---|
[a3d3d9a] | 719 | |
---|
[be8cbbf] | 720 | /* |
---|
[198d851] | 721 | * If there is a mate for this port, get its IMR mask. |
---|
[be8cbbf] | 722 | */ |
---|
| 723 | |
---|
| 724 | if ( mate != -1 ) { |
---|
[198d851] | 725 | mateContext = Console_Port_Data[mate].pDeviceContext; |
---|
[a3d3d9a] | 726 | |
---|
[198d851] | 727 | if (mateContext) |
---|
| 728 | mate_mask = mateContext->imr; |
---|
| 729 | } |
---|
[be8cbbf] | 730 | |
---|
[198d851] | 731 | /* |
---|
| 732 | * Calculate this port's IMR mask and save it in the context area. |
---|
| 733 | */ |
---|
[be8cbbf] | 734 | |
---|
[229bcca8] | 735 | if ( Console_Port_Tbl[minor]->pDeviceFns->deviceOutputUsesInterrupts ) |
---|
[198d851] | 736 | mask = enable_flag; |
---|
| 737 | |
---|
| 738 | pmc68681Context->imr = mask; |
---|
[be8cbbf] | 739 | |
---|
| 740 | /* |
---|
[198d851] | 741 | * Now return the full IMR value |
---|
[be8cbbf] | 742 | */ |
---|
| 743 | |
---|
[198d851] | 744 | if (is_a) |
---|
| 745 | return (mate_mask << 4) | mask; |
---|
| 746 | |
---|
| 747 | return (mask << 4) | mate_mask; |
---|
| 748 | } |
---|
| 749 | |
---|
| 750 | /* |
---|
| 751 | * mc68681_enable_interrupts |
---|
| 752 | * |
---|
[70502bc4] | 753 | * This function enables specific interrupt sources on the DUART. |
---|
[198d851] | 754 | */ |
---|
| 755 | |
---|
| 756 | MC68681_STATIC void mc68681_enable_interrupts( |
---|
| 757 | int minor, |
---|
| 758 | int imr_mask |
---|
| 759 | ) |
---|
| 760 | { |
---|
[ee4f57d] | 761 | uint32_t pMC68681; |
---|
[198d851] | 762 | setRegister_f setReg; |
---|
| 763 | |
---|
[229bcca8] | 764 | pMC68681 = Console_Port_Tbl[minor]->ulCtrlPort1; |
---|
| 765 | setReg = Console_Port_Tbl[minor]->setRegister; |
---|
[198d851] | 766 | |
---|
| 767 | /* |
---|
| 768 | * Enable interrupts on RX and TX -- not break |
---|
| 769 | */ |
---|
[be8cbbf] | 770 | |
---|
[198d851] | 771 | (*setReg)( |
---|
| 772 | pMC68681, |
---|
| 773 | MC68681_INTERRUPT_MASK_REG, |
---|
| 774 | mc68681_build_imr(minor, imr_mask) |
---|
| 775 | ); |
---|
[be8cbbf] | 776 | } |
---|