source: rtems/c/src/libchip/network/open_eth.c @ a612b50

4.104.114.84.95
Last change on this file since a612b50 was a612b50, checked in by Joel Sherrill <joel.sherrill@…>, on 09/01/06 at 15:39:00

2006-09-01 Joel Sherrill <joel@…>

  • libchip/network/cs8900.c, libchip/network/greth.c, libchip/network/i82586.c, libchip/network/open_eth.c, libchip/network/sonic.c: Remove warnings -- use uintptr_t, properly sized integers, and inttypes.h printf helpers.
  • Property mode set to 100644
File size: 17.1 KB
Line 
1/*
2 *  RTEMS driver for Opencores Ethernet Controller
3 *
4 *  Weakly based on dec21140 rtems driver and open_eth linux driver
5 *  Written by Jiri Gaisler, Gaisler Research
6 *
7 *  The license and distribution terms for this file may be
8 *  found in found in the file LICENSE in this distribution or at
9 *  http://www.rtems.com/license/LICENSE.
10 *
11 */
12
13/*
14 *  This driver current only supports architectures with the old style
15 *  exception processing.  The following checks try to keep this
16 *  from being compiled on systems which can't support this driver.
17 *
18 *  NOTE: The i386, ARM, and PowerPC use a different interrupt API than
19 *        that used by this driver.
20 */
21
22#if defined(__i386__) || defined(__arm__) || defined(__PPC__)
23  #define OPENETH_NOT_SUPPORTED
24#endif
25
26#if !defined(OPENETH_NOT_SUPPORTED)
27#include <bsp.h>
28#include <rtems.h>
29
30#include <bsp.h>
31
32#include <inttypes.h>
33#include <stdlib.h>
34#include <stdio.h>
35#include <stdarg.h>
36#include <errno.h>
37
38#include <rtems/error.h>
39#include <rtems/rtems_bsdnet.h>
40#include <libchip/open_eth.h>
41
42#include <sys/param.h>
43#include <sys/mbuf.h>
44
45#include <sys/socket.h>
46#include <sys/sockio.h>
47#include <net/if.h>
48#include <netinet/in.h>
49#include <netinet/if_ether.h>
50
51#ifdef malloc
52#undef malloc
53#endif
54#ifdef free
55#undef free
56#endif
57
58extern void set_vector( rtems_isr_entry, rtems_vector_number, int );
59
60 /*
61#define OPEN_ETH_DEBUG
62 */
63
64#ifdef CPU_U32_FIX
65extern void ipalign(struct mbuf *m);
66#endif
67
68/* message descriptor entry */
69struct MDTX
70{
71    char  *buf;
72};
73
74struct MDRX
75{
76    struct mbuf *m;
77};
78
79/*
80 * Number of OCs supported by this driver
81 */
82#define NOCDRIVER       1
83
84/*
85 * Receive buffer size -- Allow for a full ethernet packet including CRC
86 */
87#define RBUF_SIZE       1536
88
89#define ET_MINLEN 64            /* minimum message length */
90
91/*
92 * RTEMS event used by interrupt handler to signal driver tasks.
93 * This must not be any of the events used by the network task synchronization.
94 */
95#define INTERRUPT_EVENT RTEMS_EVENT_1
96
97/*
98 * RTEMS event used to start transmit daemon.
99 * This must not be the same as INTERRUPT_EVENT.
100 */
101#define START_TRANSMIT_EVENT    RTEMS_EVENT_2
102
103 /* event to send when tx buffers become available */
104#define OPEN_ETH_TX_WAIT_EVENT  RTEMS_EVENT_3
105
106 /* suspend when all TX descriptors exhausted */
107 /*
108#define OETH_SUSPEND_NOTXBUF
109 */
110
111#if (MCLBYTES < RBUF_SIZE)
112# error "Driver must have MCLBYTES > RBUF_SIZE"
113#endif
114
115/*
116 * Per-device data
117 */
118struct open_eth_softc
119{
120
121    struct arpcom arpcom;
122
123    oeth_regs *regs;
124
125    int acceptBroadcast;
126    rtems_id rxDaemonTid;
127    rtems_id txDaemonTid;
128
129    unsigned int tx_ptr;
130    unsigned int rx_ptr;
131    unsigned int txbufs;
132    unsigned int rxbufs;
133    struct MDTX *txdesc;
134    struct MDRX *rxdesc;
135    rtems_vector_number vector;
136    unsigned int en100MHz;
137
138    /*
139     * Statistics
140     */
141    unsigned long rxInterrupts;
142    unsigned long rxPackets;
143    unsigned long rxLengthError;
144    unsigned long rxNonOctet;
145    unsigned long rxBadCRC;
146    unsigned long rxOverrun;
147    unsigned long rxMiss;
148    unsigned long rxCollision;
149
150    unsigned long txInterrupts;
151    unsigned long txDeferred;
152    unsigned long txHeartbeat;
153    unsigned long txLateCollision;
154    unsigned long txRetryLimit;
155    unsigned long txUnderrun;
156    unsigned long txLostCarrier;
157    unsigned long txRawWait;
158};
159
160static struct open_eth_softc oc;
161
162/* OPEN_ETH interrupt handler */
163
164static rtems_isr
165open_eth_interrupt_handler (rtems_vector_number v)
166{
167    uint32_t status;
168
169    /* read and clear interrupt cause */
170
171    status = oc.regs->int_src;
172    oc.regs->int_src = status;
173
174    /* Frame received? */
175
176    if (status & (OETH_INT_RXF | OETH_INT_RXE))
177      {
178          oc.rxInterrupts++;
179          rtems_event_send (oc.rxDaemonTid, INTERRUPT_EVENT);
180      }
181#ifdef OETH_SUSPEND_NOTXBUF
182    if (status & (OETH_INT_MASK_TXB | OETH_INT_MASK_TXC | OETH_INT_MASK_TXE))
183      {
184          oc.txInterrupts++;
185          rtems_event_send (oc.txDaemonTid, OPEN_ETH_TX_WAIT_EVENT);
186      }
187#endif
188      /*
189#ifdef __leon__
190      LEON_Clear_interrupt(v-0x10);
191#endif
192      */
193}
194
195static uint32_t read_mii(uint32_t addr)
196{
197    while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
198    oc.regs->miiaddress = addr << 8;
199    oc.regs->miicommand = OETH_MIICOMMAND_RSTAT;
200    while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
201    if (!(oc.regs->miistatus & OETH_MIISTATUS_NVALID))
202        return(oc.regs->miirx_data);
203    else {
204        printf("open_eth: failed to read mii\n");
205        return (0);
206    }
207}
208
209static void write_mii(uint32_t addr, uint32_t data)
210{
211    while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
212    oc.regs->miiaddress = addr << 8;
213    oc.regs->miitx_data = data;
214    oc.regs->miicommand = OETH_MIICOMMAND_WCTRLDATA;
215    while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
216}
217/*
218 * Initialize the ethernet hardware
219 */
220static void
221open_eth_initialize_hardware (struct open_eth_softc *sc)
222{
223    struct mbuf *m;
224    int i;
225    int mii_cr = 0;
226
227    oeth_regs *regs;
228
229    regs = sc->regs;
230
231    /* Reset the controller.  */
232
233    regs->ctrlmoder = 0;
234    regs->moder = OETH_MODER_RST;       /* Reset ON */
235    regs->moder = 0;                    /* Reset OFF */
236
237    /* reset PHY and wait for complettion */
238    mii_cr = 0x3300;
239    if (!sc->en100MHz) mii_cr = 0;
240    write_mii(0, mii_cr | 0x8000);
241    while (read_mii(0) & 0x8000) {}
242    if (!sc->en100MHz) write_mii(0, 0);
243    mii_cr = read_mii(0);
244    printf("open_eth: driver attached, PHY config : 0x%04" PRIx32 "\n", read_mii(0));
245
246#ifdef OPEN_ETH_DEBUG
247    printf("mii_cr: %04x\n", mii_cr);
248    for (i=0;i<21;i++)
249      printf("mii_reg %2d : 0x%04x\n", i, read_mii(i));
250#endif
251
252    /* Setting TXBD base to sc->txbufs  */
253
254    regs->tx_bd_num = sc->txbufs;
255
256    /* Initialize rx/tx pointers.  */
257
258    sc->rx_ptr = 0;
259    sc->tx_ptr = 0;
260
261    /* Set min/max packet length */
262    regs->packet_len = 0x00400600;
263
264    /* Set IPGT register to recomended value */
265    regs->ipgt = 0x00000015;
266
267    /* Set IPGR1 register to recomended value */
268    regs->ipgr1 = 0x0000000c;
269
270    /* Set IPGR2 register to recomended value */
271    regs->ipgr2 = 0x00000012;
272
273    /* Set COLLCONF register to recomended value */
274    regs->collconf = 0x000f003f;
275
276    /* initialize TX descriptors */
277
278    sc->txdesc = calloc(sc->txbufs, sizeof(*sc->txdesc));
279    for (i = 0; i < sc->txbufs; i++)
280      {
281          sc->regs->xd[i].len_status = OETH_TX_BD_PAD | OETH_TX_BD_CRC;
282          sc->txdesc[i].buf = calloc(1, OETH_MAXBUF_LEN);
283#ifdef OPEN_ETH_DEBUG
284          printf("TXBUF: %08x\n", (int) sc->txdesc[i].buf);
285#endif
286      }
287    sc->regs->xd[sc->txbufs - 1].len_status |= OETH_TX_BD_WRAP;
288
289    /* allocate RX buffers */
290
291    sc->rxdesc = calloc(sc->rxbufs, sizeof(*sc->rxdesc));
292    for (i = 0; i < sc->rxbufs; i++)
293      {
294
295          MGETHDR (m, M_WAIT, MT_DATA);
296          MCLGET (m, M_WAIT);
297          m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
298          sc->rxdesc[i].m = m;
299          sc->regs->xd[i + sc->txbufs].addr = mtod (m, uint32_t*);
300          sc->regs->xd[i + sc->txbufs].len_status =
301              OETH_RX_BD_EMPTY | OETH_RX_BD_IRQ;
302#ifdef OPEN_ETH_DEBUG
303          printf("RXBUF: %08x\n", (int) sc->rxdesc[i].m);
304#endif
305      }
306    sc->regs->xd[sc->rxbufs + sc->txbufs - 1].len_status |= OETH_RX_BD_WRAP;
307
308
309    /* set ethernet address.  */
310
311    regs->mac_addr1 = sc->arpcom.ac_enaddr[0] << 8 | sc->arpcom.ac_enaddr[1];
312    regs->mac_addr0 = sc->arpcom.ac_enaddr[2] << 24 | sc->arpcom.ac_enaddr[3] << 16 |
313        sc->arpcom.ac_enaddr[4] << 8 | sc->arpcom.ac_enaddr[5];
314
315    /* install interrupt vector */
316    set_vector (open_eth_interrupt_handler, sc->vector, 1);
317
318    /* clear all pending interrupts */
319
320    regs->int_src = 0xffffffff;
321
322    /* MAC mode register: PAD, IFG, CRCEN */
323
324    regs->moder = OETH_MODER_PAD | OETH_MODER_CRCEN | ((mii_cr & 0x100) << 2);
325
326    /* enable interrupts */
327
328    regs->int_mask = OETH_INT_MASK_RXF | OETH_INT_MASK_RXE | OETH_INT_MASK_RXC;
329
330#ifdef OETH_SUSPEND_NOTXBUF
331    regs->int_mask |= OETH_INT_MASK_TXB | OETH_INT_MASK_TXC | OETH_INT_MASK_TXE | OETH_INT_BUSY;*/
332    sc->regs->xd[(sc->txbufs - 1)/2].len_status |= OETH_TX_BD_IRQ;
333    sc->regs->xd[sc->txbufs - 1].len_status |= OETH_TX_BD_IRQ;
334#endif
335
336    regs->moder |= OETH_MODER_RXEN | OETH_MODER_TXEN;
337}
338
339static void
340open_eth_rxDaemon (void *arg)
341{
342    struct ether_header *eh;
343    struct open_eth_softc *dp = (struct open_eth_softc *) &oc;
344    struct ifnet *ifp = &dp->arpcom.ac_if;
345    struct mbuf *m;
346    unsigned int len, len_status, bad;
347    rtems_event_set events;
348
349
350    for (;;)
351      {
352
353          rtems_bsdnet_event_receive (INTERRUPT_EVENT,
354                                      RTEMS_WAIT | RTEMS_EVENT_ANY,
355                                      RTEMS_NO_TIMEOUT, &events);
356#ifdef OPEN_ETH_DEBUG
357    printf ("r\n");
358#endif
359
360          while (!
361                 ((len_status =
362                   dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status) & OETH_RX_BD_EMPTY))
363            {
364                bad = 0;
365                if (len_status & (OETH_RX_BD_TOOLONG | OETH_RX_BD_SHORT))
366                  {
367                      dp->rxLengthError++;
368                      bad = 1;
369                  }
370                if (len_status & OETH_RX_BD_DRIBBLE)
371                  {
372                      dp->rxNonOctet++;
373                      bad = 1;
374                  }
375                if (len_status & OETH_RX_BD_CRCERR)
376                  {
377                      dp->rxBadCRC++;
378                      bad = 1;
379                  }
380                if (len_status & OETH_RX_BD_OVERRUN)
381                  {
382                      dp->rxOverrun++;
383                      bad = 1;
384                  }
385                if (len_status & OETH_RX_BD_MISS)
386                  {
387                      dp->rxMiss++;
388                      bad = 1;
389                  }
390                if (len_status & OETH_RX_BD_LATECOL)
391                  {
392                      dp->rxCollision++;
393                      bad = 1;
394                  }
395
396                if (!bad)
397                  {
398                      /* pass on the packet in the receive buffer */
399                      len = len_status >> 16;
400                      m = (struct mbuf *) (dp->rxdesc[dp->rx_ptr].m);
401                      m->m_len = m->m_pkthdr.len =
402                          len - sizeof (struct ether_header);
403                      eh = mtod (m, struct ether_header *);
404                      m->m_data += sizeof (struct ether_header);
405#ifdef CPU_U32_FIX
406                      ipalign(m);       /* Align packet on 32-bit boundary */
407#endif
408
409                      ether_input (ifp, eh, m);
410
411                      /* get a new mbuf */
412                      MGETHDR (m, M_WAIT, MT_DATA);
413                      MCLGET (m, M_WAIT);
414                      m->m_pkthdr.rcvif = ifp;
415                      dp->rxdesc[dp->rx_ptr].m = m;
416                      dp->regs->xd[dp->rx_ptr + dp->txbufs].addr =
417                          (uint32_t*) mtod (m, void *);
418                      dp->rxPackets++;
419                  }
420
421                dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status =
422                  (dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status &
423                    ~OETH_TX_BD_STATS) | OETH_TX_BD_READY;
424                dp->rx_ptr = (dp->rx_ptr + 1) % dp->rxbufs;
425            }
426      }
427}
428
429static int inside = 0;
430static void
431sendpacket (struct ifnet *ifp, struct mbuf *m)
432{
433    struct open_eth_softc *dp = ifp->if_softc;
434    unsigned char *temp;
435    struct mbuf *n;
436    unsigned int len, len_status;
437
438    if (inside) printf ("error: sendpacket re-entered!!\n");
439    inside = 1;
440    /*
441     * Waiting for Transmitter ready
442     */
443    n = m;
444
445    while (dp->regs->xd[dp->tx_ptr].len_status & OETH_TX_BD_READY)
446      {
447#ifdef OETH_SUSPEND_NOTXBUF
448          rtems_event_set events;
449          rtems_bsdnet_event_receive (OPEN_ETH_TX_WAIT_EVENT,
450                                      RTEMS_WAIT | RTEMS_EVENT_ANY,
451                                      TOD_MILLISECONDS_TO_TICKS(500), &events);
452#endif
453      }
454
455    len = 0;
456    temp = (unsigned char *) dp->txdesc[dp->tx_ptr].buf;
457    dp->regs->xd[dp->tx_ptr].addr = (uint32_t*) temp;
458
459#ifdef OPEN_ETH_DEBUG
460    printf("TXD: 0x%08x\n", (int) m->m_data);
461#endif
462    for (;;)
463        {
464#ifdef OPEN_ETH_DEBUG
465          int i;
466          printf("MBUF: 0x%08x : ", (int) m->m_data);
467          for (i=0;i<m->m_len;i++)
468            printf("%x%x", (m->m_data[i] >> 4) & 0x0ff, m->m_data[i] & 0x0ff);
469          printf("\n");
470#endif
471          len += m->m_len;
472          if (len <= RBUF_SIZE)
473            memcpy ((void *) temp, (char *) m->m_data, m->m_len);
474          temp += m->m_len;
475          if ((m = m->m_next) == NULL)
476              break;
477        }
478
479    m_freem (n);
480
481    /* don't send long packets */
482
483    if (len <= RBUF_SIZE) {
484
485     /* Clear all of the status flags.  */
486     len_status = dp->regs->xd[dp->tx_ptr].len_status & ~OETH_TX_BD_STATS;
487
488     /* If the frame is short, tell CPM to pad it.  */
489     if (len < ET_MINLEN) {
490        len_status |= OETH_TX_BD_PAD;
491        len = ET_MINLEN;
492     }
493     else
494        len_status &= ~OETH_TX_BD_PAD;
495
496      /* write buffer descriptor length and status */
497      len_status &= 0x0000ffff;
498      len_status |= (len << 16) | (OETH_TX_BD_READY | OETH_TX_BD_CRC);
499      dp->regs->xd[dp->tx_ptr].len_status = len_status;
500      dp->tx_ptr = (dp->tx_ptr + 1) % dp->txbufs;
501
502    }
503    inside = 0;
504}
505
506/*
507 * Driver transmit daemon
508 */
509void
510open_eth_txDaemon (void *arg)
511{
512    struct open_eth_softc *sc = (struct open_eth_softc *) arg;
513    struct ifnet *ifp = &sc->arpcom.ac_if;
514    struct mbuf *m;
515    rtems_event_set events;
516
517    for (;;)
518      {
519          /*
520           * Wait for packet
521           */
522
523          rtems_bsdnet_event_receive (START_TRANSMIT_EVENT,
524                                      RTEMS_EVENT_ANY | RTEMS_WAIT,
525                                      RTEMS_NO_TIMEOUT, &events);
526#ifdef OPEN_ETH_DEBUG
527    printf ("t\n");
528#endif
529
530          /*
531           * Send packets till queue is empty
532           */
533          for (;;)
534            {
535                /*
536                 * Get the next mbuf chain to transmit.
537                 */
538                IF_DEQUEUE (&ifp->if_snd, m);
539                if (!m)
540                    break;
541                sendpacket (ifp, m);
542            }
543          ifp->if_flags &= ~IFF_OACTIVE;
544      }
545}
546
547
548static void
549open_eth_start (struct ifnet *ifp)
550{
551    struct open_eth_softc *sc = ifp->if_softc;
552
553    rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
554    ifp->if_flags |= IFF_OACTIVE;
555}
556
557/*
558 * Initialize and start the device
559 */
560static void
561open_eth_init (void *arg)
562{
563    struct open_eth_softc *sc = arg;
564    struct ifnet *ifp = &sc->arpcom.ac_if;
565
566    if (sc->txDaemonTid == 0)
567      {
568
569          /*
570           * Set up OPEN_ETH hardware
571           */
572          open_eth_initialize_hardware (sc);
573
574          /*
575           * Start driver tasks
576           */
577          sc->rxDaemonTid = rtems_bsdnet_newproc ("DCrx", 4096,
578                                                  open_eth_rxDaemon, sc);
579          sc->txDaemonTid = rtems_bsdnet_newproc ("DCtx", 4096,
580                                                  open_eth_txDaemon, sc);
581      }
582
583    /*
584     * Tell the world that we're running.
585     */
586    ifp->if_flags |= IFF_RUNNING;
587
588}
589
590/*
591 * Stop the device
592 */
593static void
594open_eth_stop (struct open_eth_softc *sc)
595{
596    struct ifnet *ifp = &sc->arpcom.ac_if;
597
598    ifp->if_flags &= ~IFF_RUNNING;
599
600    sc->regs->moder = 0;                /* RX/TX OFF */
601    sc->regs->moder = OETH_MODER_RST;   /* Reset ON */
602    sc->regs->moder = 0;                /* Reset OFF */
603}
604
605
606/*
607 * Show interface statistics
608 */
609static void
610open_eth_stats (struct open_eth_softc *sc)
611{
612    printf ("         Rx Packets:%-8lu", sc->rxPackets);
613    printf ("      Rx Interrupts:%-8lu", sc->rxInterrupts);
614    printf ("          Length:%-8lu", sc->rxLengthError);
615    printf ("       Non-octet:%-8lu\n", sc->rxNonOctet);
616    printf ("            Bad CRC:%-8lu", sc->rxBadCRC);
617    printf ("         Overrun:%-8lu", sc->rxOverrun);
618    printf ("            Miss:%-8lu", sc->rxMiss);
619    printf ("       Collision:%-8lu\n", sc->rxCollision);
620
621    printf ("      Tx Interrupts:%-8lu", sc->txInterrupts);
622    printf ("        Deferred:%-8lu", sc->txDeferred);
623    printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat);
624    printf ("         No Carrier:%-8lu", sc->txLostCarrier);
625    printf ("Retransmit Limit:%-8lu", sc->txRetryLimit);
626    printf ("  Late Collision:%-8lu\n", sc->txLateCollision);
627    printf ("           Underrun:%-8lu", sc->txUnderrun);
628    printf (" Raw output wait:%-8lu\n", sc->txRawWait);
629}
630
631/*
632 * Driver ioctl handler
633 */
634static int
635open_eth_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data)
636{
637    struct open_eth_softc *sc = ifp->if_softc;
638    int error = 0;
639
640    switch (command)
641      {
642      case SIOCGIFADDR:
643      case SIOCSIFADDR:
644          ether_ioctl (ifp, command, data);
645          break;
646
647      case SIOCSIFFLAGS:
648          switch (ifp->if_flags & (IFF_UP | IFF_RUNNING))
649            {
650            case IFF_RUNNING:
651                open_eth_stop (sc);
652                break;
653
654            case IFF_UP:
655                open_eth_init (sc);
656                break;
657
658            case IFF_UP | IFF_RUNNING:
659                open_eth_stop (sc);
660                open_eth_init (sc);
661                break;
662
663            default:
664                break;
665            }
666          break;
667
668      case SIO_RTEMS_SHOW_STATS:
669          open_eth_stats (sc);
670          break;
671
672          /*
673           * FIXME: All sorts of multicast commands need to be added here!
674           */
675      default:
676          error = EINVAL;
677          break;
678      }
679
680    return error;
681}
682
683/*
684 * Attach an OPEN_ETH driver to the system
685 */
686int
687rtems_open_eth_driver_attach (struct rtems_bsdnet_ifconfig *config,
688                              open_eth_configuration_t * chip)
689{
690    struct open_eth_softc *sc;
691    struct ifnet *ifp;
692    int mtu;
693    int unitNumber;
694    char *unitName;
695
696      /* parse driver name */
697    if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
698        return 0;
699
700    sc = &oc;
701    ifp = &sc->arpcom.ac_if;
702    memset (sc, 0, sizeof (*sc));
703
704    if (config->hardware_address)
705      {
706          memcpy (sc->arpcom.ac_enaddr, config->hardware_address,
707                  ETHER_ADDR_LEN);
708      }
709    else
710      {
711          memset (sc->arpcom.ac_enaddr, 0x08, ETHER_ADDR_LEN);
712      }
713
714    if (config->mtu)
715        mtu = config->mtu;
716    else
717        mtu = ETHERMTU;
718
719    sc->acceptBroadcast = !config->ignore_broadcast;
720    sc->regs = (void *) chip->base_address;
721    sc->vector = chip->vector;
722    sc->txbufs = chip->txd_count;
723    sc->rxbufs = chip->rxd_count;
724    sc->en100MHz = chip->en100MHz;
725
726
727    /*
728     * Set up network interface values
729     */
730    ifp->if_softc = sc;
731    ifp->if_unit = unitNumber;
732    ifp->if_name = unitName;
733    ifp->if_mtu = mtu;
734    ifp->if_init = open_eth_init;
735    ifp->if_ioctl = open_eth_ioctl;
736    ifp->if_start = open_eth_start;
737    ifp->if_output = ether_output;
738    ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
739    if (ifp->if_snd.ifq_maxlen == 0)
740        ifp->if_snd.ifq_maxlen = ifqmaxlen;
741
742    /*
743     * Attach the interface
744     */
745    if_attach (ifp);
746    ether_ifattach (ifp);
747
748#ifdef OPEN_ETH_DEBUG
749    printf ("OPEN_ETH : driver has been attached\n");
750#endif
751    return 1;
752};
753
754#endif  /* OPENETH_NOT_SUPPORTED */
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