1 | /* |
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2 | * RTEMS driver for Opencores Ethernet Controller |
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3 | * |
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4 | * Weakly based on dec21140 rtems driver and open_eth linux driver |
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5 | * Written by Jiri Gaisler, Gaisler Research |
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6 | * |
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7 | * The license and distribution terms for this file may be |
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8 | * found in the file LICENSE in this distribution or at |
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9 | * http://www.rtems.org/license/LICENSE. |
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10 | * |
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11 | */ |
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12 | |
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13 | /* |
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14 | * This driver current only supports architectures with the old style |
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15 | * exception processing. The following checks try to keep this |
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16 | * from being compiled on systems which can't support this driver. |
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17 | * |
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18 | * NOTE: The i386, ARM, and PowerPC use a different interrupt API than |
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19 | * that used by this driver. |
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20 | */ |
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21 | |
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22 | #if defined(__i386__) || defined(__arm__) || defined(__PPC__) |
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23 | #define OPENETH_NOT_SUPPORTED |
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24 | #endif |
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25 | |
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26 | #if !defined(OPENETH_NOT_SUPPORTED) |
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27 | #include <bsp.h> |
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28 | #include <rtems.h> |
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29 | |
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30 | #include <bsp.h> |
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31 | |
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32 | #include <inttypes.h> |
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33 | #include <stdlib.h> |
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34 | #include <stdio.h> |
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35 | #include <stdarg.h> |
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36 | #include <errno.h> |
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37 | |
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38 | #include <rtems/error.h> |
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39 | #include <rtems/rtems_bsdnet.h> |
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40 | #include <libchip/open_eth.h> |
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41 | |
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42 | #include <sys/param.h> |
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43 | #include <sys/mbuf.h> |
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44 | |
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45 | #include <sys/socket.h> |
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46 | #include <sys/sockio.h> |
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47 | #include <net/if.h> |
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48 | #include <netinet/in.h> |
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49 | #include <netinet/if_ether.h> |
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50 | |
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51 | #ifdef malloc |
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52 | #undef malloc |
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53 | #endif |
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54 | #ifdef free |
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55 | #undef free |
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56 | #endif |
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57 | |
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58 | extern rtems_isr_entry set_vector( rtems_isr_entry, rtems_vector_number, int ); |
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59 | |
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60 | /* |
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61 | #define OPEN_ETH_DEBUG |
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62 | */ |
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63 | |
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64 | #ifdef CPU_U32_FIX |
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65 | extern void ipalign(struct mbuf *m); |
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66 | #endif |
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67 | |
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68 | /* message descriptor entry */ |
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69 | struct MDTX |
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70 | { |
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71 | char *buf; |
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72 | }; |
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73 | |
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74 | struct MDRX |
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75 | { |
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76 | struct mbuf *m; |
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77 | }; |
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78 | |
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79 | /* |
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80 | * Number of OCs supported by this driver |
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81 | */ |
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82 | #define NOCDRIVER 1 |
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83 | |
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84 | /* |
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85 | * Receive buffer size -- Allow for a full ethernet packet including CRC |
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86 | */ |
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87 | #define RBUF_SIZE 1536 |
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88 | |
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89 | #define ET_MINLEN 64 /* minimum message length */ |
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90 | |
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91 | /* |
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92 | * RTEMS event used by interrupt handler to signal driver tasks. |
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93 | * This must not be any of the events used by the network task synchronization. |
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94 | */ |
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95 | #define INTERRUPT_EVENT RTEMS_EVENT_1 |
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96 | |
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97 | /* |
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98 | * RTEMS event used to start transmit daemon. |
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99 | * This must not be the same as INTERRUPT_EVENT. |
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100 | */ |
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101 | #define START_TRANSMIT_EVENT RTEMS_EVENT_2 |
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102 | |
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103 | /* event to send when tx buffers become available */ |
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104 | #define OPEN_ETH_TX_WAIT_EVENT RTEMS_EVENT_3 |
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105 | |
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106 | /* suspend when all TX descriptors exhausted */ |
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107 | /* |
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108 | #define OETH_SUSPEND_NOTXBUF |
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109 | */ |
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110 | |
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111 | #if (MCLBYTES < RBUF_SIZE) |
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112 | # error "Driver must have MCLBYTES > RBUF_SIZE" |
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113 | #endif |
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114 | |
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115 | /* |
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116 | * Per-device data |
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117 | */ |
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118 | struct open_eth_softc |
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119 | { |
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120 | |
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121 | struct arpcom arpcom; |
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122 | |
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123 | oeth_regs *regs; |
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124 | |
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125 | int acceptBroadcast; |
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126 | rtems_id rxDaemonTid; |
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127 | rtems_id txDaemonTid; |
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128 | |
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129 | unsigned int tx_ptr; |
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130 | unsigned int rx_ptr; |
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131 | unsigned int txbufs; |
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132 | unsigned int rxbufs; |
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133 | struct MDTX *txdesc; |
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134 | struct MDRX *rxdesc; |
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135 | rtems_vector_number vector; |
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136 | unsigned int en100MHz; |
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137 | |
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138 | /* |
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139 | * Statistics |
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140 | */ |
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141 | unsigned long rxInterrupts; |
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142 | unsigned long rxPackets; |
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143 | unsigned long rxLengthError; |
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144 | unsigned long rxNonOctet; |
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145 | unsigned long rxBadCRC; |
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146 | unsigned long rxOverrun; |
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147 | unsigned long rxMiss; |
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148 | unsigned long rxCollision; |
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149 | |
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150 | unsigned long txInterrupts; |
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151 | unsigned long txDeferred; |
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152 | unsigned long txHeartbeat; |
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153 | unsigned long txLateCollision; |
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154 | unsigned long txRetryLimit; |
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155 | unsigned long txUnderrun; |
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156 | unsigned long txLostCarrier; |
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157 | unsigned long txRawWait; |
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158 | }; |
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159 | |
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160 | static struct open_eth_softc oc; |
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161 | |
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162 | /* OPEN_ETH interrupt handler */ |
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163 | |
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164 | static rtems_isr |
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165 | open_eth_interrupt_handler (rtems_vector_number v) |
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166 | { |
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167 | uint32_t status; |
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168 | |
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169 | /* read and clear interrupt cause */ |
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170 | |
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171 | status = oc.regs->int_src; |
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172 | oc.regs->int_src = status; |
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173 | |
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174 | /* Frame received? */ |
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175 | |
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176 | if (status & (OETH_INT_RXF | OETH_INT_RXE)) |
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177 | { |
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178 | oc.rxInterrupts++; |
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179 | rtems_bsdnet_event_send (oc.rxDaemonTid, INTERRUPT_EVENT); |
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180 | } |
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181 | #ifdef OETH_SUSPEND_NOTXBUF |
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182 | if (status & (OETH_INT_MASK_TXB | OETH_INT_MASK_TXC | OETH_INT_MASK_TXE)) |
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183 | { |
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184 | oc.txInterrupts++; |
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185 | rtems_bsdnet_event_send (oc.txDaemonTid, OPEN_ETH_TX_WAIT_EVENT); |
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186 | } |
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187 | #endif |
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188 | /* |
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189 | #ifdef __leon__ |
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190 | LEON_Clear_interrupt(v-0x10); |
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191 | #endif |
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192 | */ |
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193 | } |
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194 | |
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195 | static uint32_t read_mii(uint32_t addr) |
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196 | { |
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197 | while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {} |
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198 | oc.regs->miiaddress = addr << 8; |
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199 | oc.regs->miicommand = OETH_MIICOMMAND_RSTAT; |
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200 | while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {} |
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201 | if (!(oc.regs->miistatus & OETH_MIISTATUS_NVALID)) |
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202 | return(oc.regs->miirx_data); |
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203 | else { |
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204 | printf("open_eth: failed to read mii\n"); |
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205 | return (0); |
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206 | } |
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207 | } |
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208 | |
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209 | static void write_mii(uint32_t addr, uint32_t data) |
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210 | { |
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211 | while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {} |
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212 | oc.regs->miiaddress = addr << 8; |
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213 | oc.regs->miitx_data = data; |
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214 | oc.regs->miicommand = OETH_MIICOMMAND_WCTRLDATA; |
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215 | while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {} |
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216 | } |
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217 | /* |
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218 | * Initialize the ethernet hardware |
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219 | */ |
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220 | static void |
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221 | open_eth_initialize_hardware (struct open_eth_softc *sc) |
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222 | { |
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223 | struct mbuf *m; |
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224 | int i; |
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225 | int mii_cr = 0; |
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226 | |
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227 | oeth_regs *regs; |
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228 | |
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229 | regs = sc->regs; |
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230 | |
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231 | /* Reset the controller. */ |
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232 | |
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233 | regs->ctrlmoder = 0; |
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234 | regs->moder = OETH_MODER_RST; /* Reset ON */ |
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235 | regs->moder = 0; /* Reset OFF */ |
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236 | |
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237 | /* reset PHY and wait for complettion */ |
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238 | mii_cr = 0x3300; |
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239 | if (!sc->en100MHz) mii_cr = 0; |
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240 | write_mii(0, mii_cr | 0x8000); |
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241 | while (read_mii(0) & 0x8000) {} |
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242 | if (!sc->en100MHz) write_mii(0, 0); |
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243 | mii_cr = read_mii(0); |
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244 | printf("open_eth: driver attached, PHY config : 0x%04" PRIx32 "\n", read_mii(0)); |
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245 | |
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246 | #ifdef OPEN_ETH_DEBUG |
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247 | printf("mii_cr: %04x\n", mii_cr); |
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248 | for (i=0;i<21;i++) |
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249 | printf("mii_reg %2d : 0x%04x\n", i, read_mii(i)); |
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250 | #endif |
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251 | |
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252 | /* Setting TXBD base to sc->txbufs */ |
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253 | |
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254 | regs->tx_bd_num = sc->txbufs; |
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255 | |
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256 | /* Initialize rx/tx pointers. */ |
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257 | |
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258 | sc->rx_ptr = 0; |
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259 | sc->tx_ptr = 0; |
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260 | |
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261 | /* Set min/max packet length */ |
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262 | regs->packet_len = 0x00400600; |
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263 | |
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264 | /* Set IPGT register to recomended value */ |
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265 | regs->ipgt = 0x00000015; |
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266 | |
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267 | /* Set IPGR1 register to recomended value */ |
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268 | regs->ipgr1 = 0x0000000c; |
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269 | |
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270 | /* Set IPGR2 register to recomended value */ |
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271 | regs->ipgr2 = 0x00000012; |
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272 | |
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273 | /* Set COLLCONF register to recomended value */ |
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274 | regs->collconf = 0x000f003f; |
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275 | |
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276 | /* initialize TX descriptors */ |
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277 | |
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278 | sc->txdesc = calloc(sc->txbufs, sizeof(*sc->txdesc)); |
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279 | for (i = 0; i < sc->txbufs; i++) |
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280 | { |
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281 | sc->regs->xd[i].len_status = OETH_TX_BD_PAD | OETH_TX_BD_CRC; |
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282 | sc->txdesc[i].buf = calloc(1, OETH_MAXBUF_LEN); |
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283 | #ifdef OPEN_ETH_DEBUG |
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284 | printf("TXBUF: %08x\n", (int) sc->txdesc[i].buf); |
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285 | #endif |
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286 | } |
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287 | sc->regs->xd[sc->txbufs - 1].len_status |= OETH_TX_BD_WRAP; |
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288 | |
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289 | /* allocate RX buffers */ |
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290 | |
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291 | sc->rxdesc = calloc(sc->rxbufs, sizeof(*sc->rxdesc)); |
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292 | for (i = 0; i < sc->rxbufs; i++) |
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293 | { |
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294 | |
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295 | MGETHDR (m, M_WAIT, MT_DATA); |
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296 | MCLGET (m, M_WAIT); |
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297 | m->m_pkthdr.rcvif = &sc->arpcom.ac_if; |
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298 | sc->rxdesc[i].m = m; |
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299 | sc->regs->xd[i + sc->txbufs].addr = mtod (m, uint32_t*); |
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300 | sc->regs->xd[i + sc->txbufs].len_status = |
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301 | OETH_RX_BD_EMPTY | OETH_RX_BD_IRQ; |
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302 | #ifdef OPEN_ETH_DEBUG |
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303 | printf("RXBUF: %08x\n", (int) sc->rxdesc[i].m); |
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304 | #endif |
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305 | } |
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306 | sc->regs->xd[sc->rxbufs + sc->txbufs - 1].len_status |= OETH_RX_BD_WRAP; |
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307 | |
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308 | |
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309 | /* set ethernet address. */ |
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310 | |
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311 | regs->mac_addr1 = sc->arpcom.ac_enaddr[0] << 8 | sc->arpcom.ac_enaddr[1]; |
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312 | |
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313 | uint32_t mac_addr0; |
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314 | mac_addr0 = sc->arpcom.ac_enaddr[2]; |
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315 | mac_addr0 <<= 8; |
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316 | mac_addr0 |= sc->arpcom.ac_enaddr[3]; |
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317 | mac_addr0 <<= 8; |
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318 | mac_addr0 |= sc->arpcom.ac_enaddr[4]; |
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319 | mac_addr0 <<= 8; |
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320 | mac_addr0 |= sc->arpcom.ac_enaddr[5]; |
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321 | |
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322 | regs->mac_addr0 = mac_addr0; |
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323 | |
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324 | /* install interrupt vector */ |
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325 | set_vector (open_eth_interrupt_handler, sc->vector, 1); |
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326 | |
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327 | /* clear all pending interrupts */ |
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328 | |
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329 | regs->int_src = 0xffffffff; |
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330 | |
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331 | /* MAC mode register: PAD, IFG, CRCEN */ |
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332 | |
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333 | regs->moder = OETH_MODER_PAD | OETH_MODER_CRCEN | ((mii_cr & 0x100) << 2); |
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334 | |
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335 | /* enable interrupts */ |
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336 | |
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337 | regs->int_mask = OETH_INT_MASK_RXF | OETH_INT_MASK_RXE | OETH_INT_MASK_RXC; |
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338 | |
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339 | #ifdef OETH_SUSPEND_NOTXBUF |
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340 | regs->int_mask |= OETH_INT_MASK_TXB | OETH_INT_MASK_TXC | OETH_INT_MASK_TXE | OETH_INT_BUSY;*/ |
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341 | sc->regs->xd[(sc->txbufs - 1)/2].len_status |= OETH_TX_BD_IRQ; |
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342 | sc->regs->xd[sc->txbufs - 1].len_status |= OETH_TX_BD_IRQ; |
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343 | #endif |
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344 | |
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345 | regs->moder |= OETH_MODER_RXEN | OETH_MODER_TXEN; |
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346 | } |
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347 | |
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348 | static void |
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349 | open_eth_rxDaemon (void *arg) |
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350 | { |
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351 | struct ether_header *eh; |
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352 | struct open_eth_softc *dp = (struct open_eth_softc *) &oc; |
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353 | struct ifnet *ifp = &dp->arpcom.ac_if; |
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354 | struct mbuf *m; |
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355 | unsigned int len; |
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356 | uint32_t len_status; |
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357 | unsigned int bad; |
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358 | rtems_event_set events; |
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359 | |
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360 | |
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361 | for (;;) |
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362 | { |
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363 | |
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364 | rtems_bsdnet_event_receive (INTERRUPT_EVENT, |
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365 | RTEMS_WAIT | RTEMS_EVENT_ANY, |
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366 | RTEMS_NO_TIMEOUT, &events); |
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367 | #ifdef OPEN_ETH_DEBUG |
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368 | printf ("r\n"); |
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369 | #endif |
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370 | |
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371 | while (! |
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372 | ((len_status = |
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373 | dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status) & OETH_RX_BD_EMPTY)) |
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374 | { |
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375 | bad = 0; |
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376 | if (len_status & (OETH_RX_BD_TOOLONG | OETH_RX_BD_SHORT)) |
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377 | { |
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378 | dp->rxLengthError++; |
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379 | bad = 1; |
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380 | } |
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381 | if (len_status & OETH_RX_BD_DRIBBLE) |
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382 | { |
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383 | dp->rxNonOctet++; |
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384 | bad = 1; |
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385 | } |
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386 | if (len_status & OETH_RX_BD_CRCERR) |
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387 | { |
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388 | dp->rxBadCRC++; |
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389 | bad = 1; |
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390 | } |
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391 | if (len_status & OETH_RX_BD_OVERRUN) |
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392 | { |
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393 | dp->rxOverrun++; |
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394 | bad = 1; |
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395 | } |
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396 | if (len_status & OETH_RX_BD_MISS) |
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397 | { |
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398 | dp->rxMiss++; |
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399 | bad = 1; |
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400 | } |
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401 | if (len_status & OETH_RX_BD_LATECOL) |
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402 | { |
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403 | dp->rxCollision++; |
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404 | bad = 1; |
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405 | } |
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406 | |
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407 | if (!bad) |
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408 | { |
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409 | /* pass on the packet in the receive buffer */ |
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410 | len = len_status >> 16; |
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411 | m = (struct mbuf *) (dp->rxdesc[dp->rx_ptr].m); |
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412 | m->m_len = m->m_pkthdr.len = |
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413 | len - sizeof (struct ether_header); |
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414 | eh = mtod (m, struct ether_header *); |
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415 | m->m_data += sizeof (struct ether_header); |
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416 | #ifdef CPU_U32_FIX |
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417 | ipalign(m); /* Align packet on 32-bit boundary */ |
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418 | #endif |
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419 | |
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420 | ether_input (ifp, eh, m); |
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421 | |
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422 | /* get a new mbuf */ |
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423 | MGETHDR (m, M_WAIT, MT_DATA); |
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424 | MCLGET (m, M_WAIT); |
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425 | m->m_pkthdr.rcvif = ifp; |
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426 | dp->rxdesc[dp->rx_ptr].m = m; |
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427 | dp->regs->xd[dp->rx_ptr + dp->txbufs].addr = |
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428 | (uint32_t*) mtod (m, void *); |
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429 | dp->rxPackets++; |
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430 | } |
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431 | |
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432 | dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status = |
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433 | (dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status & |
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434 | ~OETH_TX_BD_STATS) | OETH_TX_BD_READY; |
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435 | dp->rx_ptr = (dp->rx_ptr + 1) % dp->rxbufs; |
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436 | } |
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437 | } |
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438 | } |
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439 | |
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440 | static int inside = 0; |
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441 | static void |
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442 | sendpacket (struct ifnet *ifp, struct mbuf *m) |
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443 | { |
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444 | struct open_eth_softc *dp = ifp->if_softc; |
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445 | unsigned char *temp; |
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446 | struct mbuf *n; |
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447 | uint32_t len, len_status; |
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448 | |
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449 | if (inside) printf ("error: sendpacket re-entered!!\n"); |
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450 | inside = 1; |
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451 | /* |
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452 | * Waiting for Transmitter ready |
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453 | */ |
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454 | n = m; |
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455 | |
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456 | while (dp->regs->xd[dp->tx_ptr].len_status & OETH_TX_BD_READY) |
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457 | { |
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458 | #ifdef OETH_SUSPEND_NOTXBUF |
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459 | rtems_event_set events; |
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460 | rtems_bsdnet_event_receive (OPEN_ETH_TX_WAIT_EVENT, |
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461 | RTEMS_WAIT | RTEMS_EVENT_ANY, |
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462 | RTEMS_MILLISECONDS_TO_TICKS(500), &events); |
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463 | #endif |
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464 | } |
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465 | |
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466 | len = 0; |
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467 | temp = (unsigned char *) dp->txdesc[dp->tx_ptr].buf; |
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468 | dp->regs->xd[dp->tx_ptr].addr = (uint32_t*) temp; |
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469 | |
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470 | #ifdef OPEN_ETH_DEBUG |
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471 | printf("TXD: 0x%08x\n", (int) m->m_data); |
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472 | #endif |
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473 | for (;;) |
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474 | { |
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475 | #ifdef OPEN_ETH_DEBUG |
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476 | int i; |
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477 | printf("MBUF: 0x%08x : ", (int) m->m_data); |
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478 | for (i=0;i<m->m_len;i++) |
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479 | printf("%x%x", (m->m_data[i] >> 4) & 0x0ff, m->m_data[i] & 0x0ff); |
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480 | printf("\n"); |
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481 | #endif |
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482 | len += m->m_len; |
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483 | if (len <= RBUF_SIZE) |
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484 | memcpy ((void *) temp, (char *) m->m_data, m->m_len); |
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485 | temp += m->m_len; |
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486 | if ((m = m->m_next) == NULL) |
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487 | break; |
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488 | } |
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489 | |
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490 | m_freem (n); |
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491 | |
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492 | /* don't send long packets */ |
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493 | |
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494 | if (len <= RBUF_SIZE) { |
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495 | |
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496 | /* Clear all of the status flags. */ |
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497 | len_status = dp->regs->xd[dp->tx_ptr].len_status & ~OETH_TX_BD_STATS; |
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498 | |
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499 | /* If the frame is short, tell CPM to pad it. */ |
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500 | if (len < ET_MINLEN) { |
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501 | len_status |= OETH_TX_BD_PAD; |
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502 | len = ET_MINLEN; |
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503 | } |
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504 | else |
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505 | len_status &= ~OETH_TX_BD_PAD; |
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506 | |
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507 | /* write buffer descriptor length and status */ |
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508 | len_status &= 0x0000ffff; |
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509 | len_status |= (len << 16) | (OETH_TX_BD_READY | OETH_TX_BD_CRC); |
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510 | dp->regs->xd[dp->tx_ptr].len_status = len_status; |
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511 | dp->tx_ptr = (dp->tx_ptr + 1) % dp->txbufs; |
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512 | |
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513 | } |
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514 | inside = 0; |
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515 | } |
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516 | |
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517 | /* |
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518 | * Driver transmit daemon |
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519 | */ |
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520 | static void |
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521 | open_eth_txDaemon (void *arg) |
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522 | { |
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523 | struct open_eth_softc *sc = (struct open_eth_softc *) arg; |
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524 | struct ifnet *ifp = &sc->arpcom.ac_if; |
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525 | struct mbuf *m; |
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526 | rtems_event_set events; |
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527 | |
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528 | for (;;) |
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529 | { |
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530 | /* |
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531 | * Wait for packet |
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532 | */ |
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533 | |
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534 | rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, |
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535 | RTEMS_EVENT_ANY | RTEMS_WAIT, |
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536 | RTEMS_NO_TIMEOUT, &events); |
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537 | #ifdef OPEN_ETH_DEBUG |
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538 | printf ("t\n"); |
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539 | #endif |
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540 | |
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541 | /* |
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542 | * Send packets till queue is empty |
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543 | */ |
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544 | for (;;) |
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545 | { |
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546 | /* |
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547 | * Get the next mbuf chain to transmit. |
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548 | */ |
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549 | IF_DEQUEUE (&ifp->if_snd, m); |
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550 | if (!m) |
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551 | break; |
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552 | sendpacket (ifp, m); |
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553 | } |
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554 | ifp->if_flags &= ~IFF_OACTIVE; |
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555 | } |
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556 | } |
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557 | |
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558 | |
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559 | static void |
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560 | open_eth_start (struct ifnet *ifp) |
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561 | { |
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562 | struct open_eth_softc *sc = ifp->if_softc; |
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563 | |
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564 | rtems_bsdnet_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT); |
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565 | ifp->if_flags |= IFF_OACTIVE; |
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566 | } |
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567 | |
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568 | /* |
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569 | * Initialize and start the device |
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570 | */ |
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571 | static void |
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572 | open_eth_init (void *arg) |
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573 | { |
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574 | struct open_eth_softc *sc = arg; |
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575 | struct ifnet *ifp = &sc->arpcom.ac_if; |
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576 | |
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577 | if (sc->txDaemonTid == 0) |
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578 | { |
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579 | |
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580 | /* |
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581 | * Set up OPEN_ETH hardware |
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582 | */ |
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583 | open_eth_initialize_hardware (sc); |
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584 | |
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585 | /* |
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586 | * Start driver tasks |
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587 | */ |
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588 | sc->rxDaemonTid = rtems_bsdnet_newproc ("DCrx", 4096, |
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589 | open_eth_rxDaemon, sc); |
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590 | sc->txDaemonTid = rtems_bsdnet_newproc ("DCtx", 4096, |
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591 | open_eth_txDaemon, sc); |
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592 | } |
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593 | |
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594 | /* |
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595 | * Tell the world that we're running. |
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596 | */ |
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597 | ifp->if_flags |= IFF_RUNNING; |
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598 | |
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599 | } |
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600 | |
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601 | /* |
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602 | * Stop the device |
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603 | */ |
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604 | static void |
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605 | open_eth_stop (struct open_eth_softc *sc) |
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606 | { |
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607 | struct ifnet *ifp = &sc->arpcom.ac_if; |
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608 | |
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609 | ifp->if_flags &= ~IFF_RUNNING; |
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610 | |
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611 | sc->regs->moder = 0; /* RX/TX OFF */ |
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612 | sc->regs->moder = OETH_MODER_RST; /* Reset ON */ |
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613 | sc->regs->moder = 0; /* Reset OFF */ |
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614 | } |
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615 | |
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616 | |
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617 | /* |
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618 | * Show interface statistics |
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619 | */ |
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620 | static void |
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621 | open_eth_stats (struct open_eth_softc *sc) |
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622 | { |
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623 | printf (" Rx Packets:%-8lu", sc->rxPackets); |
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624 | printf (" Rx Interrupts:%-8lu", sc->rxInterrupts); |
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625 | printf (" Length:%-8lu", sc->rxLengthError); |
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626 | printf (" Non-octet:%-8lu\n", sc->rxNonOctet); |
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627 | printf (" Bad CRC:%-8lu", sc->rxBadCRC); |
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628 | printf (" Overrun:%-8lu", sc->rxOverrun); |
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629 | printf (" Miss:%-8lu", sc->rxMiss); |
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630 | printf (" Collision:%-8lu\n", sc->rxCollision); |
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631 | |
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632 | printf (" Tx Interrupts:%-8lu", sc->txInterrupts); |
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633 | printf (" Deferred:%-8lu", sc->txDeferred); |
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634 | printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat); |
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635 | printf (" No Carrier:%-8lu", sc->txLostCarrier); |
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636 | printf ("Retransmit Limit:%-8lu", sc->txRetryLimit); |
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637 | printf (" Late Collision:%-8lu\n", sc->txLateCollision); |
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638 | printf (" Underrun:%-8lu", sc->txUnderrun); |
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639 | printf (" Raw output wait:%-8lu\n", sc->txRawWait); |
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640 | } |
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641 | |
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642 | /* |
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643 | * Driver ioctl handler |
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644 | */ |
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645 | static int |
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646 | open_eth_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data) |
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647 | { |
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648 | struct open_eth_softc *sc = ifp->if_softc; |
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649 | int error = 0; |
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650 | |
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651 | switch (command) |
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652 | { |
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653 | case SIOCGIFADDR: |
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654 | case SIOCSIFADDR: |
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655 | ether_ioctl (ifp, command, data); |
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656 | break; |
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657 | |
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658 | case SIOCSIFFLAGS: |
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659 | switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) |
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660 | { |
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661 | case IFF_RUNNING: |
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662 | open_eth_stop (sc); |
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663 | break; |
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664 | |
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665 | case IFF_UP: |
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666 | open_eth_init (sc); |
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667 | break; |
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668 | |
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669 | case IFF_UP | IFF_RUNNING: |
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670 | open_eth_stop (sc); |
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671 | open_eth_init (sc); |
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672 | break; |
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673 | |
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674 | default: |
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675 | break; |
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676 | } |
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677 | break; |
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678 | |
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679 | case SIO_RTEMS_SHOW_STATS: |
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680 | open_eth_stats (sc); |
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681 | break; |
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682 | |
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683 | /* |
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684 | * FIXME: All sorts of multicast commands need to be added here! |
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685 | */ |
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686 | default: |
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687 | error = EINVAL; |
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688 | break; |
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689 | } |
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690 | |
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691 | return error; |
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692 | } |
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693 | |
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694 | /* |
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695 | * Attach an OPEN_ETH driver to the system |
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696 | */ |
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697 | int |
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698 | rtems_open_eth_driver_attach (struct rtems_bsdnet_ifconfig *config, |
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699 | open_eth_configuration_t * chip) |
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700 | { |
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701 | struct open_eth_softc *sc; |
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702 | struct ifnet *ifp; |
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703 | int mtu; |
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704 | int unitNumber; |
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705 | char *unitName; |
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706 | |
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707 | /* parse driver name */ |
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708 | if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0) |
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709 | return 0; |
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710 | |
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711 | sc = &oc; |
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712 | ifp = &sc->arpcom.ac_if; |
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713 | memset (sc, 0, sizeof (*sc)); |
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714 | |
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715 | if (config->hardware_address) |
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716 | { |
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717 | memcpy (sc->arpcom.ac_enaddr, config->hardware_address, |
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718 | ETHER_ADDR_LEN); |
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719 | } |
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720 | else |
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721 | { |
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722 | memset (sc->arpcom.ac_enaddr, 0x08, ETHER_ADDR_LEN); |
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723 | } |
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724 | |
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725 | if (config->mtu) |
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726 | mtu = config->mtu; |
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727 | else |
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728 | mtu = ETHERMTU; |
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729 | |
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730 | sc->acceptBroadcast = !config->ignore_broadcast; |
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731 | sc->regs = chip->base_address; |
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732 | sc->vector = chip->vector; |
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733 | sc->txbufs = chip->txd_count; |
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734 | sc->rxbufs = chip->rxd_count; |
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735 | sc->en100MHz = chip->en100MHz; |
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736 | |
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737 | |
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738 | /* |
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739 | * Set up network interface values |
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740 | */ |
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741 | ifp->if_softc = sc; |
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742 | ifp->if_unit = unitNumber; |
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743 | ifp->if_name = unitName; |
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744 | ifp->if_mtu = mtu; |
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745 | ifp->if_init = open_eth_init; |
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746 | ifp->if_ioctl = open_eth_ioctl; |
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747 | ifp->if_start = open_eth_start; |
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748 | ifp->if_output = ether_output; |
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749 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; |
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750 | if (ifp->if_snd.ifq_maxlen == 0) |
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751 | ifp->if_snd.ifq_maxlen = ifqmaxlen; |
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752 | |
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753 | /* |
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754 | * Attach the interface |
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755 | */ |
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756 | if_attach (ifp); |
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757 | ether_ifattach (ifp); |
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758 | |
---|
759 | #ifdef OPEN_ETH_DEBUG |
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760 | printf ("OPEN_ETH : driver has been attached\n"); |
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761 | #endif |
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762 | return 1; |
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763 | }; |
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764 | |
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765 | #endif /* OPENETH_NOT_SUPPORTED */ |
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