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source: rtems/c/src/libchip/network/open_eth.c @ 602e395

4.115

Last change on this file since 602e395 was c499856, checked in by Chris Johns <chrisj@…>, on 03/20/14 at 21:10:47
Change all references of rtems.com to rtems.org.
Property mode set to `100644`
File size: 17.3 KB

Line
1	/*
2	* RTEMS driver for Opencores Ethernet Controller
3	*
4	* Weakly based on dec21140 rtems driver and open_eth linux driver
5	* Written by Jiri Gaisler, Gaisler Research
6	*
7	* The license and distribution terms for this file may be
8	* found in the file LICENSE in this distribution or at
9	* http://www.rtems.org/license/LICENSE.
10	*
11	*/
12
13	/*
14	* This driver current only supports architectures with the old style
15	* exception processing. The following checks try to keep this
16	* from being compiled on systems which can't support this driver.
17	*
18	* NOTE: The i386, ARM, and PowerPC use a different interrupt API than
19	* that used by this driver.
20	*/
21
22	#if defined(__i386__) \|\| defined(__arm__) \|\| defined(__PPC__)
23	#define OPENETH_NOT_SUPPORTED
24	#endif
25
26	#if !defined(OPENETH_NOT_SUPPORTED)
27	#include <bsp.h>
28	#include <rtems.h>
29
30	#include <bsp.h>
31
32	#include <inttypes.h>
33	#include <stdlib.h>
34	#include <stdio.h>
35	#include <stdarg.h>
36	#include <errno.h>
37
38	#include <rtems/error.h>
39	#include <rtems/rtems_bsdnet.h>
40	#include <libchip/open_eth.h>
41
42	#include <sys/param.h>
43	#include <sys/mbuf.h>
44
45	#include <sys/socket.h>
46	#include <sys/sockio.h>
47	#include <net/if.h>
48	#include <netinet/in.h>
49	#include <netinet/if_ether.h>
50
51	#ifdef malloc
52	#undef malloc
53	#endif
54	#ifdef free
55	#undef free
56	#endif
57
58	extern rtems_isr_entry set_vector( rtems_isr_entry, rtems_vector_number, int );
59
60	/*
61	#define OPEN_ETH_DEBUG
62	*/
63
64	#ifdef CPU_U32_FIX
65	extern void ipalign(struct mbuf *m);
66	#endif
67
68	/* message descriptor entry */
69	struct MDTX
70	{
71	char *buf;
72	};
73
74	struct MDRX
75	{
76	struct mbuf *m;
77	};
78
79	/*
80	* Number of OCs supported by this driver
81	*/
82	#define NOCDRIVER 1
83
84	/*
85	* Receive buffer size -- Allow for a full ethernet packet including CRC
86	*/
87	#define RBUF_SIZE 1536
88
89	#define ET_MINLEN 64 /* minimum message length */
90
91	/*
92	* RTEMS event used by interrupt handler to signal driver tasks.
93	* This must not be any of the events used by the network task synchronization.
94	*/
95	#define INTERRUPT_EVENT RTEMS_EVENT_1
96
97	/*
98	* RTEMS event used to start transmit daemon.
99	* This must not be the same as INTERRUPT_EVENT.
100	*/
101	#define START_TRANSMIT_EVENT RTEMS_EVENT_2
102
103	/* event to send when tx buffers become available */
104	#define OPEN_ETH_TX_WAIT_EVENT RTEMS_EVENT_3
105
106	/* suspend when all TX descriptors exhausted */
107	/*
108	#define OETH_SUSPEND_NOTXBUF
109	*/
110
111	#if (MCLBYTES < RBUF_SIZE)
112	# error "Driver must have MCLBYTES > RBUF_SIZE"
113	#endif
114
115	/*
116	* Per-device data
117	*/
118	struct open_eth_softc
119	{
120
121	struct arpcom arpcom;
122
123	oeth_regs *regs;
124
125	int acceptBroadcast;
126	rtems_id rxDaemonTid;
127	rtems_id txDaemonTid;
128
129	unsigned int tx_ptr;
130	unsigned int rx_ptr;
131	unsigned int txbufs;
132	unsigned int rxbufs;
133	struct MDTX *txdesc;
134	struct MDRX *rxdesc;
135	rtems_vector_number vector;
136	unsigned int en100MHz;
137
138	/*
139	* Statistics
140	*/
141	unsigned long rxInterrupts;
142	unsigned long rxPackets;
143	unsigned long rxLengthError;
144	unsigned long rxNonOctet;
145	unsigned long rxBadCRC;
146	unsigned long rxOverrun;
147	unsigned long rxMiss;
148	unsigned long rxCollision;
149
150	unsigned long txInterrupts;
151	unsigned long txDeferred;
152	unsigned long txHeartbeat;
153	unsigned long txLateCollision;
154	unsigned long txRetryLimit;
155	unsigned long txUnderrun;
156	unsigned long txLostCarrier;
157	unsigned long txRawWait;
158	};
159
160	static struct open_eth_softc oc;
161
162	/* OPEN_ETH interrupt handler */
163
164	static rtems_isr
165	open_eth_interrupt_handler (rtems_vector_number v)
166	{
167	uint32_t status;
168
169	/* read and clear interrupt cause */
170
171	status = oc.regs->int_src;
172	oc.regs->int_src = status;
173
174	/* Frame received? */
175
176	if (status & (OETH_INT_RXF \| OETH_INT_RXE))
177	{
178	oc.rxInterrupts++;
179	rtems_bsdnet_event_send (oc.rxDaemonTid, INTERRUPT_EVENT);
180	}
181	#ifdef OETH_SUSPEND_NOTXBUF
182	if (status & (OETH_INT_MASK_TXB \| OETH_INT_MASK_TXC \| OETH_INT_MASK_TXE))
183	{
184	oc.txInterrupts++;
185	rtems_bsdnet_event_send (oc.txDaemonTid, OPEN_ETH_TX_WAIT_EVENT);
186	}
187	#endif
188	/*
189	#ifdef __leon__
190	LEON_Clear_interrupt(v-0x10);
191	#endif
192	*/
193	}
194
195	static uint32_t read_mii(uint32_t addr)
196	{
197	while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
198	oc.regs->miiaddress = addr << 8;
199	oc.regs->miicommand = OETH_MIICOMMAND_RSTAT;
200	while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
201	if (!(oc.regs->miistatus & OETH_MIISTATUS_NVALID))
202	return(oc.regs->miirx_data);
203	else {
204	printf("open_eth: failed to read mii\n");
205	return (0);
206	}
207	}
208
209	static void write_mii(uint32_t addr, uint32_t data)
210	{
211	while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
212	oc.regs->miiaddress = addr << 8;
213	oc.regs->miitx_data = data;
214	oc.regs->miicommand = OETH_MIICOMMAND_WCTRLDATA;
215	while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
216	}
217	/*
218	* Initialize the ethernet hardware
219	*/
220	static void
221	open_eth_initialize_hardware (struct open_eth_softc *sc)
222	{
223	struct mbuf *m;
224	int i;
225	int mii_cr = 0;
226
227	oeth_regs *regs;
228
229	regs = sc->regs;
230
231	/* Reset the controller. */
232
233	regs->ctrlmoder = 0;
234	regs->moder = OETH_MODER_RST; /* Reset ON */
235	regs->moder = 0; /* Reset OFF */
236
237	/* reset PHY and wait for complettion */
238	mii_cr = 0x3300;
239	if (!sc->en100MHz) mii_cr = 0;
240	write_mii(0, mii_cr \| 0x8000);
241	while (read_mii(0) & 0x8000) {}
242	if (!sc->en100MHz) write_mii(0, 0);
243	mii_cr = read_mii(0);
244	printf("open_eth: driver attached, PHY config : 0x%04" PRIx32 "\n", read_mii(0));
245
246	#ifdef OPEN_ETH_DEBUG
247	printf("mii_cr: %04x\n", mii_cr);
248	for (i=0;i<21;i++)
249	printf("mii_reg %2d : 0x%04x\n", i, read_mii(i));
250	#endif
251
252	/* Setting TXBD base to sc->txbufs */
253
254	regs->tx_bd_num = sc->txbufs;
255
256	/* Initialize rx/tx pointers. */
257
258	sc->rx_ptr = 0;
259	sc->tx_ptr = 0;
260
261	/* Set min/max packet length */
262	regs->packet_len = 0x00400600;
263
264	/* Set IPGT register to recomended value */
265	regs->ipgt = 0x00000015;
266
267	/* Set IPGR1 register to recomended value */
268	regs->ipgr1 = 0x0000000c;
269
270	/* Set IPGR2 register to recomended value */
271	regs->ipgr2 = 0x00000012;
272
273	/* Set COLLCONF register to recomended value */
274	regs->collconf = 0x000f003f;
275
276	/* initialize TX descriptors */
277
278	sc->txdesc = calloc(sc->txbufs, sizeof(*sc->txdesc));
279	for (i = 0; i < sc->txbufs; i++)
280	{
281	sc->regs->xd[i].len_status = OETH_TX_BD_PAD \| OETH_TX_BD_CRC;
282	sc->txdesc[i].buf = calloc(1, OETH_MAXBUF_LEN);
283	#ifdef OPEN_ETH_DEBUG
284	printf("TXBUF: %08x\n", (int) sc->txdesc[i].buf);
285	#endif
286	}
287	sc->regs->xd[sc->txbufs - 1].len_status \|= OETH_TX_BD_WRAP;
288
289	/* allocate RX buffers */
290
291	sc->rxdesc = calloc(sc->rxbufs, sizeof(*sc->rxdesc));
292	for (i = 0; i < sc->rxbufs; i++)
293	{
294
295	MGETHDR (m, M_WAIT, MT_DATA);
296	MCLGET (m, M_WAIT);
297	m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
298	sc->rxdesc[i].m = m;
299	sc->regs->xd[i + sc->txbufs].addr = mtod (m, uint32_t*);
300	sc->regs->xd[i + sc->txbufs].len_status =
301	OETH_RX_BD_EMPTY \| OETH_RX_BD_IRQ;
302	#ifdef OPEN_ETH_DEBUG
303	printf("RXBUF: %08x\n", (int) sc->rxdesc[i].m);
304	#endif
305	}
306	sc->regs->xd[sc->rxbufs + sc->txbufs - 1].len_status \|= OETH_RX_BD_WRAP;
307
308
309	/* set ethernet address. */
310
311	regs->mac_addr1 = sc->arpcom.ac_enaddr[0] << 8 \| sc->arpcom.ac_enaddr[1];
312
313	uint32_t mac_addr0;
314	mac_addr0 = sc->arpcom.ac_enaddr[2];
315	mac_addr0 <<= 8;
316	mac_addr0 \|= sc->arpcom.ac_enaddr[3];
317	mac_addr0 <<= 8;
318	mac_addr0 \|= sc->arpcom.ac_enaddr[4];
319	mac_addr0 <<= 8;
320	mac_addr0 \|= sc->arpcom.ac_enaddr[5];
321
322	regs->mac_addr0 = mac_addr0;
323
324	/* install interrupt vector */
325	set_vector (open_eth_interrupt_handler, sc->vector, 1);
326
327	/* clear all pending interrupts */
328
329	regs->int_src = 0xffffffff;
330
331	/* MAC mode register: PAD, IFG, CRCEN */
332
333	regs->moder = OETH_MODER_PAD \| OETH_MODER_CRCEN \| ((mii_cr & 0x100) << 2);
334
335	/* enable interrupts */
336
337	regs->int_mask = OETH_INT_MASK_RXF \| OETH_INT_MASK_RXE \| OETH_INT_MASK_RXC;
338
339	#ifdef OETH_SUSPEND_NOTXBUF
340	regs->int_mask \|= OETH_INT_MASK_TXB \| OETH_INT_MASK_TXC \| OETH_INT_MASK_TXE \| OETH_INT_BUSY;*/
341	sc->regs->xd[(sc->txbufs - 1)/2].len_status \|= OETH_TX_BD_IRQ;
342	sc->regs->xd[sc->txbufs - 1].len_status \|= OETH_TX_BD_IRQ;
343	#endif
344
345	regs->moder \|= OETH_MODER_RXEN \| OETH_MODER_TXEN;
346	}
347
348	static void
349	open_eth_rxDaemon (void *arg)
350	{
351	struct ether_header *eh;
352	struct open_eth_softc dp = (struct open_eth_softc ) &oc;
353	struct ifnet *ifp = &dp->arpcom.ac_if;
354	struct mbuf *m;
355	unsigned int len;
356	uint32_t len_status;
357	unsigned int bad;
358	rtems_event_set events;
359
360
361	for (;;)
362	{
363
364	rtems_bsdnet_event_receive (INTERRUPT_EVENT,
365	RTEMS_WAIT \| RTEMS_EVENT_ANY,
366	RTEMS_NO_TIMEOUT, &events);
367	#ifdef OPEN_ETH_DEBUG
368	printf ("r\n");
369	#endif
370
371	while (!
372	((len_status =
373	dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status) & OETH_RX_BD_EMPTY))
374	{
375	bad = 0;
376	if (len_status & (OETH_RX_BD_TOOLONG \| OETH_RX_BD_SHORT))
377	{
378	dp->rxLengthError++;
379	bad = 1;
380	}
381	if (len_status & OETH_RX_BD_DRIBBLE)
382	{
383	dp->rxNonOctet++;
384	bad = 1;
385	}
386	if (len_status & OETH_RX_BD_CRCERR)
387	{
388	dp->rxBadCRC++;
389	bad = 1;
390	}
391	if (len_status & OETH_RX_BD_OVERRUN)
392	{
393	dp->rxOverrun++;
394	bad = 1;
395	}
396	if (len_status & OETH_RX_BD_MISS)
397	{
398	dp->rxMiss++;
399	bad = 1;
400	}
401	if (len_status & OETH_RX_BD_LATECOL)
402	{
403	dp->rxCollision++;
404	bad = 1;
405	}
406
407	if (!bad)
408	{
409	/* pass on the packet in the receive buffer */
410	len = len_status >> 16;
411	m = (struct mbuf *) (dp->rxdesc[dp->rx_ptr].m);
412	m->m_len = m->m_pkthdr.len =
413	len - sizeof (struct ether_header);
414	eh = mtod (m, struct ether_header *);
415	m->m_data += sizeof (struct ether_header);
416	#ifdef CPU_U32_FIX
417	ipalign(m); /* Align packet on 32-bit boundary */
418	#endif
419
420	ether_input (ifp, eh, m);
421
422	/* get a new mbuf */
423	MGETHDR (m, M_WAIT, MT_DATA);
424	MCLGET (m, M_WAIT);
425	m->m_pkthdr.rcvif = ifp;
426	dp->rxdesc[dp->rx_ptr].m = m;
427	dp->regs->xd[dp->rx_ptr + dp->txbufs].addr =
428	(uint32_t) mtod (m, void );
429	dp->rxPackets++;
430	}
431
432	dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status =
433	(dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status &
434	~OETH_TX_BD_STATS) \| OETH_TX_BD_READY;
435	dp->rx_ptr = (dp->rx_ptr + 1) % dp->rxbufs;
436	}
437	}
438	}
439
440	static int inside = 0;
441	static void
442	sendpacket (struct ifnet ifp, struct mbuf m)
443	{
444	struct open_eth_softc *dp = ifp->if_softc;
445	unsigned char *temp;
446	struct mbuf *n;
447	uint32_t len, len_status;
448
449	if (inside) printf ("error: sendpacket re-entered!!\n");
450	inside = 1;
451	/*
452	* Waiting for Transmitter ready
453	*/
454	n = m;
455
456	while (dp->regs->xd[dp->tx_ptr].len_status & OETH_TX_BD_READY)
457	{
458	#ifdef OETH_SUSPEND_NOTXBUF
459	rtems_event_set events;
460	rtems_bsdnet_event_receive (OPEN_ETH_TX_WAIT_EVENT,
461	RTEMS_WAIT \| RTEMS_EVENT_ANY,
462	RTEMS_MILLISECONDS_TO_TICKS(500), &events);
463	#endif
464	}
465
466	len = 0;
467	temp = (unsigned char *) dp->txdesc[dp->tx_ptr].buf;
468	dp->regs->xd[dp->tx_ptr].addr = (uint32_t*) temp;
469
470	#ifdef OPEN_ETH_DEBUG
471	printf("TXD: 0x%08x\n", (int) m->m_data);
472	#endif
473	for (;;)
474	{
475	#ifdef OPEN_ETH_DEBUG
476	int i;
477	printf("MBUF: 0x%08x : ", (int) m->m_data);
478	for (i=0;i<m->m_len;i++)
479	printf("%x%x", (m->m_data[i] >> 4) & 0x0ff, m->m_data[i] & 0x0ff);
480	printf("\n");
481	#endif
482	len += m->m_len;
483	if (len <= RBUF_SIZE)
484	memcpy ((void ) temp, (char ) m->m_data, m->m_len);
485	temp += m->m_len;
486	if ((m = m->m_next) == NULL)
487	break;
488	}
489
490	m_freem (n);
491
492	/* don't send long packets */
493
494	if (len <= RBUF_SIZE) {
495
496	/* Clear all of the status flags. */
497	len_status = dp->regs->xd[dp->tx_ptr].len_status & ~OETH_TX_BD_STATS;
498
499	/* If the frame is short, tell CPM to pad it. */
500	if (len < ET_MINLEN) {
501	len_status \|= OETH_TX_BD_PAD;
502	len = ET_MINLEN;
503	}
504	else
505	len_status &= ~OETH_TX_BD_PAD;
506
507	/* write buffer descriptor length and status */
508	len_status &= 0x0000ffff;
509	len_status \|= (len << 16) \| (OETH_TX_BD_READY \| OETH_TX_BD_CRC);
510	dp->regs->xd[dp->tx_ptr].len_status = len_status;
511	dp->tx_ptr = (dp->tx_ptr + 1) % dp->txbufs;
512
513	}
514	inside = 0;
515	}
516
517	/*
518	* Driver transmit daemon
519	*/
520	static void
521	open_eth_txDaemon (void *arg)
522	{
523	struct open_eth_softc sc = (struct open_eth_softc ) arg;
524	struct ifnet *ifp = &sc->arpcom.ac_if;
525	struct mbuf *m;
526	rtems_event_set events;
527
528	for (;;)
529	{
530	/*
531	* Wait for packet
532	*/
533
534	rtems_bsdnet_event_receive (START_TRANSMIT_EVENT,
535	RTEMS_EVENT_ANY \| RTEMS_WAIT,
536	RTEMS_NO_TIMEOUT, &events);
537	#ifdef OPEN_ETH_DEBUG
538	printf ("t\n");
539	#endif
540
541	/*
542	* Send packets till queue is empty
543	*/
544	for (;;)
545	{
546	/*
547	* Get the next mbuf chain to transmit.
548	*/
549	IF_DEQUEUE (&ifp->if_snd, m);
550	if (!m)
551	break;
552	sendpacket (ifp, m);
553	}
554	ifp->if_flags &= ~IFF_OACTIVE;
555	}
556	}
557
558
559	static void
560	open_eth_start (struct ifnet *ifp)
561	{
562	struct open_eth_softc *sc = ifp->if_softc;
563
564	rtems_bsdnet_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
565	ifp->if_flags \|= IFF_OACTIVE;
566	}
567
568	/*
569	* Initialize and start the device
570	*/
571	static void
572	open_eth_init (void *arg)
573	{
574	struct open_eth_softc *sc = arg;
575	struct ifnet *ifp = &sc->arpcom.ac_if;
576
577	if (sc->txDaemonTid == 0)
578	{
579
580	/*
581	* Set up OPEN_ETH hardware
582	*/
583	open_eth_initialize_hardware (sc);
584
585	/*
586	* Start driver tasks
587	*/
588	sc->rxDaemonTid = rtems_bsdnet_newproc ("DCrx", 4096,
589	open_eth_rxDaemon, sc);
590	sc->txDaemonTid = rtems_bsdnet_newproc ("DCtx", 4096,
591	open_eth_txDaemon, sc);
592	}
593
594	/*
595	* Tell the world that we're running.
596	*/
597	ifp->if_flags \|= IFF_RUNNING;
598
599	}
600
601	/*
602	* Stop the device
603	*/
604	static void
605	open_eth_stop (struct open_eth_softc *sc)
606	{
607	struct ifnet *ifp = &sc->arpcom.ac_if;
608
609	ifp->if_flags &= ~IFF_RUNNING;
610
611	sc->regs->moder = 0; /* RX/TX OFF */
612	sc->regs->moder = OETH_MODER_RST; /* Reset ON */
613	sc->regs->moder = 0; /* Reset OFF */
614	}
615
616
617	/*
618	* Show interface statistics
619	*/
620	static void
621	open_eth_stats (struct open_eth_softc *sc)
622	{
623	printf (" Rx Packets:%-8lu", sc->rxPackets);
624	printf (" Rx Interrupts:%-8lu", sc->rxInterrupts);
625	printf (" Length:%-8lu", sc->rxLengthError);
626	printf (" Non-octet:%-8lu\n", sc->rxNonOctet);
627	printf (" Bad CRC:%-8lu", sc->rxBadCRC);
628	printf (" Overrun:%-8lu", sc->rxOverrun);
629	printf (" Miss:%-8lu", sc->rxMiss);
630	printf (" Collision:%-8lu\n", sc->rxCollision);
631
632	printf (" Tx Interrupts:%-8lu", sc->txInterrupts);
633	printf (" Deferred:%-8lu", sc->txDeferred);
634	printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat);
635	printf (" No Carrier:%-8lu", sc->txLostCarrier);
636	printf ("Retransmit Limit:%-8lu", sc->txRetryLimit);
637	printf (" Late Collision:%-8lu\n", sc->txLateCollision);
638	printf (" Underrun:%-8lu", sc->txUnderrun);
639	printf (" Raw output wait:%-8lu\n", sc->txRawWait);
640	}
641
642	/*
643	* Driver ioctl handler
644	*/
645	static int
646	open_eth_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data)
647	{
648	struct open_eth_softc *sc = ifp->if_softc;
649	int error = 0;
650
651	switch (command)
652	{
653	case SIOCGIFADDR:
654	case SIOCSIFADDR:
655	ether_ioctl (ifp, command, data);
656	break;
657
658	case SIOCSIFFLAGS:
659	switch (ifp->if_flags & (IFF_UP \| IFF_RUNNING))
660	{
661	case IFF_RUNNING:
662	open_eth_stop (sc);
663	break;
664
665	case IFF_UP:
666	open_eth_init (sc);
667	break;
668
669	case IFF_UP \| IFF_RUNNING:
670	open_eth_stop (sc);
671	open_eth_init (sc);
672	break;
673
674	default:
675	break;
676	}
677	break;
678
679	case SIO_RTEMS_SHOW_STATS:
680	open_eth_stats (sc);
681	break;
682
683	/*
684	* FIXME: All sorts of multicast commands need to be added here!
685	*/
686	default:
687	error = EINVAL;
688	break;
689	}
690
691	return error;
692	}
693
694	/*
695	* Attach an OPEN_ETH driver to the system
696	*/
697	int
698	rtems_open_eth_driver_attach (struct rtems_bsdnet_ifconfig *config,
699	open_eth_configuration_t * chip)
700	{
701	struct open_eth_softc *sc;
702	struct ifnet *ifp;
703	int mtu;
704	int unitNumber;
705	char *unitName;
706
707	/* parse driver name */
708	if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
709	return 0;
710
711	sc = &oc;
712	ifp = &sc->arpcom.ac_if;
713	memset (sc, 0, sizeof (*sc));
714
715	if (config->hardware_address)
716	{
717	memcpy (sc->arpcom.ac_enaddr, config->hardware_address,
718	ETHER_ADDR_LEN);
719	}
720	else
721	{
722	memset (sc->arpcom.ac_enaddr, 0x08, ETHER_ADDR_LEN);
723	}
724
725	if (config->mtu)
726	mtu = config->mtu;
727	else
728	mtu = ETHERMTU;
729
730	sc->acceptBroadcast = !config->ignore_broadcast;
731	sc->regs = chip->base_address;
732	sc->vector = chip->vector;
733	sc->txbufs = chip->txd_count;
734	sc->rxbufs = chip->rxd_count;
735	sc->en100MHz = chip->en100MHz;
736
737
738	/*
739	* Set up network interface values
740	*/
741	ifp->if_softc = sc;
742	ifp->if_unit = unitNumber;
743	ifp->if_name = unitName;
744	ifp->if_mtu = mtu;
745	ifp->if_init = open_eth_init;
746	ifp->if_ioctl = open_eth_ioctl;
747	ifp->if_start = open_eth_start;
748	ifp->if_output = ether_output;
749	ifp->if_flags = IFF_BROADCAST \| IFF_SIMPLEX;
750	if (ifp->if_snd.ifq_maxlen == 0)
751	ifp->if_snd.ifq_maxlen = ifqmaxlen;
752
753	/*
754	* Attach the interface
755	*/
756	if_attach (ifp);
757	ether_ifattach (ifp);
758
759	#ifdef OPEN_ETH_DEBUG
760	printf ("OPEN_ETH : driver has been attached\n");
761	#endif
762	return 1;
763	};
764
765	#endif /* OPENETH_NOT_SUPPORTED */

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