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source: rtems/c/src/libchip/network/open_eth.c @ 1fec9e0

4.115

Last change on this file since 1fec9e0 was 1fec9e0, checked in by Gedare Bloom <gedare@…>, on 04/16/12 at 02:22:36
m68k: replace m68k_isr with rtems_isr
Property mode set to `100644`
File size: 17.4 KB

Line
1	/*
2	* RTEMS driver for Opencores Ethernet Controller
3	*
4	* Weakly based on dec21140 rtems driver and open_eth linux driver
5	* Written by Jiri Gaisler, Gaisler Research
6	*
7	* The license and distribution terms for this file may be
8	* found in the file LICENSE in this distribution or at
9	* http://www.rtems.com/license/LICENSE.
10	*
11	*/
12
13	/*
14	* This driver current only supports architectures with the old style
15	* exception processing. The following checks try to keep this
16	* from being compiled on systems which can't support this driver.
17	*
18	* NOTE: The i386, ARM, and PowerPC use a different interrupt API than
19	* that used by this driver.
20	*/
21
22	#if defined(__i386__) \|\| defined(__arm__) \|\| defined(__PPC__)
23	#define OPENETH_NOT_SUPPORTED
24	#endif
25
26	#if !defined(OPENETH_NOT_SUPPORTED)
27	#include <bsp.h>
28	#include <rtems.h>
29
30	#include <bsp.h>
31
32	#include <inttypes.h>
33	#include <stdlib.h>
34	#include <stdio.h>
35	#include <stdarg.h>
36	#include <errno.h>
37
38	#include <rtems/error.h>
39	#include <rtems/rtems_bsdnet.h>
40	#include <libchip/open_eth.h>
41
42	#include <sys/param.h>
43	#include <sys/mbuf.h>
44
45	#include <sys/socket.h>
46	#include <sys/sockio.h>
47	#include <net/if.h>
48	#include <netinet/in.h>
49	#include <netinet/if_ether.h>
50
51	#ifdef malloc
52	#undef malloc
53	#endif
54	#ifdef free
55	#undef free
56	#endif
57
58	#if defined(__lm32__)
59	extern lm32_isr_entry set_vector( rtems_isr_entry, rtems_vector_number, int );
60	#else
61	extern rtems_isr_entry set_vector( rtems_isr_entry, rtems_vector_number, int );
62	#endif
63
64	/*
65	#define OPEN_ETH_DEBUG
66	*/
67
68	#ifdef CPU_U32_FIX
69	extern void ipalign(struct mbuf *m);
70	#endif
71
72	/* message descriptor entry */
73	struct MDTX
74	{
75	char *buf;
76	};
77
78	struct MDRX
79	{
80	struct mbuf *m;
81	};
82
83	/*
84	* Number of OCs supported by this driver
85	*/
86	#define NOCDRIVER 1
87
88	/*
89	* Receive buffer size -- Allow for a full ethernet packet including CRC
90	*/
91	#define RBUF_SIZE 1536
92
93	#define ET_MINLEN 64 /* minimum message length */
94
95	/*
96	* RTEMS event used by interrupt handler to signal driver tasks.
97	* This must not be any of the events used by the network task synchronization.
98	*/
99	#define INTERRUPT_EVENT RTEMS_EVENT_1
100
101	/*
102	* RTEMS event used to start transmit daemon.
103	* This must not be the same as INTERRUPT_EVENT.
104	*/
105	#define START_TRANSMIT_EVENT RTEMS_EVENT_2
106
107	/* event to send when tx buffers become available */
108	#define OPEN_ETH_TX_WAIT_EVENT RTEMS_EVENT_3
109
110	/* suspend when all TX descriptors exhausted */
111	/*
112	#define OETH_SUSPEND_NOTXBUF
113	*/
114
115	#if (MCLBYTES < RBUF_SIZE)
116	# error "Driver must have MCLBYTES > RBUF_SIZE"
117	#endif
118
119	/*
120	* Per-device data
121	*/
122	struct open_eth_softc
123	{
124
125	struct arpcom arpcom;
126
127	oeth_regs *regs;
128
129	int acceptBroadcast;
130	rtems_id rxDaemonTid;
131	rtems_id txDaemonTid;
132
133	unsigned int tx_ptr;
134	unsigned int rx_ptr;
135	unsigned int txbufs;
136	unsigned int rxbufs;
137	struct MDTX *txdesc;
138	struct MDRX *rxdesc;
139	rtems_vector_number vector;
140	unsigned int en100MHz;
141
142	/*
143	* Statistics
144	*/
145	unsigned long rxInterrupts;
146	unsigned long rxPackets;
147	unsigned long rxLengthError;
148	unsigned long rxNonOctet;
149	unsigned long rxBadCRC;
150	unsigned long rxOverrun;
151	unsigned long rxMiss;
152	unsigned long rxCollision;
153
154	unsigned long txInterrupts;
155	unsigned long txDeferred;
156	unsigned long txHeartbeat;
157	unsigned long txLateCollision;
158	unsigned long txRetryLimit;
159	unsigned long txUnderrun;
160	unsigned long txLostCarrier;
161	unsigned long txRawWait;
162	};
163
164	static struct open_eth_softc oc;
165
166	/* OPEN_ETH interrupt handler */
167
168	static rtems_isr
169	open_eth_interrupt_handler (rtems_vector_number v)
170	{
171	uint32_t status;
172
173	/* read and clear interrupt cause */
174
175	status = oc.regs->int_src;
176	oc.regs->int_src = status;
177
178	/* Frame received? */
179
180	if (status & (OETH_INT_RXF \| OETH_INT_RXE))
181	{
182	oc.rxInterrupts++;
183	rtems_event_send (oc.rxDaemonTid, INTERRUPT_EVENT);
184	}
185	#ifdef OETH_SUSPEND_NOTXBUF
186	if (status & (OETH_INT_MASK_TXB \| OETH_INT_MASK_TXC \| OETH_INT_MASK_TXE))
187	{
188	oc.txInterrupts++;
189	rtems_event_send (oc.txDaemonTid, OPEN_ETH_TX_WAIT_EVENT);
190	}
191	#endif
192	/*
193	#ifdef __leon__
194	LEON_Clear_interrupt(v-0x10);
195	#endif
196	*/
197	}
198
199	static uint32_t read_mii(uint32_t addr)
200	{
201	while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
202	oc.regs->miiaddress = addr << 8;
203	oc.regs->miicommand = OETH_MIICOMMAND_RSTAT;
204	while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
205	if (!(oc.regs->miistatus & OETH_MIISTATUS_NVALID))
206	return(oc.regs->miirx_data);
207	else {
208	printf("open_eth: failed to read mii\n");
209	return (0);
210	}
211	}
212
213	static void write_mii(uint32_t addr, uint32_t data)
214	{
215	while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
216	oc.regs->miiaddress = addr << 8;
217	oc.regs->miitx_data = data;
218	oc.regs->miicommand = OETH_MIICOMMAND_WCTRLDATA;
219	while (oc.regs->miistatus & OETH_MIISTATUS_BUSY) {}
220	}
221	/*
222	* Initialize the ethernet hardware
223	*/
224	static void
225	open_eth_initialize_hardware (struct open_eth_softc *sc)
226	{
227	struct mbuf *m;
228	int i;
229	int mii_cr = 0;
230
231	oeth_regs *regs;
232
233	regs = sc->regs;
234
235	/* Reset the controller. */
236
237	regs->ctrlmoder = 0;
238	regs->moder = OETH_MODER_RST; /* Reset ON */
239	regs->moder = 0; /* Reset OFF */
240
241	/* reset PHY and wait for complettion */
242	mii_cr = 0x3300;
243	if (!sc->en100MHz) mii_cr = 0;
244	write_mii(0, mii_cr \| 0x8000);
245	while (read_mii(0) & 0x8000) {}
246	if (!sc->en100MHz) write_mii(0, 0);
247	mii_cr = read_mii(0);
248	printf("open_eth: driver attached, PHY config : 0x%04" PRIx32 "\n", read_mii(0));
249
250	#ifdef OPEN_ETH_DEBUG
251	printf("mii_cr: %04x\n", mii_cr);
252	for (i=0;i<21;i++)
253	printf("mii_reg %2d : 0x%04x\n", i, read_mii(i));
254	#endif
255
256	/* Setting TXBD base to sc->txbufs */
257
258	regs->tx_bd_num = sc->txbufs;
259
260	/* Initialize rx/tx pointers. */
261
262	sc->rx_ptr = 0;
263	sc->tx_ptr = 0;
264
265	/* Set min/max packet length */
266	regs->packet_len = 0x00400600;
267
268	/* Set IPGT register to recomended value */
269	regs->ipgt = 0x00000015;
270
271	/* Set IPGR1 register to recomended value */
272	regs->ipgr1 = 0x0000000c;
273
274	/* Set IPGR2 register to recomended value */
275	regs->ipgr2 = 0x00000012;
276
277	/* Set COLLCONF register to recomended value */
278	regs->collconf = 0x000f003f;
279
280	/* initialize TX descriptors */
281
282	sc->txdesc = calloc(sc->txbufs, sizeof(*sc->txdesc));
283	for (i = 0; i < sc->txbufs; i++)
284	{
285	sc->regs->xd[i].len_status = OETH_TX_BD_PAD \| OETH_TX_BD_CRC;
286	sc->txdesc[i].buf = calloc(1, OETH_MAXBUF_LEN);
287	#ifdef OPEN_ETH_DEBUG
288	printf("TXBUF: %08x\n", (int) sc->txdesc[i].buf);
289	#endif
290	}
291	sc->regs->xd[sc->txbufs - 1].len_status \|= OETH_TX_BD_WRAP;
292
293	/* allocate RX buffers */
294
295	sc->rxdesc = calloc(sc->rxbufs, sizeof(*sc->rxdesc));
296	for (i = 0; i < sc->rxbufs; i++)
297	{
298
299	MGETHDR (m, M_WAIT, MT_DATA);
300	MCLGET (m, M_WAIT);
301	m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
302	sc->rxdesc[i].m = m;
303	sc->regs->xd[i + sc->txbufs].addr = mtod (m, uint32_t*);
304	sc->regs->xd[i + sc->txbufs].len_status =
305	OETH_RX_BD_EMPTY \| OETH_RX_BD_IRQ;
306	#ifdef OPEN_ETH_DEBUG
307	printf("RXBUF: %08x\n", (int) sc->rxdesc[i].m);
308	#endif
309	}
310	sc->regs->xd[sc->rxbufs + sc->txbufs - 1].len_status \|= OETH_RX_BD_WRAP;
311
312
313	/* set ethernet address. */
314
315	regs->mac_addr1 = sc->arpcom.ac_enaddr[0] << 8 \| sc->arpcom.ac_enaddr[1];
316
317	uint32_t mac_addr0;
318	mac_addr0 = sc->arpcom.ac_enaddr[2];
319	mac_addr0 <<= 8;
320	mac_addr0 \|= sc->arpcom.ac_enaddr[3];
321	mac_addr0 <<= 8;
322	mac_addr0 \|= sc->arpcom.ac_enaddr[4];
323	mac_addr0 <<= 8;
324	mac_addr0 \|= sc->arpcom.ac_enaddr[5];
325
326	regs->mac_addr0 = mac_addr0;
327
328	/* install interrupt vector */
329	set_vector (open_eth_interrupt_handler, sc->vector, 1);
330
331	/* clear all pending interrupts */
332
333	regs->int_src = 0xffffffff;
334
335	/* MAC mode register: PAD, IFG, CRCEN */
336
337	regs->moder = OETH_MODER_PAD \| OETH_MODER_CRCEN \| ((mii_cr & 0x100) << 2);
338
339	/* enable interrupts */
340
341	regs->int_mask = OETH_INT_MASK_RXF \| OETH_INT_MASK_RXE \| OETH_INT_MASK_RXC;
342
343	#ifdef OETH_SUSPEND_NOTXBUF
344	regs->int_mask \|= OETH_INT_MASK_TXB \| OETH_INT_MASK_TXC \| OETH_INT_MASK_TXE \| OETH_INT_BUSY;*/
345	sc->regs->xd[(sc->txbufs - 1)/2].len_status \|= OETH_TX_BD_IRQ;
346	sc->regs->xd[sc->txbufs - 1].len_status \|= OETH_TX_BD_IRQ;
347	#endif
348
349	regs->moder \|= OETH_MODER_RXEN \| OETH_MODER_TXEN;
350	}
351
352	static void
353	open_eth_rxDaemon (void *arg)
354	{
355	struct ether_header *eh;
356	struct open_eth_softc dp = (struct open_eth_softc ) &oc;
357	struct ifnet *ifp = &dp->arpcom.ac_if;
358	struct mbuf *m;
359	unsigned int len;
360	uint32_t len_status;
361	unsigned int bad;
362	rtems_event_set events;
363
364
365	for (;;)
366	{
367
368	rtems_bsdnet_event_receive (INTERRUPT_EVENT,
369	RTEMS_WAIT \| RTEMS_EVENT_ANY,
370	RTEMS_NO_TIMEOUT, &events);
371	#ifdef OPEN_ETH_DEBUG
372	printf ("r\n");
373	#endif
374
375	while (!
376	((len_status =
377	dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status) & OETH_RX_BD_EMPTY))
378	{
379	bad = 0;
380	if (len_status & (OETH_RX_BD_TOOLONG \| OETH_RX_BD_SHORT))
381	{
382	dp->rxLengthError++;
383	bad = 1;
384	}
385	if (len_status & OETH_RX_BD_DRIBBLE)
386	{
387	dp->rxNonOctet++;
388	bad = 1;
389	}
390	if (len_status & OETH_RX_BD_CRCERR)
391	{
392	dp->rxBadCRC++;
393	bad = 1;
394	}
395	if (len_status & OETH_RX_BD_OVERRUN)
396	{
397	dp->rxOverrun++;
398	bad = 1;
399	}
400	if (len_status & OETH_RX_BD_MISS)
401	{
402	dp->rxMiss++;
403	bad = 1;
404	}
405	if (len_status & OETH_RX_BD_LATECOL)
406	{
407	dp->rxCollision++;
408	bad = 1;
409	}
410
411	if (!bad)
412	{
413	/* pass on the packet in the receive buffer */
414	len = len_status >> 16;
415	m = (struct mbuf *) (dp->rxdesc[dp->rx_ptr].m);
416	m->m_len = m->m_pkthdr.len =
417	len - sizeof (struct ether_header);
418	eh = mtod (m, struct ether_header *);
419	m->m_data += sizeof (struct ether_header);
420	#ifdef CPU_U32_FIX
421	ipalign(m); /* Align packet on 32-bit boundary */
422	#endif
423
424	ether_input (ifp, eh, m);
425
426	/* get a new mbuf */
427	MGETHDR (m, M_WAIT, MT_DATA);
428	MCLGET (m, M_WAIT);
429	m->m_pkthdr.rcvif = ifp;
430	dp->rxdesc[dp->rx_ptr].m = m;
431	dp->regs->xd[dp->rx_ptr + dp->txbufs].addr =
432	(uint32_t) mtod (m, void );
433	dp->rxPackets++;
434	}
435
436	dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status =
437	(dp->regs->xd[dp->rx_ptr+dp->txbufs].len_status &
438	~OETH_TX_BD_STATS) \| OETH_TX_BD_READY;
439	dp->rx_ptr = (dp->rx_ptr + 1) % dp->rxbufs;
440	}
441	}
442	}
443
444	static int inside = 0;
445	static void
446	sendpacket (struct ifnet ifp, struct mbuf m)
447	{
448	struct open_eth_softc *dp = ifp->if_softc;
449	unsigned char *temp;
450	struct mbuf *n;
451	uint32_t len, len_status;
452
453	if (inside) printf ("error: sendpacket re-entered!!\n");
454	inside = 1;
455	/*
456	* Waiting for Transmitter ready
457	*/
458	n = m;
459
460	while (dp->regs->xd[dp->tx_ptr].len_status & OETH_TX_BD_READY)
461	{
462	#ifdef OETH_SUSPEND_NOTXBUF
463	rtems_event_set events;
464	rtems_bsdnet_event_receive (OPEN_ETH_TX_WAIT_EVENT,
465	RTEMS_WAIT \| RTEMS_EVENT_ANY,
466	TOD_MILLISECONDS_TO_TICKS(500), &events);
467	#endif
468	}
469
470	len = 0;
471	temp = (unsigned char *) dp->txdesc[dp->tx_ptr].buf;
472	dp->regs->xd[dp->tx_ptr].addr = (uint32_t*) temp;
473
474	#ifdef OPEN_ETH_DEBUG
475	printf("TXD: 0x%08x\n", (int) m->m_data);
476	#endif
477	for (;;)
478	{
479	#ifdef OPEN_ETH_DEBUG
480	int i;
481	printf("MBUF: 0x%08x : ", (int) m->m_data);
482	for (i=0;i<m->m_len;i++)
483	printf("%x%x", (m->m_data[i] >> 4) & 0x0ff, m->m_data[i] & 0x0ff);
484	printf("\n");
485	#endif
486	len += m->m_len;
487	if (len <= RBUF_SIZE)
488	memcpy ((void ) temp, (char ) m->m_data, m->m_len);
489	temp += m->m_len;
490	if ((m = m->m_next) == NULL)
491	break;
492	}
493
494	m_freem (n);
495
496	/* don't send long packets */
497
498	if (len <= RBUF_SIZE) {
499
500	/* Clear all of the status flags. */
501	len_status = dp->regs->xd[dp->tx_ptr].len_status & ~OETH_TX_BD_STATS;
502
503	/* If the frame is short, tell CPM to pad it. */
504	if (len < ET_MINLEN) {
505	len_status \|= OETH_TX_BD_PAD;
506	len = ET_MINLEN;
507	}
508	else
509	len_status &= ~OETH_TX_BD_PAD;
510
511	/* write buffer descriptor length and status */
512	len_status &= 0x0000ffff;
513	len_status \|= (len << 16) \| (OETH_TX_BD_READY \| OETH_TX_BD_CRC);
514	dp->regs->xd[dp->tx_ptr].len_status = len_status;
515	dp->tx_ptr = (dp->tx_ptr + 1) % dp->txbufs;
516
517	}
518	inside = 0;
519	}
520
521	/*
522	* Driver transmit daemon
523	*/
524	void
525	open_eth_txDaemon (void *arg)
526	{
527	struct open_eth_softc sc = (struct open_eth_softc ) arg;
528	struct ifnet *ifp = &sc->arpcom.ac_if;
529	struct mbuf *m;
530	rtems_event_set events;
531
532	for (;;)
533	{
534	/*
535	* Wait for packet
536	*/
537
538	rtems_bsdnet_event_receive (START_TRANSMIT_EVENT,
539	RTEMS_EVENT_ANY \| RTEMS_WAIT,
540	RTEMS_NO_TIMEOUT, &events);
541	#ifdef OPEN_ETH_DEBUG
542	printf ("t\n");
543	#endif
544
545	/*
546	* Send packets till queue is empty
547	*/
548	for (;;)
549	{
550	/*
551	* Get the next mbuf chain to transmit.
552	*/
553	IF_DEQUEUE (&ifp->if_snd, m);
554	if (!m)
555	break;
556	sendpacket (ifp, m);
557	}
558	ifp->if_flags &= ~IFF_OACTIVE;
559	}
560	}
561
562
563	static void
564	open_eth_start (struct ifnet *ifp)
565	{
566	struct open_eth_softc *sc = ifp->if_softc;
567
568	rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
569	ifp->if_flags \|= IFF_OACTIVE;
570	}
571
572	/*
573	* Initialize and start the device
574	*/
575	static void
576	open_eth_init (void *arg)
577	{
578	struct open_eth_softc *sc = arg;
579	struct ifnet *ifp = &sc->arpcom.ac_if;
580
581	if (sc->txDaemonTid == 0)
582	{
583
584	/*
585	* Set up OPEN_ETH hardware
586	*/
587	open_eth_initialize_hardware (sc);
588
589	/*
590	* Start driver tasks
591	*/
592	sc->rxDaemonTid = rtems_bsdnet_newproc ("DCrx", 4096,
593	open_eth_rxDaemon, sc);
594	sc->txDaemonTid = rtems_bsdnet_newproc ("DCtx", 4096,
595	open_eth_txDaemon, sc);
596	}
597
598	/*
599	* Tell the world that we're running.
600	*/
601	ifp->if_flags \|= IFF_RUNNING;
602
603	}
604
605	/*
606	* Stop the device
607	*/
608	static void
609	open_eth_stop (struct open_eth_softc *sc)
610	{
611	struct ifnet *ifp = &sc->arpcom.ac_if;
612
613	ifp->if_flags &= ~IFF_RUNNING;
614
615	sc->regs->moder = 0; /* RX/TX OFF */
616	sc->regs->moder = OETH_MODER_RST; /* Reset ON */
617	sc->regs->moder = 0; /* Reset OFF */
618	}
619
620
621	/*
622	* Show interface statistics
623	*/
624	static void
625	open_eth_stats (struct open_eth_softc *sc)
626	{
627	printf (" Rx Packets:%-8lu", sc->rxPackets);
628	printf (" Rx Interrupts:%-8lu", sc->rxInterrupts);
629	printf (" Length:%-8lu", sc->rxLengthError);
630	printf (" Non-octet:%-8lu\n", sc->rxNonOctet);
631	printf (" Bad CRC:%-8lu", sc->rxBadCRC);
632	printf (" Overrun:%-8lu", sc->rxOverrun);
633	printf (" Miss:%-8lu", sc->rxMiss);
634	printf (" Collision:%-8lu\n", sc->rxCollision);
635
636	printf (" Tx Interrupts:%-8lu", sc->txInterrupts);
637	printf (" Deferred:%-8lu", sc->txDeferred);
638	printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat);
639	printf (" No Carrier:%-8lu", sc->txLostCarrier);
640	printf ("Retransmit Limit:%-8lu", sc->txRetryLimit);
641	printf (" Late Collision:%-8lu\n", sc->txLateCollision);
642	printf (" Underrun:%-8lu", sc->txUnderrun);
643	printf (" Raw output wait:%-8lu\n", sc->txRawWait);
644	}
645
646	/*
647	* Driver ioctl handler
648	*/
649	static int
650	open_eth_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data)
651	{
652	struct open_eth_softc *sc = ifp->if_softc;
653	int error = 0;
654
655	switch (command)
656	{
657	case SIOCGIFADDR:
658	case SIOCSIFADDR:
659	ether_ioctl (ifp, command, data);
660	break;
661
662	case SIOCSIFFLAGS:
663	switch (ifp->if_flags & (IFF_UP \| IFF_RUNNING))
664	{
665	case IFF_RUNNING:
666	open_eth_stop (sc);
667	break;
668
669	case IFF_UP:
670	open_eth_init (sc);
671	break;
672
673	case IFF_UP \| IFF_RUNNING:
674	open_eth_stop (sc);
675	open_eth_init (sc);
676	break;
677
678	default:
679	break;
680	}
681	break;
682
683	case SIO_RTEMS_SHOW_STATS:
684	open_eth_stats (sc);
685	break;
686
687	/*
688	* FIXME: All sorts of multicast commands need to be added here!
689	*/
690	default:
691	error = EINVAL;
692	break;
693	}
694
695	return error;
696	}
697
698	/*
699	* Attach an OPEN_ETH driver to the system
700	*/
701	int
702	rtems_open_eth_driver_attach (struct rtems_bsdnet_ifconfig *config,
703	open_eth_configuration_t * chip)
704	{
705	struct open_eth_softc *sc;
706	struct ifnet *ifp;
707	int mtu;
708	int unitNumber;
709	char *unitName;
710
711	/* parse driver name */
712	if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
713	return 0;
714
715	sc = &oc;
716	ifp = &sc->arpcom.ac_if;
717	memset (sc, 0, sizeof (*sc));
718
719	if (config->hardware_address)
720	{
721	memcpy (sc->arpcom.ac_enaddr, config->hardware_address,
722	ETHER_ADDR_LEN);
723	}
724	else
725	{
726	memset (sc->arpcom.ac_enaddr, 0x08, ETHER_ADDR_LEN);
727	}
728
729	if (config->mtu)
730	mtu = config->mtu;
731	else
732	mtu = ETHERMTU;
733
734	sc->acceptBroadcast = !config->ignore_broadcast;
735	sc->regs = chip->base_address;
736	sc->vector = chip->vector;
737	sc->txbufs = chip->txd_count;
738	sc->rxbufs = chip->rxd_count;
739	sc->en100MHz = chip->en100MHz;
740
741
742	/*
743	* Set up network interface values
744	*/
745	ifp->if_softc = sc;
746	ifp->if_unit = unitNumber;
747	ifp->if_name = unitName;
748	ifp->if_mtu = mtu;
749	ifp->if_init = open_eth_init;
750	ifp->if_ioctl = open_eth_ioctl;
751	ifp->if_start = open_eth_start;
752	ifp->if_output = ether_output;
753	ifp->if_flags = IFF_BROADCAST \| IFF_SIMPLEX;
754	if (ifp->if_snd.ifq_maxlen == 0)
755	ifp->if_snd.ifq_maxlen = ifqmaxlen;
756
757	/*
758	* Attach the interface
759	*/
760	if_attach (ifp);
761	ether_ifattach (ifp);
762
763	#ifdef OPEN_ETH_DEBUG
764	printf ("OPEN_ETH : driver has been attached\n");
765	#endif
766	return 1;
767	};
768
769	#endif /* OPENETH_NOT_SUPPORTED */

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