source: rtems/c/src/libchip/network/if_fxp.c @ a3d3d9a

4.104.114.84.95
Last change on this file since a3d3d9a was a3d3d9a, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/20/04 at 10:43:39

Remove stray white spaces.

  • Property mode set to 100644
File size: 61.1 KB
Line 
1/*-
2 * Copyright (c) 1995, David Greenman
3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice unmodified, this list of conditions, and the following
11 *    disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: src/sys/dev/fxp/if_fxp.c,v 1.118 2001/09/05 23:33:58 brooks Exp $
29 */
30
31/*
32 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
33 */
34
35/*
36 * RTEMS Revision Preliminary History
37 *
38 * July XXX, 2002     W. Eric Norum <eric.norum@usask.ca>
39 *     Placed in RTEMS CVS repository.  All further modifications will be
40 *     noted in the CVS log and not in this comment.
41 *
42 * July 11, 2002     W. Eric Norum <eric.norum@usask.ca>
43 *     Minor modifications to get driver working with NIC on VersaLogic
44 *     Bobcat PC-104 single-board computer.  The Bobcat has no video
45 *     driver so printf/printk calls are directed to COM2:.  This
46 *     arrangement seems to require delays after the printk calls or
47 *     else things lock up.  Perhaps the RTEMS pc386 console code
48 *     should be modified to insert these delays itself.
49 *
50 * June 27, 2002     W. Eric Norum <eric.norum@usask.ca>
51 *     Obtained from Thomas Doerfler <Thomas.Doerfler@imd-systems.de>.
52 *     A big thank-you to Thomas for making this available.
53 *
54 * October 01, 2001  Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
55 *     Original RTEMS modifications.
56 */
57
58#if defined(__i386__)
59
60/*#define DEBUG_OUT 0*/
61
62#include <rtems.h>
63#include <rtems/error.h>
64#include <rtems/rtems_bsdnet.h>
65#include <bsp.h>
66
67#include <sys/param.h>
68#include <sys/mbuf.h>
69#include <sys/socket.h>
70#include <sys/sockio.h>
71#include <net/if.h>
72#include <netinet/in.h>
73#include <netinet/if_ether.h>
74#include <sys/malloc.h>
75#include <sys/systm.h>
76#include <bsp.h>
77#include <pcibios.h>
78#include <irq.h>
79#include <rtems/pci.h>
80
81#ifdef NS
82#include <netns/ns.h>
83#include <netns/ns_if.h>
84#endif
85
86#include <net/bpf.h>
87
88#include <vm/vm.h>              /* for vtophys */
89
90#include <net/if_types.h>
91
92#include "if_fxpreg.h"
93#include "if_fxpvar.h"
94
95/*
96 * some adaptation replacements for RTEMS
97 */
98static rtems_interval fxp_ticksPerSecond;
99#define device_printf(device,format,args...) printk(format,## args)
100#define DELAY(n) rtems_task_wake_after(((n)*fxp_ticksPerSecond/1000000)+1)
101#ifdef DEBUG_OUT
102#define DBGLVL_PRINTK(LVL,format, args...)                   \
103if (DEBUG_OUT >= (LVL)) {                                    \
104  printk(format, ## args);                                   \
105}
106#else
107#define DBGLVL_PRINTK(LVL,format, args...)
108#endif
109
110/*
111 * RTEMS event used by interrupt handler to signal driver tasks.
112 * This must not be any of the events used by the network task synchronization.
113 */
114#define INTERRUPT_EVENT RTEMS_EVENT_1
115
116/*
117 * remapping between PCI device and CPU memmory address view...
118 */
119#if defined(__i386)
120#define vtophys(p) (u_int32_t)(p)
121#else
122#define vtophys(p) vtophys(p)
123#endif
124
125#define NFXPDRIVER 1
126static struct fxp_softc fxp_softc[NFXPDRIVER];
127static int fxp_is_verbose = TRUE;
128/*
129 * NOTE!  On the Alpha, we have an alignment constraint.  The
130 * card DMAs the packet immediately following the RFA.  However,
131 * the first thing in the packet is a 14-byte Ethernet header.
132 * This means that the packet is misaligned.  To compensate,
133 * we actually offset the RFA 2 bytes into the cluster.  This
134 * alignes the packet after the Ethernet header at a 32-bit
135 * boundary.  HOWEVER!  This means that the RFA is misaligned!
136 */
137#define RFA_ALIGNMENT_FUDGE     2
138
139/*
140 * Set initial transmit threshold at 64 (512 bytes). This is
141 * increased by 64 (512 bytes) at a time, to maximum of 192
142 * (1536 bytes), if an underrun occurs.
143 */
144static int tx_threshold = 64;
145
146/*
147 * The configuration byte map has several undefined fields which
148 * must be one or must be zero.  Set up a template for these bits
149 * only, (assuming a 82557 chip) leaving the actual configuration
150 * to fxp_init.
151 *
152 * See struct fxp_cb_config for the bit definitions.
153 */
154static u_char fxp_cb_config_template[] = {
155        0x0, 0x0,               /* cb_status */
156        0x0, 0x0,               /* cb_command */
157        0x0, 0x0, 0x0, 0x0,     /* link_addr */
158        0x0,    /*  0 */
159        0x0,    /*  1 */
160        0x0,    /*  2 */
161        0x0,    /*  3 */
162        0x0,    /*  4 */
163        0x0,    /*  5 */
164        0x32,   /*  6 */
165        0x0,    /*  7 */
166        0x0,    /*  8 */
167        0x0,    /*  9 */
168        0x6,    /* 10 */
169        0x0,    /* 11 */
170        0x0,    /* 12 */
171        0x0,    /* 13 */
172        0xf2,   /* 14 */
173        0x48,   /* 15 */
174        0x0,    /* 16 */
175        0x40,   /* 17 */
176        0xf0,   /* 18 */
177        0x0,    /* 19 */
178        0x3f,   /* 20 */
179        0x5     /* 21 */
180};
181
182struct fxp_ident {
183        u_int16_t       devid;
184        char            *name;
185};
186
187/*
188 * Claim various Intel PCI device identifiers for this driver.  The
189 * sub-vendor and sub-device field are extensively used to identify
190 * particular variants, but we don't currently differentiate between
191 * them.
192 */
193static struct fxp_ident fxp_ident_table[] = {
194#ifdef NOTUSED
195        /* currently untested */
196    { 0x1229,           "Intel Pro 10/100B/100+ Ethernet" },
197    { 0x2449,           "Intel Pro/100 Ethernet" },
198#endif
199    { 0x1209,           "Intel Embedded 10/100 Ethernet" },
200#ifdef NOTUSED
201        /* currently untested */
202    { 0x1029,           "Intel Pro/100 Ethernet" },
203#endif
204    { 0x1030,           "Intel Pro/100 Ethernet" },
205#ifdef NOTUSED
206        /* currently untested */
207    { 0x1031,           "Intel Pro/100 Ethernet" },
208    { 0x1032,           "Intel Pro/100 Ethernet" },
209    { 0x1033,           "Intel Pro/100 Ethernet" },
210    { 0x1034,           "Intel Pro/100 Ethernet" },
211    { 0x1035,           "Intel Pro/100 Ethernet" },
212    { 0x1036,           "Intel Pro/100 Ethernet" },
213    { 0x1037,           "Intel Pro/100 Ethernet" },
214    { 0x1038,           "Intel Pro/100 Ethernet" },
215#endif
216    { 0,                NULL },
217};
218
219#if 0
220static int              fxp_probe(device_t dev);
221static int              fxp_attach(device_t dev);
222static int              fxp_detach(device_t dev);
223static int              fxp_shutdown(device_t dev);
224#endif
225int     fxp_output (struct ifnet *,
226           struct mbuf *, struct sockaddr *, struct rtentry *);
227
228
229static rtems_isr        fxp_intr(rtems_vector_number v);
230static void             fxp_init(void *xsc);
231static void             fxp_tick(void *xsc);
232static void             fxp_start(struct ifnet *ifp);
233static void             fxp_stop(struct fxp_softc *sc);
234static void             fxp_release(struct fxp_softc *sc);
235static int              fxp_ioctl(struct ifnet *ifp, int command,
236                            caddr_t data);
237static void             fxp_watchdog(struct ifnet *ifp);
238static int              fxp_add_rfabuf(struct fxp_softc *sc, struct mbuf *oldm);
239static void             fxp_mc_setup(struct fxp_softc *sc);
240static u_int16_t        fxp_eeprom_getword(struct fxp_softc *sc, int offset,
241                            int autosize);
242static void             fxp_eeprom_putword(struct fxp_softc *sc, int offset,
243                            u_int16_t data);
244static void             fxp_autosize_eeprom(struct fxp_softc *sc);
245static void             fxp_read_eeprom(struct fxp_softc *sc, u_short *data,
246                            int offset, int words);
247static void             fxp_write_eeprom(struct fxp_softc *sc, u_short *data,
248                            int offset, int words);
249#ifdef NOTUSED
250static int              fxp_ifmedia_upd(struct ifnet *ifp);
251static void             fxp_ifmedia_sts(struct ifnet *ifp,
252                            struct ifmediareq *ifmr);
253static int              fxp_serial_ifmedia_upd(struct ifnet *ifp);
254static void             fxp_serial_ifmedia_sts(struct ifnet *ifp,
255                            struct ifmediareq *ifmr);
256static volatile int     fxp_miibus_readreg(device_t dev, int phy, int reg);
257static void             fxp_miibus_writereg(device_t dev, int phy, int reg,
258                            int value);
259#endif
260static __inline void    fxp_lwcopy(volatile u_int32_t *src,
261                            volatile u_int32_t *dst);
262static __inline void    fxp_scb_wait(struct fxp_softc *sc);
263static __inline void    fxp_scb_cmd(struct fxp_softc *sc, int cmd);
264static __inline void    fxp_dma_wait(volatile u_int16_t *status,
265                            struct fxp_softc *sc);
266
267/*
268 * Inline function to copy a 16-bit aligned 32-bit quantity.
269 */
270static __inline void
271fxp_lwcopy(volatile u_int32_t *src, volatile u_int32_t *dst)
272{
273#ifdef __i386__
274        *dst = *src;
275#else
276        volatile u_int16_t *a = (volatile u_int16_t*)src;
277        volatile u_int16_t *b = (volatile u_int16_t*)dst;
278
279        b[0] = a[0];
280        b[1] = a[1];
281#endif
282}
283
284/*
285 * inline access functions to pci space registers
286 */
287static __inline u_int8_t fxp_csr_read_1(struct fxp_softc *sc,int  reg) {
288  u_int8_t val;
289  if (sc->pci_regs_are_io) {
290    inport_byte(sc->pci_regs_base + reg,val);
291  }
292  else {
293    val = *(u_int8_t*)(sc->pci_regs_base+reg);
294  }
295  return val;
296}
297static __inline u_int32_t fxp_csr_read_2(struct fxp_softc *sc,int  reg) {
298  u_int16_t val;
299  if (sc->pci_regs_are_io) {
300    inport_word(sc->pci_regs_base + reg,val);
301  }
302  else {
303    val = *(u_int16_t*)(sc->pci_regs_base+reg);
304  }
305  return val;
306}
307static __inline u_int32_t fxp_csr_read_4(struct fxp_softc *sc,int  reg) {
308  u_int32_t val;
309  if (sc->pci_regs_are_io) {
310    inport_long(sc->pci_regs_base + reg,val);
311  }
312  else {
313    val = *(u_int32_t*)(sc->pci_regs_base+reg);
314  }
315  return val;
316}
317
318/*
319 * Wait for the previous command to be accepted (but not necessarily
320 * completed).
321 */
322static __inline void
323fxp_scb_wait(struct fxp_softc *sc)
324{
325        int i = 10000;
326
327        while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i)
328                DELAY(2);
329        if (i == 0)
330                device_printf(sc->dev, "SCB timeout: 0x%x 0x%x 0x%x 0x%x\n",
331                    CSR_READ_1(sc, FXP_CSR_SCB_COMMAND),
332                    CSR_READ_1(sc, FXP_CSR_SCB_STATACK),
333                    CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS),
334                    CSR_READ_2(sc, FXP_CSR_FLOWCONTROL));
335}
336
337static __inline void
338fxp_scb_cmd(struct fxp_softc *sc, int cmd)
339{
340
341        if (cmd == FXP_SCB_COMMAND_CU_RESUME && sc->cu_resume_bug) {
342                CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_CB_COMMAND_NOP);
343                fxp_scb_wait(sc);
344        }
345        CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, cmd);
346}
347
348static __inline void
349fxp_dma_wait(volatile u_int16_t *status, struct fxp_softc *sc)
350{
351        int i = 10000;
352
353        while (!(*status & FXP_CB_STATUS_C) && --i)
354                DELAY(2);
355        if (i == 0)
356                device_printf(sc->dev, "DMA timeout\n");
357}
358
359static __inline unsigned int pci_get_vendor(struct fxp_softc *sc) {
360  u_int16_t vendor;
361  pcib_conf_read16(sc->pci_signature,0,&vendor);
362  return vendor;
363}
364
365static __inline unsigned int pci_get_device(struct fxp_softc *sc) {
366  u_int16_t device;
367  pcib_conf_read16(sc->pci_signature,2,&device);
368  return device;
369}
370
371static __inline unsigned int pci_get_subvendor(struct fxp_softc *sc) {
372  u_int16_t subvendor;
373  pcib_conf_read16(sc->pci_signature,0x2c,&subvendor);
374  return subvendor;
375}
376
377static __inline unsigned int pci_get_subdevice(struct fxp_softc *sc) {
378  u_int16_t subdevice;
379  pcib_conf_read16(sc->pci_signature,0x2e,&subdevice);
380  return subdevice;
381}
382
383static __inline unsigned int pci_get_revid(struct fxp_softc *sc) {
384  u_int8_t revid;
385  pcib_conf_read8(sc->pci_signature,0x08,&revid);
386  return revid;
387}
388
389static void nopOn(const rtems_irq_connect_data* notUsed)
390{
391  /*
392   * code should be moved from fxp_Enet_initialize_hardware
393   * to this location
394   */
395}
396
397static int fxpIsOn(const rtems_irq_connect_data* irq)
398{
399  return BSP_irq_enabled_at_i8259s (irq->name);
400}
401
402int
403rtems_fxp_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
404{
405        int error = 0;
406        struct fxp_softc *sc;
407        struct ifnet *ifp;
408        u_int16_t val16;
409        u_int32_t val32;
410        u_int16_t data;
411        int i;
412        int s;
413        int unitNumber;
414        char *unitName;
415        u_int16_t dev_id;
416        u_int8_t interrupt;
417        int mtu;
418
419    /*
420     * Set up some timing values
421     */
422    rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, &fxp_ticksPerSecond);
423        DBGLVL_PRINTK(1,"fxp_attach called\n");
424
425        /*
426         * Parse driver name
427         */
428        if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
429                return 0;
430
431        /*
432         * Is driver free?
433         */
434        if ((unitNumber <= 0) || (unitNumber > NFXPDRIVER)) {
435                device_printf(dev,"Bad FXP unit number.\n");
436                return 0;
437        }
438        sc = &fxp_softc[unitNumber - 1];
439        ifp = &sc->arpcom.ac_if;
440        if (ifp->if_softc != NULL) {
441                device_printf(dev,"FXP Driver already in use.\n");
442                return 0;
443        }
444
445        memset(sc, 0, sizeof(*sc));
446#ifdef NOTUSED
447        sc->dev = dev;
448        callout_handle_init(&sc->stat_ch);
449        mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_DEF | MTX_RECURSE);
450#endif
451        s = splimp();
452
453        /*
454         * init PCI Bios interface...
455         */
456        i = pcib_init();
457        DBGLVL_PRINTK(2,"fxp_attach: pcib_init returned %d\n",i);
458        if (i != PCIB_ERR_SUCCESS) {
459          device_printf(dev, "could not initialize pci bios interface\n");
460          return 0;
461        }
462
463        /*
464         * find device on pci bus
465         */
466    { int j;
467
468      for (j=0; fxp_ident_table[j].devid; j++ ) {
469                i = pcib_find_by_devid( 0x8086,
470                                                                fxp_ident_table[j].devid,
471                                                                unitNumber-1,
472                                                        &(sc->pci_signature));
473                DBGLVL_PRINTK(2,"fxp_attach: find_devid returned %d "
474                      "and pci signature 0x%x\n",
475                      i,sc->pci_signature);
476        if (PCIB_ERR_SUCCESS == i)
477                        break;
478          }
479        }
480
481        /*
482         * FIXME: add search for more device types...
483         */
484        if (i != PCIB_ERR_SUCCESS) {
485          device_printf(dev, "could not find 82559ER device\n");
486          return 0;
487        }
488
489
490        /*
491         * Enable bus mastering. Enable memory space too, in case
492         * BIOS/Prom forgot about it.
493         */
494        pcib_conf_read16(sc->pci_signature, PCI_COMMAND,&val16);
495        val16 |= (PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER);
496        pcib_conf_write16(sc->pci_signature, PCI_COMMAND, val16);
497        DBGLVL_PRINTK(3,"fxp_attach: PCI_COMMAND_write = 0x%x\n",val16);
498        pcib_conf_read16(sc->pci_signature, PCI_COMMAND,&val16);
499        DBGLVL_PRINTK(4,"fxp_attach: PCI_COMMAND_read  = 0x%x\n",val16);
500
501        /*
502         * Figure out which we should try first - memory mapping or i/o mapping?
503         * We default to memory mapping. Then we accept an override from the
504         * command line. Then we check to see which one is enabled.
505         */
506#ifdef NOTUSED
507        m1 = PCI_COMMAND_MEMORY;
508        m2 = PCI_COMMAND_IO;
509        prefer_iomap = 0;
510        if (resource_int_value(device_get_name(dev), device_get_unit(dev),
511            "prefer_iomap", &prefer_iomap) == 0 && prefer_iomap != 0) {
512                m1 = PCI_COMMAND_IO;
513                m2 = PCI_COMMAND_MEMORY;
514        }
515
516        if (val & m1) {
517                sc->rtp = ((m1 == PCI_COMMAND_MEMORY)
518                           ? SYS_RES_MEMORY : SYS_RES_IOPORT);
519                sc->rgd = ((m1 == PCI_COMMAND_MEMORY)
520                           ? FXP_PCI_MMBA   : FXP_PCI_IOBA);
521                sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd,
522                                             0, ~0, 1, RF_ACTIVE);
523        }
524        if (sc->mem == NULL && (val & m2)) {
525                sc->rtp = ((m2 == PCI_COMMAND_MEMORY)
526                           ? SYS_RES_MEMORY : SYS_RES_IOPORT);
527                sc->rgd = ((m2 == PCI_COMMAND_MEMORY)
528                           ? FXP_PCI_MMBA : FXP_PCI_IOBA);
529                sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd,
530                                            0, ~0, 1, RF_ACTIVE);
531        }
532
533        if (!sc->mem) {
534                device_printf(dev, "could not map device registers\n");
535                error = ENXIO;
536                goto fail;
537        }
538        if (fxp_is_verbose) {
539                device_printf(dev, "using %s space register mapping\n",
540                   sc->rtp == SYS_RES_MEMORY? "memory" : "I/O");
541        }
542
543        sc->sc_st = rman_get_bustag(sc->mem);
544        sc->sc_sh = rman_get_bushandle(sc->mem);
545
546        /*
547         * Allocate our interrupt.
548         */
549        rid = 0;
550        sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
551                                 RF_SHAREABLE | RF_ACTIVE);
552        if (sc->irq == NULL) {
553                device_printf(dev, "could not map interrupt\n");
554                error = ENXIO;
555                goto fail;
556        }
557
558        error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET,
559                               fxp_intr, sc, &sc->ih);
560        if (error) {
561                device_printf(dev, "could not setup irq\n");
562                goto fail;
563        }
564#endif
565
566        /*
567         * get mapping and base address of registers
568         */
569        pcib_conf_read16(sc->pci_signature, PCI_COMMAND,&val16);
570        DBGLVL_PRINTK(4,"fxp_attach: PCI_COMMAND_read  = 0x%x\n",val16);
571        if((val16 & PCI_COMMAND_IO) != 0) {
572          sc->pci_regs_are_io = TRUE;
573          pcib_conf_read32(sc->pci_signature,
574                           PCI_BASE_ADDRESS_1,
575                           &val32);
576          sc->pci_regs_base = val32 & PCI_BASE_ADDRESS_IO_MASK;
577        }
578        else {
579          sc->pci_regs_are_io = FALSE;
580          pcib_conf_read32(sc->pci_signature,
581                           PCI_BASE_ADDRESS_0,
582                           &val32);
583          sc->pci_regs_base = val32 & PCI_BASE_ADDRESS_MEM_MASK;
584        }
585        DBGLVL_PRINTK(3,"fxp_attach: CSR registers are mapped in %s space"
586                      " at address 0x%x\n",
587                      sc->pci_regs_are_io ? "I/O" : "MEM",
588                      sc->pci_regs_base);
589
590        /*
591         * get interrupt level to be used
592         */
593        pcib_conf_read8(sc->pci_signature, 60, &interrupt);
594        DBGLVL_PRINTK(3,"fxp_attach: interrupt = 0x%x\n",interrupt);
595        sc->irqInfo.name = (rtems_irq_symbolic_name)interrupt;
596        /*
597         * Set up interrupts
598         */
599        sc->irqInfo.hdl = (rtems_irq_hdl)fxp_intr;
600        sc->irqInfo.on  = nopOn;
601        sc->irqInfo.off = nopOn;
602        sc->irqInfo.isOn = fxpIsOn;
603        s = BSP_install_rtems_irq_handler (&sc->irqInfo);
604        if (!s)
605          rtems_panic ("Can't attach fxp interrupt handler for irq %d\n",
606                       sc->irqInfo.name);
607        /*
608         * Reset to a stable state.
609        CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
610         */
611        CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
612        DELAY(10);
613
614        sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB,
615            M_DEVBUF, M_NOWAIT);
616        DBGLVL_PRINTK(3,"fxp_attach: sc->cbl_base = 0x%x\n",sc->cbl_base);
617        if (sc->cbl_base == NULL)
618                goto failmem;
619        else
620                memset(sc->cbl_base, 0, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
621
622        sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF,
623            M_NOWAIT);
624        DBGLVL_PRINTK(3,"fxp_attach: sc->fxp_stats = 0x%x\n",sc->fxp_stats);
625        if (sc->fxp_stats == NULL)
626                goto failmem;
627        else
628                memset(sc->fxp_stats, 0, sizeof(struct fxp_stats));
629
630        sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT);
631        DBGLVL_PRINTK(3,"fxp_attach: sc->mcsp = 0x%x\n",sc->mcsp);
632        if (sc->mcsp == NULL)
633                goto failmem;
634
635        /*
636         * Pre-allocate our receive buffers.
637         */
638        for (i = 0; i < FXP_NRFABUFS; i++) {
639                if (fxp_add_rfabuf(sc, NULL) != 0) {
640                        goto failmem;
641                }
642        }
643
644        /*
645         * Find out how large of an SEEPROM we have.
646         */
647        DBGLVL_PRINTK(3,"fxp_attach: calling fxp_autosize_eeprom\n");
648        fxp_autosize_eeprom(sc);
649
650        /*
651         * Determine whether we must use the 503 serial interface.
652         */
653        fxp_read_eeprom(sc, &data, 6, 1);
654        if ((data & FXP_PHY_DEVICE_MASK) != 0 &&
655            (data & FXP_PHY_SERIAL_ONLY))
656                sc->flags |= FXP_FLAG_SERIAL_MEDIA;
657
658        /*
659         * Find out the basic controller type; we currently only
660         * differentiate between a 82557 and greater.
661         */
662        fxp_read_eeprom(sc, &data, 5, 1);
663        if ((data >> 8) == 1)
664                sc->chip = FXP_CHIP_82557;
665        DBGLVL_PRINTK(3,"fxp_attach: sc->chip = %d\n",sc->chip);
666
667        /*
668         * Enable workarounds for certain chip revision deficiencies.
669         *
670         * Systems based on the ICH2/ICH2-M chip from Intel have a defect
671         * where the chip can cause a PCI protocol violation if it receives
672         * a CU_RESUME command when it is entering the IDLE state.  The
673         * workaround is to disable Dynamic Standby Mode, so the chip never
674         * deasserts CLKRUN#, and always remains in an active state.
675         *
676         * See Intel 82801BA/82801BAM Specification Update, Errata #30.
677         */
678#ifdef NOTUSED
679        i = pci_get_device(dev);
680#else
681        pcib_conf_read16(sc->pci_signature,2,&dev_id);
682        DBGLVL_PRINTK(3,"fxp_attach: device id = 0x%x\n",dev_id);
683#endif
684        if (dev_id == 0x2449 || (dev_id > 0x1030 && dev_id < 0x1039)) {
685        device_printf(dev, "*** See Intel 82801BA/82801BAM Specification Update, Errata #30. ***\n");
686                fxp_read_eeprom(sc, &data, 10, 1);
687                if (data & 0x02) {                      /* STB enable */
688                        u_int16_t cksum;
689                        int i;
690
691                        device_printf(dev,
692                    "*** DISABLING DYNAMIC STANDBY MODE IN EEPROM ***\n");
693                        data &= ~0x02;
694                        fxp_write_eeprom(sc, &data, 10, 1);
695                        device_printf(dev, "New EEPROM ID: 0x%x\n", data);
696                        cksum = 0;
697                        for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) {
698                                fxp_read_eeprom(sc, &data, i, 1);
699                                cksum += data;
700                        }
701                        i = (1 << sc->eeprom_size) - 1;
702                        cksum = 0xBABA - cksum;
703                        fxp_read_eeprom(sc, &data, i, 1);
704                        fxp_write_eeprom(sc, &cksum, i, 1);
705                        device_printf(dev,
706                            "EEPROM checksum @ 0x%x: 0x%x -> 0x%x\n",
707                            i, data, cksum);
708                        /*
709                         * We need to do a full PCI reset here.  A software
710                         * reset to the port doesn't cut it, but let's try
711                         * anyway.
712                         */
713                        CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
714                        DELAY(50);
715                        device_printf(dev,
716            "*** PLEASE REBOOT THE SYSTEM NOW FOR CORRECT OPERATION ***\n");
717#if 1
718                        /*
719                         * If the user elects to continue, try the software
720                         * workaround, as it is better than nothing.
721                         */
722                        sc->flags |= FXP_FLAG_CU_RESUME_BUG;
723#endif
724                }
725        }
726
727        /*
728         * If we are not a 82557 chip, we can enable extended features.
729         */
730        if (sc->chip != FXP_CHIP_82557) {
731          u_int8_t tmp_val;
732                /*
733                 * If MWI is enabled in the PCI configuration, and there
734                 * is a valid cacheline size (8 or 16 dwords), then tell
735                 * the board to turn on MWI.
736                 */
737                pcib_conf_read8(sc->pci_signature,
738                                PCI_CACHE_LINE_SIZE,&tmp_val);
739                DBGLVL_PRINTK(3,"fxp_attach: CACHE_LINE_SIZE = %d\n",tmp_val);
740                if (val16 & PCI_COMMAND_MEMORY &&
741                    tmp_val != 0)
742                        sc->flags |= FXP_FLAG_MWI_ENABLE;
743
744                /* turn on the extended TxCB feature */
745                sc->flags |= FXP_FLAG_EXT_TXCB;
746
747                /* enable reception of long frames for VLAN */
748                sc->flags |= FXP_FLAG_LONG_PKT_EN;
749                DBGLVL_PRINTK(3,"fxp_attach: sc->flags = 0x%x\n",
750                              sc->flags);
751        }
752
753        /*
754         * Read MAC address.
755         */
756        fxp_read_eeprom(sc, (u_int16_t*)sc->arpcom.ac_enaddr, 0, 3);
757        if (fxp_is_verbose) {
758            device_printf(dev, "Ethernet address %x:%x:%x:%x:%x:%x %s \n",
759                ((u_int8_t*)sc->arpcom.ac_enaddr)[0],
760                ((u_int8_t*)sc->arpcom.ac_enaddr)[1],
761            ((u_int8_t*)sc->arpcom.ac_enaddr)[2],
762            ((u_int8_t*)sc->arpcom.ac_enaddr)[3],
763            ((u_int8_t*)sc->arpcom.ac_enaddr)[4],
764            ((u_int8_t*)sc->arpcom.ac_enaddr)[5],
765            sc->flags & FXP_FLAG_SERIAL_MEDIA ? ", 10Mbps" : "");
766                device_printf(dev, "PCI IDs: 0x%x 0x%x 0x%x 0x%x 0x%x\n",
767                    pci_get_vendor(sc), pci_get_device(sc),
768                    pci_get_subvendor(sc), pci_get_subdevice(sc),
769                    pci_get_revid(sc));
770                device_printf(dev, "Chip Type: %d\n", sc->chip);
771        }
772
773#ifdef NOTUSED /* do not set up interface at all... */
774        /*
775         * If this is only a 10Mbps device, then there is no MII, and
776         * the PHY will use a serial interface instead.
777         *
778         * The Seeq 80c24 AutoDUPLEX(tm) Ethernet Interface Adapter
779         * doesn't have a programming interface of any sort.  The
780         * media is sensed automatically based on how the link partner
781         * is configured.  This is, in essence, manual configuration.
782         */
783        if (sc->flags & FXP_FLAG_SERIAL_MEDIA) {
784                ifmedia_init(&sc->sc_media, 0, fxp_serial_ifmedia_upd,
785                    fxp_serial_ifmedia_sts);
786                ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
787                ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
788        } else {
789                if (mii_phy_probe(dev, &sc->miibus, fxp_ifmedia_upd,
790                    fxp_ifmedia_sts)) {
791                        device_printf(dev, "MII without any PHY!\n");
792                        error = ENXIO;
793                        goto fail;
794                }
795        }
796#endif
797        if (config->mtu)
798                mtu = config->mtu;
799        else
800                mtu = ETHERMTU;
801
802        ifp->if_softc = sc;
803        ifp->if_unit = unitNumber;
804        ifp->if_name = unitName;
805        ifp->if_mtu  = mtu;
806        ifp->if_baudrate = 100000000;
807        ifp->if_init = fxp_init;
808        ifp->if_ioctl = fxp_ioctl;
809        ifp->if_start = fxp_start;
810        ifp->if_output = ether_output;
811        ifp->if_watchdog = fxp_watchdog;
812        ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX /*| IFF_MULTICAST*/;
813        if (ifp->if_snd.ifq_maxlen == 0)
814                ifp->if_snd.ifq_maxlen = ifqmaxlen;
815
816        /*
817         * Attach the interface.
818         */
819        DBGLVL_PRINTK(3,"fxp_attach: calling if_attach\n");
820        if_attach (ifp);
821        DBGLVL_PRINTK(3,"fxp_attach: calling ether_if_attach\n");
822        ether_ifattach(ifp);
823        DBGLVL_PRINTK(3,"fxp_attach: return from ether_if_attach\n");
824
825#ifdef NOTUSED
826        /*
827         * Tell the upper layer(s) we support long frames.
828         */
829        ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
830#endif
831        /*
832         * Let the system queue as many packets as we have available
833         * TX descriptors.
834         */
835        ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1;
836
837        splx(s);
838        return (0);
839
840failmem:
841        device_printf(dev, "Failed to malloc memory\n");
842        error = ENOMEM;
843#ifdef NOTUSED
844fail:
845#endif
846        splx(s);
847        fxp_release(sc);
848        return (error);
849}
850
851/*
852 * release all resources
853 */
854static void
855fxp_release(struct fxp_softc *sc)
856{
857
858#ifdef NOTUSED
859        bus_generic_detach(sc->dev);
860        if (sc->miibus)
861                device_delete_child(sc->dev, sc->miibus);
862#endif
863        if (sc->cbl_base)
864                free(sc->cbl_base, M_DEVBUF);
865        if (sc->fxp_stats)
866                free(sc->fxp_stats, M_DEVBUF);
867        if (sc->mcsp)
868                free(sc->mcsp, M_DEVBUF);
869        if (sc->rfa_headm)
870                m_freem(sc->rfa_headm);
871
872#ifdef NOTUSED
873        if (sc->ih)
874                bus_teardown_intr(sc->dev, sc->irq, sc->ih);
875        if (sc->irq)
876                bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq);
877        if (sc->mem)
878                bus_release_resource(sc->dev, sc->rtp, sc->rgd, sc->mem);
879        mtx_destroy(&sc->sc_mtx);
880#endif
881}
882
883#if NOTUSED
884/*
885 * Detach interface.
886 */
887static int
888fxp_detach(device_t dev)
889{
890        struct fxp_softc *sc = device_get_softc(dev);
891        int s;
892
893        /* disable interrupts */
894        CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE);
895
896        s = splimp();
897
898        /*
899         * Stop DMA and drop transmit queue.
900         */
901        fxp_stop(sc);
902
903        /*
904         * Close down routes etc.
905         */
906        ether_ifdetach(&sc->arpcom.ac_if, ETHER_BPF_SUPPORTED);
907
908        /*
909         * Free all media structures.
910         */
911        ifmedia_removeall(&sc->sc_media);
912
913        splx(s);
914
915        /* Release our allocated resources. */
916        fxp_release(sc);
917
918        return (0);
919}
920
921/*
922 * Device shutdown routine. Called at system shutdown after sync. The
923 * main purpose of this routine is to shut off receiver DMA so that
924 * kernel memory doesn't get clobbered during warmboot.
925 */
926static int
927fxp_shutdown(device_t dev)
928{
929        /*
930         * Make sure that DMA is disabled prior to reboot. Not doing
931         * do could allow DMA to corrupt kernel memory during the
932         * reboot before the driver initializes.
933         */
934        fxp_stop((struct fxp_softc *) device_get_softc(dev));
935        return (0);
936}
937#endif
938
939/*
940 * Show interface statistics
941 */
942static void
943fxp_stats(struct fxp_softc *sc)
944{
945        struct ifnet *ifp = &sc->sc_if;
946
947        printf ("   Output packets:%-8lu", ifp->if_opackets);
948        printf ("    Collisions:%-8lu", ifp->if_collisions);
949        printf (" Output errors:%-8lu\n", ifp->if_oerrors);
950        printf ("    Input packets:%-8lu", ifp->if_ipackets);
951        printf ("  Input errors:%-8lu\n", ifp->if_ierrors);
952}
953
954static void
955fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length)
956{
957        u_int16_t reg;
958        int x;
959
960        /*
961         * Shift in data.
962         */
963        for (x = 1 << (length - 1); x; x >>= 1) {
964                if (data & x)
965                        reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
966                else
967                        reg = FXP_EEPROM_EECS;
968                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
969                DELAY(1);
970                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK);
971                DELAY(1);
972                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
973                DELAY(1);
974        }
975}
976
977/*
978 * Read from the serial EEPROM. Basically, you manually shift in
979 * the read opcode (one bit at a time) and then shift in the address,
980 * and then you shift out the data (all of this one bit at a time).
981 * The word size is 16 bits, so you have to provide the address for
982 * every 16 bits of data.
983 */
984static u_int16_t
985fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize)
986{
987        u_int16_t reg, data;
988        int x;
989
990        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
991        /*
992         * Shift in read opcode.
993         */
994        fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_READ, 3);
995        /*
996         * Shift in address.
997         */
998        data = 0;
999        for (x = 1 << (sc->eeprom_size - 1); x; x >>= 1) {
1000                if (offset & x)
1001                        reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
1002                else
1003                        reg = FXP_EEPROM_EECS;
1004                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
1005                DELAY(1);
1006                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK);
1007                DELAY(1);
1008                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
1009                DELAY(1);
1010                reg = CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO;
1011                data++;
1012                if (autosize && reg == 0) {
1013                        sc->eeprom_size = data;
1014                        break;
1015                }
1016        }
1017        /*
1018         * Shift out data.
1019         */
1020        data = 0;
1021        reg = FXP_EEPROM_EECS;
1022        for (x = 1 << 15; x; x >>= 1) {
1023                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK);
1024                DELAY(1);
1025                if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO)
1026                        data |= x;
1027                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
1028                DELAY(1);
1029        }
1030        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1031        DELAY(1);
1032
1033        return (data);
1034}
1035
1036static void
1037fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data)
1038{
1039        int i;
1040
1041        /*
1042         * Erase/write enable.
1043         */
1044        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
1045        fxp_eeprom_shiftin(sc, 0x4, 3);
1046        fxp_eeprom_shiftin(sc, 0x03 << (sc->eeprom_size - 2), sc->eeprom_size);
1047        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1048        DELAY(1);
1049        /*
1050         * Shift in write opcode, address, data.
1051         */
1052        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
1053        fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_WRITE, 3);
1054        fxp_eeprom_shiftin(sc, offset, sc->eeprom_size);
1055        fxp_eeprom_shiftin(sc, data, 16);
1056        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1057        DELAY(1);
1058        /*
1059         * Wait for EEPROM to finish up.
1060         */
1061        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
1062        DELAY(1);
1063        for (i = 0; i < 1000; i++) {
1064                if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO)
1065                        break;
1066                DELAY(50);
1067        }
1068        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1069        DELAY(1);
1070        /*
1071         * Erase/write disable.
1072         */
1073        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
1074        fxp_eeprom_shiftin(sc, 0x4, 3);
1075        fxp_eeprom_shiftin(sc, 0, sc->eeprom_size);
1076        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1077        DELAY(1);
1078}
1079
1080/*
1081 * From NetBSD:
1082 *
1083 * Figure out EEPROM size.
1084 *
1085 * 559's can have either 64-word or 256-word EEPROMs, the 558
1086 * datasheet only talks about 64-word EEPROMs, and the 557 datasheet
1087 * talks about the existance of 16 to 256 word EEPROMs.
1088 *
1089 * The only known sizes are 64 and 256, where the 256 version is used
1090 * by CardBus cards to store CIS information.
1091 *
1092 * The address is shifted in msb-to-lsb, and after the last
1093 * address-bit the EEPROM is supposed to output a `dummy zero' bit,
1094 * after which follows the actual data. We try to detect this zero, by
1095 * probing the data-out bit in the EEPROM control register just after
1096 * having shifted in a bit. If the bit is zero, we assume we've
1097 * shifted enough address bits. The data-out should be tri-state,
1098 * before this, which should translate to a logical one.
1099 */
1100static void
1101fxp_autosize_eeprom(struct fxp_softc *sc)
1102{
1103
1104        /* guess maximum size of 256 words */
1105        sc->eeprom_size = 8;
1106
1107        /* autosize */
1108        (void) fxp_eeprom_getword(sc, 0, 1);
1109}
1110
1111static void
1112fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
1113{
1114        int i;
1115
1116        for (i = 0; i < words; i++) {
1117                data[i] = fxp_eeprom_getword(sc, offset + i, 0);
1118                DBGLVL_PRINTK(4,"fxp_eeprom_read(off=0x%x)=0x%x\n",
1119                              offset+i,data[i]);
1120        }
1121}
1122
1123static void
1124fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
1125{
1126        int i;
1127
1128        for (i = 0; i < words; i++)
1129                fxp_eeprom_putword(sc, offset + i, data[i]);
1130                DBGLVL_PRINTK(4,"fxp_eeprom_write(off=0x%x,0x%x)\n",
1131                              offset+i,data[i]);
1132}
1133
1134/*
1135 * Start packet transmission on the interface.
1136 */
1137static void
1138fxp_start(struct ifnet *ifp)
1139{
1140        struct fxp_softc *sc = ifp->if_softc;
1141        struct fxp_cb_tx *txp;
1142
1143        DBGLVL_PRINTK(3,"fxp_start called\n");
1144
1145        /*
1146         * See if we need to suspend xmit until the multicast filter
1147         * has been reprogrammed (which can only be done at the head
1148         * of the command chain).
1149         */
1150        if (sc->need_mcsetup) {
1151                return;
1152        }
1153
1154        txp = NULL;
1155
1156        /*
1157         * We're finished if there is nothing more to add to the list or if
1158         * we're all filled up with buffers to transmit.
1159         * NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add
1160         *       a NOP command when needed.
1161         */
1162        while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB - 1) {
1163                struct mbuf *m, *mb_head;
1164                int segment;
1165
1166                /*
1167                 * Grab a packet to transmit.
1168                 */
1169                IF_DEQUEUE(&ifp->if_snd, mb_head);
1170
1171                /*
1172                 * Get pointer to next available tx desc.
1173                 */
1174                txp = sc->cbl_last->next;
1175
1176                /*
1177                 * Go through each of the mbufs in the chain and initialize
1178                 * the transmit buffer descriptors with the physical address
1179                 * and size of the mbuf.
1180                 */
1181tbdinit:
1182                for (m = mb_head, segment = 0; m != NULL; m = m->m_next) {
1183                        if (m->m_len != 0) {
1184                                if (segment == FXP_NTXSEG)
1185                                        break;
1186                                txp->tbd[segment].tb_addr =
1187                                    vtophys(mtod(m, vm_offset_t));
1188                                txp->tbd[segment].tb_size = m->m_len;
1189                                segment++;
1190                        }
1191                }
1192                if (m != NULL) {
1193                        struct mbuf *mn;
1194
1195                        /*
1196                         * We ran out of segments. We have to recopy this
1197                         * mbuf chain first. Bail out if we can't get the
1198                         * new buffers.
1199                         */
1200                        MGETHDR(mn, M_DONTWAIT, MT_DATA);
1201                        if (mn == NULL) {
1202                                m_freem(mb_head);
1203                                break;
1204                        }
1205                        if (mb_head->m_pkthdr.len > MHLEN) {
1206                                MCLGET(mn, M_DONTWAIT);
1207                                if ((mn->m_flags & M_EXT) == 0) {
1208                                        m_freem(mn);
1209                                        m_freem(mb_head);
1210                                        break;
1211                                }
1212                        }
1213                        m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
1214                            mtod(mn, caddr_t));
1215                        mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
1216                        m_freem(mb_head);
1217                        mb_head = mn;
1218                        goto tbdinit;
1219                }
1220
1221                txp->tbd_number = segment;
1222                txp->mb_head = mb_head;
1223                txp->cb_status = 0;
1224                if (sc->tx_queued != FXP_CXINT_THRESH - 1) {
1225                        txp->cb_command =
1226                            FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF |
1227                            FXP_CB_COMMAND_S;
1228                } else {
1229                        txp->cb_command =
1230                            FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF |
1231                            FXP_CB_COMMAND_S | FXP_CB_COMMAND_I;
1232                        /*
1233                         * Set a 5 second timer just in case we don't hear
1234                         * from the card again.
1235                         */
1236                        ifp->if_timer = 5;
1237                }
1238                txp->tx_threshold = tx_threshold;
1239
1240                /*
1241                 * Advance the end of list forward.
1242                 */
1243
1244#ifdef __alpha__
1245                /*
1246                 * On platforms which can't access memory in 16-bit
1247                 * granularities, we must prevent the card from DMA'ing
1248                 * up the status while we update the command field.
1249                 * This could cause us to overwrite the completion status.
1250                 */
1251                atomic_clear_short(&sc->cbl_last->cb_command,
1252                    FXP_CB_COMMAND_S);
1253#else
1254                sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
1255#endif /*__alpha__*/
1256                sc->cbl_last = txp;
1257
1258                /*
1259                 * Advance the beginning of the list forward if there are
1260                 * no other packets queued (when nothing is queued, cbl_first
1261                 * sits on the last TxCB that was sent out).
1262                 */
1263                if (sc->tx_queued == 0)
1264                        sc->cbl_first = txp;
1265
1266                sc->tx_queued++;
1267
1268#ifdef NOTUSED
1269                /*
1270                 * Pass packet to bpf if there is a listener.
1271                 */
1272                if (ifp->if_bpf)
1273                        bpf_mtap(ifp, mb_head);
1274#endif
1275        }
1276
1277        /*
1278         * We're finished. If we added to the list, issue a RESUME to get DMA
1279         * going again if suspended.
1280         */
1281        if (txp != NULL) {
1282                fxp_scb_wait(sc);
1283                fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME);
1284        }
1285}
1286
1287/*
1288 * Process interface interrupts.
1289 */
1290static rtems_isr fxp_intr(rtems_vector_number v)
1291{
1292  /*
1293   * FIXME: currently only works with one interface...
1294   */
1295  struct fxp_softc *sc = &(fxp_softc[0]);
1296
1297  /*
1298   * disable interrupts
1299   */
1300  CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE);
1301  /*
1302   * send event to deamon
1303   */
1304  rtems_event_send (sc->daemonTid, INTERRUPT_EVENT);
1305}
1306
1307static void fxp_daemon(void *xsc)
1308{
1309        struct fxp_softc *sc = xsc;
1310        struct ifnet *ifp = &sc->sc_if;
1311        u_int8_t statack;
1312        rtems_event_set events;
1313        rtems_interrupt_level level;
1314
1315#ifdef NOTUSED
1316        if (sc->suspended) {
1317                return;
1318        }
1319#endif
1320        for (;;) {
1321
1322        DBGLVL_PRINTK(4,"fxp_daemon waiting for event\n");
1323          /*
1324           * wait for event to receive from interrupt function
1325           */
1326          rtems_bsdnet_event_receive (INTERRUPT_EVENT,
1327                                      RTEMS_WAIT|RTEMS_EVENT_ANY,
1328                                      RTEMS_NO_TIMEOUT,
1329                                      &events);
1330          while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) {
1331            DBGLVL_PRINTK(4,"fxp_daemon: processing event, statack = 0x%x\n",
1332                          statack);
1333#ifdef NOTUSED
1334                /*
1335                 * It should not be possible to have all bits set; the
1336                 * FXP_SCB_INTR_SWI bit always returns 0 on a read.  If
1337                 * all bits are set, this may indicate that the card has
1338                 * been physically ejected, so ignore it.
1339                 */
1340                if (statack == 0xff)
1341                        return;
1342#endif
1343
1344                /*
1345                 * First ACK all the interrupts in this pass.
1346                 */
1347                CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
1348
1349                /*
1350                 * Free any finished transmit mbuf chains.
1351                 *
1352                 * Handle the CNA event likt a CXTNO event. It used to
1353                 * be that this event (control unit not ready) was not
1354                 * encountered, but it is now with the SMPng modifications.
1355                 * The exact sequence of events that occur when the interface
1356                 * is brought up are different now, and if this event
1357                 * goes unhandled, the configuration/rxfilter setup sequence
1358                 * can stall for several seconds. The result is that no
1359                 * packets go out onto the wire for about 5 to 10 seconds
1360                 * after the interface is ifconfig'ed for the first time.
1361                 */
1362                if (statack & (FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA)) {
1363                        struct fxp_cb_tx *txp;
1364
1365                        for (txp = sc->cbl_first; sc->tx_queued &&
1366                            (txp->cb_status & FXP_CB_STATUS_C) != 0;
1367                            txp = txp->next) {
1368                                if (txp->mb_head != NULL) {
1369                                        m_freem(txp->mb_head);
1370                                        txp->mb_head = NULL;
1371                                }
1372                                sc->tx_queued--;
1373                        }
1374                        sc->cbl_first = txp;
1375                        ifp->if_timer = 0;
1376                        if (sc->tx_queued == 0) {
1377                                if (sc->need_mcsetup)
1378                                        fxp_mc_setup(sc);
1379                        }
1380                        /*
1381                         * Try to start more packets transmitting.
1382                         */
1383                        if (ifp->if_snd.ifq_head != NULL)
1384                                fxp_start(ifp);
1385                }
1386                /*
1387                 * Process receiver interrupts. If a no-resource (RNR)
1388                 * condition exists, get whatever packets we can and
1389                 * re-start the receiver.
1390                 */
1391                if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) {
1392                        struct mbuf *m;
1393                        struct fxp_rfa *rfa;
1394rcvloop:
1395                        m = sc->rfa_headm;
1396                        rfa = (struct fxp_rfa *)(m->m_ext.ext_buf +
1397                            RFA_ALIGNMENT_FUDGE);
1398
1399                        if (rfa->rfa_status & FXP_RFA_STATUS_C) {
1400                                /*
1401                                 * Remove first packet from the chain.
1402                                 */
1403                                sc->rfa_headm = m->m_next;
1404                                m->m_next = NULL;
1405
1406                                /*
1407                                 * Add a new buffer to the receive chain.
1408                                 * If this fails, the old buffer is recycled
1409                                 * instead.
1410                                 */
1411                                if (fxp_add_rfabuf(sc, m) == 0) {
1412                                        struct ether_header *eh;
1413                                        int total_len;
1414
1415                                        total_len = rfa->actual_size &
1416                                            (MCLBYTES - 1);
1417                                        if (total_len <
1418                                            sizeof(struct ether_header)) {
1419                                                m_freem(m);
1420                                                goto rcvloop;
1421                                        }
1422
1423                                        /*
1424                                         * Drop the packet if it has CRC
1425                                         * errors.  This test is only needed
1426                                         * when doing 802.1q VLAN on the 82557
1427                                         * chip.
1428                                         */
1429                                        if (rfa->rfa_status &
1430                                            FXP_RFA_STATUS_CRC) {
1431                                                m_freem(m);
1432                                                goto rcvloop;
1433                                        }
1434
1435                                        m->m_pkthdr.rcvif = ifp;
1436                                        m->m_pkthdr.len = m->m_len = total_len;
1437                                        eh = mtod(m, struct ether_header *);
1438                                        m->m_data +=
1439                                            sizeof(struct ether_header);
1440                                        m->m_len -=
1441                                            sizeof(struct ether_header);
1442                                        m->m_pkthdr.len = m->m_len;
1443                                        ether_input(ifp, eh, m);
1444                                }
1445                                goto rcvloop;
1446                        }
1447                        if (statack & FXP_SCB_STATACK_RNR) {
1448                                fxp_scb_wait(sc);
1449                                CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
1450                                    vtophys(sc->rfa_headm->m_ext.ext_buf) +
1451                                        RFA_ALIGNMENT_FUDGE);
1452                                fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START);
1453                        }
1454                }
1455          }
1456          /*
1457           * reenable interrupts
1458           */
1459          rtems_interrupt_disable (level);
1460          CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL,0);
1461          rtems_interrupt_enable (level);
1462        }
1463}
1464
1465/*
1466 * Update packet in/out/collision statistics. The i82557 doesn't
1467 * allow you to access these counters without doing a fairly
1468 * expensive DMA to get _all_ of the statistics it maintains, so
1469 * we do this operation here only once per second. The statistics
1470 * counters in the kernel are updated from the previous dump-stats
1471 * DMA and then a new dump-stats DMA is started. The on-chip
1472 * counters are zeroed when the DMA completes. If we can't start
1473 * the DMA immediately, we don't wait - we just prepare to read
1474 * them again next time.
1475 */
1476static void
1477fxp_tick(void *xsc)
1478{
1479        struct fxp_softc *sc = xsc;
1480        struct ifnet *ifp = &sc->sc_if;
1481        struct fxp_stats *sp = sc->fxp_stats;
1482        struct fxp_cb_tx *txp;
1483        int s;
1484
1485        DBGLVL_PRINTK(4,"fxp_tick called\n");
1486
1487        ifp->if_opackets += sp->tx_good;
1488        ifp->if_collisions += sp->tx_total_collisions;
1489        if (sp->rx_good) {
1490                ifp->if_ipackets += sp->rx_good;
1491                sc->rx_idle_secs = 0;
1492        } else {
1493                /*
1494                 * Receiver's been idle for another second.
1495                 */
1496                sc->rx_idle_secs++;
1497        }
1498        ifp->if_ierrors +=
1499            sp->rx_crc_errors +
1500            sp->rx_alignment_errors +
1501            sp->rx_rnr_errors +
1502            sp->rx_overrun_errors;
1503        /*
1504         * If any transmit underruns occured, bump up the transmit
1505         * threshold by another 512 bytes (64 * 8).
1506         */
1507        if (sp->tx_underruns) {
1508                ifp->if_oerrors += sp->tx_underruns;
1509                if (tx_threshold < 192)
1510                        tx_threshold += 64;
1511        }
1512        s = splimp();
1513        /*
1514         * Release any xmit buffers that have completed DMA. This isn't
1515         * strictly necessary to do here, but it's advantagous for mbufs
1516         * with external storage to be released in a timely manner rather
1517         * than being defered for a potentially long time. This limits
1518         * the delay to a maximum of one second.
1519         */
1520        for (txp = sc->cbl_first; sc->tx_queued &&
1521            (txp->cb_status & FXP_CB_STATUS_C) != 0;
1522            txp = txp->next) {
1523                if (txp->mb_head != NULL) {
1524                        m_freem(txp->mb_head);
1525                        txp->mb_head = NULL;
1526                }
1527                sc->tx_queued--;
1528        }
1529        sc->cbl_first = txp;
1530        /*
1531         * If we haven't received any packets in FXP_MAC_RX_IDLE seconds,
1532         * then assume the receiver has locked up and attempt to clear
1533         * the condition by reprogramming the multicast filter. This is
1534         * a work-around for a bug in the 82557 where the receiver locks
1535         * up if it gets certain types of garbage in the syncronization
1536         * bits prior to the packet header. This bug is supposed to only
1537         * occur in 10Mbps mode, but has been seen to occur in 100Mbps
1538         * mode as well (perhaps due to a 10/100 speed transition).
1539         */
1540        if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) {
1541                sc->rx_idle_secs = 0;
1542                fxp_mc_setup(sc);
1543        }
1544        /*
1545         * If there is no pending command, start another stats
1546         * dump. Otherwise punt for now.
1547         */
1548        if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) {
1549                /*
1550                 * Start another stats dump.
1551                 */
1552                fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMPRESET);
1553        } else {
1554                /*
1555                 * A previous command is still waiting to be accepted.
1556                 * Just zero our copy of the stats and wait for the
1557                 * next timer event to update them.
1558                 */
1559                sp->tx_good = 0;
1560                sp->tx_underruns = 0;
1561                sp->tx_total_collisions = 0;
1562
1563                sp->rx_good = 0;
1564                sp->rx_crc_errors = 0;
1565                sp->rx_alignment_errors = 0;
1566                sp->rx_rnr_errors = 0;
1567                sp->rx_overrun_errors = 0;
1568        }
1569#ifdef NOTUSED
1570        if (sc->miibus != NULL)
1571                mii_tick(device_get_softc(sc->miibus));
1572#endif
1573        splx(s);
1574        /*
1575         * Schedule another timeout one second from now.
1576         */
1577        if (sc->stat_ch == fxp_timeout_running) {
1578          timeout(fxp_tick, sc, hz);
1579        }
1580        else if (sc->stat_ch == fxp_timeout_stop_rq) {
1581          sc->stat_ch = fxp_timeout_stopped;
1582        }
1583}
1584
1585/*
1586 * Stop the interface. Cancels the statistics updater and resets
1587 * the interface.
1588 */
1589static void
1590fxp_stop(struct fxp_softc *sc)
1591{
1592        struct ifnet *ifp = &sc->sc_if;
1593        struct fxp_cb_tx *txp;
1594        int i;
1595
1596        DBGLVL_PRINTK(2,"fxp_stop called\n");
1597
1598        ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1599        ifp->if_timer = 0;
1600
1601        /*
1602         * stop stats updater.
1603         */
1604        if (sc->stat_ch == fxp_timeout_running) {
1605          DBGLVL_PRINTK(3,"fxp_stop: trying to stop stat update tick\n");
1606          sc->stat_ch = fxp_timeout_stop_rq;
1607          while(sc->stat_ch != fxp_timeout_stopped) {
1608            rtems_bsdnet_semaphore_release();
1609            rtems_task_wake_after(fxp_ticksPerSecond);
1610            rtems_bsdnet_semaphore_obtain();
1611          }
1612          DBGLVL_PRINTK(3,"fxp_stop: stat update tick stopped\n");
1613        }
1614        /*
1615         * Issue software reset
1616         */
1617        DBGLVL_PRINTK(3,"fxp_stop: issue software reset\n");
1618        CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
1619        DELAY(10);
1620
1621        /*
1622         * Release any xmit buffers.
1623         */
1624        DBGLVL_PRINTK(3,"fxp_stop: releasing xmit buffers\n");
1625        txp = sc->cbl_base;
1626        if (txp != NULL) {
1627                for (i = 0; i < FXP_NTXCB; i++) {
1628                        if (txp[i].mb_head != NULL) {
1629                                m_freem(txp[i].mb_head);
1630                                txp[i].mb_head = NULL;
1631                        }
1632                }
1633        }
1634        sc->tx_queued = 0;
1635
1636        /*
1637         * Free all the receive buffers then reallocate/reinitialize
1638         */
1639        DBGLVL_PRINTK(3,"fxp_stop: free and reinit all receive buffers\n");
1640        if (sc->rfa_headm != NULL)
1641                m_freem(sc->rfa_headm);
1642        sc->rfa_headm = NULL;
1643        sc->rfa_tailm = NULL;
1644        for (i = 0; i < FXP_NRFABUFS; i++) {
1645                if (fxp_add_rfabuf(sc, NULL) != 0) {
1646                        /*
1647                         * This "can't happen" - we're at splimp()
1648                         * and we just freed all the buffers we need
1649                         * above.
1650                         */
1651                        panic("fxp_stop: no buffers!");
1652                }
1653        }
1654        DBGLVL_PRINTK(2,"fxp_stop: finished\n");
1655}
1656
1657/*
1658 * Watchdog/transmission transmit timeout handler. Called when a
1659 * transmission is started on the interface, but no interrupt is
1660 * received before the timeout. This usually indicates that the
1661 * card has wedged for some reason.
1662 */
1663static void
1664fxp_watchdog(struct ifnet *ifp)
1665{
1666        struct fxp_softc *sc = ifp->if_softc;
1667
1668        device_printf(sc->dev, "device timeout\n");
1669        ifp->if_oerrors++;
1670
1671        fxp_init(sc);
1672}
1673
1674static void
1675fxp_init(void *xsc)
1676{
1677        struct fxp_softc *sc = xsc;
1678        struct ifnet *ifp = &sc->sc_if;
1679        struct fxp_cb_config *cbp;
1680        struct fxp_cb_ias *cb_ias;
1681        struct fxp_cb_tx *txp;
1682        int i, prm, s;
1683
1684rtems_task_wake_after(100);
1685        DBGLVL_PRINTK(2,"fxp_init called\n");
1686
1687        s = splimp();
1688        /*
1689         * Cancel any pending I/O
1690         */
1691        fxp_stop(sc);
1692
1693        prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
1694
1695        DBGLVL_PRINTK(5,"fxp_init: Initializing base of CBL and RFA memory\n");
1696        /*
1697         * Initialize base of CBL and RFA memory. Loading with zero
1698         * sets it up for regular linear addressing.
1699         */
1700        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
1701        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_BASE);
1702
1703        fxp_scb_wait(sc);
1704        fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_BASE);
1705
1706        /*
1707         * Initialize base of dump-stats buffer.
1708         */
1709        DBGLVL_PRINTK(5,"fxp_init: Initializing base of dump-stats buffer\n");
1710        fxp_scb_wait(sc);
1711        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats));
1712        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMP_ADR);
1713
1714        /*
1715         * We temporarily use memory that contains the TxCB list to
1716         * construct the config CB. The TxCB list memory is rebuilt
1717         * later.
1718         */
1719        cbp = (struct fxp_cb_config *) sc->cbl_base;
1720        DBGLVL_PRINTK(5,"fxp_init: cbp = 0x%x\n",cbp);
1721
1722        /*
1723         * This memcpy is kind of disgusting, but there are a bunch of must be
1724         * zero and must be one bits in this structure and this is the easiest
1725         * way to initialize them all to proper values.
1726         */
1727        memcpy( (void *)(u_int32_t*)(volatile void *)&cbp->cb_status,
1728                fxp_cb_config_template,
1729                sizeof(fxp_cb_config_template));
1730
1731        cbp->cb_status =        0;
1732        cbp->cb_command =       FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
1733        cbp->link_addr =        -1;     /* (no) next command */
1734        cbp->byte_count =       22;     /* (22) bytes to config */
1735        cbp->rx_fifo_limit =    8;      /* rx fifo threshold (32 bytes) */
1736        cbp->tx_fifo_limit =    0;      /* tx fifo threshold (0 bytes) */
1737        cbp->adaptive_ifs =     0;      /* (no) adaptive interframe spacing */
1738        cbp->mwi_enable =       sc->flags & FXP_FLAG_MWI_ENABLE ? 1 : 0;
1739        cbp->type_enable =      0;      /* actually reserved */
1740        cbp->read_align_en =    sc->flags & FXP_FLAG_READ_ALIGN ? 1 : 0;
1741        cbp->end_wr_on_cl =     sc->flags & FXP_FLAG_WRITE_ALIGN ? 1 : 0;
1742        cbp->rx_dma_bytecount = 0;      /* (no) rx DMA max */
1743        cbp->tx_dma_bytecount = 0;      /* (no) tx DMA max */
1744        cbp->dma_mbce =         0;      /* (disable) dma max counters */
1745        cbp->late_scb =         0;      /* (don't) defer SCB update */
1746        cbp->direct_dma_dis =   1;      /* disable direct rcv dma mode */
1747        cbp->tno_int_or_tco_en =0;      /* (disable) tx not okay interrupt */
1748        cbp->ci_int =           1;      /* interrupt on CU idle */
1749        cbp->ext_txcb_dis =     sc->flags & FXP_FLAG_EXT_TXCB ? 0 : 1;
1750        cbp->ext_stats_dis =    1;      /* disable extended counters */
1751        cbp->keep_overrun_rx =  0;      /* don't pass overrun frames to host */
1752        cbp->save_bf =          sc->chip == FXP_CHIP_82557 ? 1 : prm;
1753        cbp->disc_short_rx =    !prm;   /* discard short packets */
1754        cbp->underrun_retry =   1;      /* retry mode (once) on DMA underrun */
1755        cbp->two_frames =       0;      /* do not limit FIFO to 2 frames */
1756        cbp->dyn_tbd =          0;      /* (no) dynamic TBD mode */
1757        cbp->mediatype =        sc->flags & FXP_FLAG_SERIAL_MEDIA ? 0 : 1;
1758        cbp->csma_dis =         0;      /* (don't) disable link */
1759        cbp->tcp_udp_cksum =    0;      /* (don't) enable checksum */
1760        cbp->vlan_tco =         0;      /* (don't) enable vlan wakeup */
1761        cbp->link_wake_en =     0;      /* (don't) assert PME# on link change */
1762        cbp->arp_wake_en =      0;      /* (don't) assert PME# on arp */
1763        cbp->mc_wake_en =       0;      /* (don't) enable PME# on mcmatch */
1764        cbp->nsai =             1;      /* (don't) disable source addr insert */
1765        cbp->preamble_length =  2;      /* (7 byte) preamble */
1766        cbp->loopback =         0;      /* (don't) loopback */
1767        cbp->linear_priority =  0;      /* (normal CSMA/CD operation) */
1768        cbp->linear_pri_mode =  0;      /* (wait after xmit only) */
1769        cbp->interfrm_spacing = 6;      /* (96 bits of) interframe spacing */
1770        cbp->promiscuous =      prm;    /* promiscuous mode */
1771        cbp->bcast_disable =    0;      /* (don't) disable broadcasts */
1772        cbp->wait_after_win =   0;      /* (don't) enable modified backoff alg*/
1773        cbp->ignore_ul =        0;      /* consider U/L bit in IA matching */
1774        cbp->crc16_en =         0;      /* (don't) enable crc-16 algorithm */
1775        cbp->crscdt =           sc->flags & FXP_FLAG_SERIAL_MEDIA ? 1 : 0;
1776
1777        cbp->stripping =        !prm;   /* truncate rx packet to byte count */
1778        cbp->padding =          1;      /* (do) pad short tx packets */
1779        cbp->rcv_crc_xfer =     0;      /* (don't) xfer CRC to host */
1780        cbp->long_rx_en =       sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0;
1781        cbp->ia_wake_en =       0;      /* (don't) wake up on address match */
1782        cbp->magic_pkt_dis =    0;      /* (don't) disable magic packet */
1783                                        /* must set wake_en in PMCSR also */
1784        cbp->force_fdx =        0;      /* (don't) force full duplex */
1785        cbp->fdx_pin_en =       1;      /* (enable) FDX# pin */
1786        cbp->multi_ia =         0;      /* (don't) accept multiple IAs */
1787        cbp->mc_all =           sc->flags & FXP_FLAG_ALL_MCAST ? 1 : 0;
1788
1789        DBGLVL_PRINTK(5,"fxp_init: cbp initialized\n");
1790        if (sc->chip == FXP_CHIP_82557) {
1791                /*
1792                 * The 82557 has no hardware flow control, the values
1793                 * below are the defaults for the chip.
1794                 */
1795                cbp->fc_delay_lsb =     0;
1796                cbp->fc_delay_msb =     0x40;
1797                cbp->pri_fc_thresh =    3;
1798                cbp->tx_fc_dis =        0;
1799                cbp->rx_fc_restop =     0;
1800                cbp->rx_fc_restart =    0;
1801                cbp->fc_filter =        0;
1802                cbp->pri_fc_loc =       1;
1803        } else {
1804                cbp->fc_delay_lsb =     0x1f;
1805                cbp->fc_delay_msb =     0x01;
1806                cbp->pri_fc_thresh =    3;
1807                cbp->tx_fc_dis =        0;      /* enable transmit FC */
1808                cbp->rx_fc_restop =     1;      /* enable FC restop frames */
1809                cbp->rx_fc_restart =    1;      /* enable FC restart frames */
1810                cbp->fc_filter =        !prm;   /* drop FC frames to host */
1811                cbp->pri_fc_loc =       1;      /* FC pri location (byte31) */
1812        }
1813
1814        /*
1815         * Start the config command/DMA.
1816         */
1817        DBGLVL_PRINTK(5,"fxp_init: starting config command/DMA\n");
1818        fxp_scb_wait(sc);
1819        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status));
1820        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
1821        /* ...and wait for it to complete. */
1822        fxp_dma_wait(&cbp->cb_status, sc);
1823
1824        /*
1825         * Now initialize the station address. Temporarily use the TxCB
1826         * memory area like we did above for the config CB.
1827         */
1828        DBGLVL_PRINTK(5,"fxp_init: initialize station address\n");
1829        cb_ias = (struct fxp_cb_ias *) sc->cbl_base;
1830        cb_ias->cb_status = 0;
1831        cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
1832        cb_ias->link_addr = -1;
1833        memcpy((void *)(u_int32_t*)(volatile void *)cb_ias->macaddr,
1834            sc->arpcom.ac_enaddr,
1835            sizeof(sc->arpcom.ac_enaddr));
1836
1837        /*
1838         * Start the IAS (Individual Address Setup) command/DMA.
1839         */
1840        DBGLVL_PRINTK(5,"fxp_init: start IAS command/DMA\n");
1841        fxp_scb_wait(sc);
1842        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
1843        /* ...and wait for it to complete. */
1844        fxp_dma_wait(&cb_ias->cb_status, sc);
1845
1846        /*
1847         * Initialize transmit control block (TxCB) list.
1848         */
1849
1850        DBGLVL_PRINTK(5,"fxp_init: initialize TxCB list\n");
1851        txp = sc->cbl_base;
1852        memset(txp, 0, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
1853        for (i = 0; i < FXP_NTXCB; i++) {
1854                txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
1855                txp[i].cb_command = FXP_CB_COMMAND_NOP;
1856                txp[i].link_addr =
1857                    vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status);
1858                if (sc->flags & FXP_FLAG_EXT_TXCB)
1859                        txp[i].tbd_array_addr = vtophys(&txp[i].tbd[2]);
1860                else
1861                        txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
1862                txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
1863        }
1864        /*
1865         * Set the suspend flag on the first TxCB and start the control
1866         * unit. It will execute the NOP and then suspend.
1867         */
1868        DBGLVL_PRINTK(5,"fxp_init: setup suspend flag\n");
1869        txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
1870        sc->cbl_first = sc->cbl_last = txp;
1871        sc->tx_queued = 1;
1872
1873        fxp_scb_wait(sc);
1874        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
1875
1876        /*
1877         * Initialize receiver buffer area - RFA.
1878         */
1879        DBGLVL_PRINTK(5,"fxp_init: initialize RFA\n");
1880        fxp_scb_wait(sc);
1881        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
1882            vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE);
1883        fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START);
1884
1885#ifdef NOTUSED
1886        /*
1887         * Set current media.
1888         */
1889        if (sc->miibus != NULL)
1890                mii_mediachg(device_get_softc(sc->miibus));
1891#endif
1892
1893        ifp->if_flags |= IFF_RUNNING;
1894        ifp->if_flags &= ~IFF_OACTIVE;
1895
1896        if (sc->daemonTid == 0) {
1897                /*
1898                 * Start driver task
1899                 */
1900                sc->daemonTid = rtems_bsdnet_newproc ("FXPd", 4096, fxp_daemon, sc);
1901
1902        }
1903        /*
1904         * Enable interrupts.
1905         */
1906        CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0);
1907        splx(s);
1908
1909        /*
1910         * Start stats updater.
1911         */
1912        sc->stat_ch = fxp_timeout_running;
1913        DBGLVL_PRINTK(2,"fxp_init: stats updater timeout called with hz=%d\n", hz);
1914        timeout(fxp_tick, sc, hz);
1915        DBGLVL_PRINTK(2,"fxp_init finished\n");
1916}
1917
1918#ifdef NOTUSED
1919static int
1920fxp_serial_ifmedia_upd(struct ifnet *ifp)
1921{
1922
1923        return (0);
1924}
1925
1926static void
1927fxp_serial_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1928{
1929
1930        ifmr->ifm_active = IFM_ETHER|IFM_MANUAL;
1931}
1932
1933/*
1934 * Change media according to request.
1935 */
1936static int
1937fxp_ifmedia_upd(struct ifnet *ifp)
1938{
1939        struct fxp_softc *sc = ifp->if_softc;
1940        struct mii_data *mii;
1941
1942        mii = device_get_softc(sc->miibus);
1943        mii_mediachg(mii);
1944        return (0);
1945}
1946
1947/*
1948 * Notify the world which media we're using.
1949 */
1950static void
1951fxp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1952{
1953        struct fxp_softc *sc = ifp->if_softc;
1954        struct mii_data *mii;
1955
1956        mii = device_get_softc(sc->miibus);
1957        mii_pollstat(mii);
1958        ifmr->ifm_active = mii->mii_media_active;
1959        ifmr->ifm_status = mii->mii_media_status;
1960
1961        if (ifmr->ifm_status & IFM_10_T && sc->flags & FXP_FLAG_CU_RESUME_BUG)
1962                sc->cu_resume_bug = 1;
1963        else
1964                sc->cu_resume_bug = 0;
1965}
1966#endif
1967
1968/*
1969 * Add a buffer to the end of the RFA buffer list.
1970 * Return 0 if successful, 1 for failure. A failure results in
1971 * adding the 'oldm' (if non-NULL) on to the end of the list -
1972 * tossing out its old contents and recycling it.
1973 * The RFA struct is stuck at the beginning of mbuf cluster and the
1974 * data pointer is fixed up to point just past it.
1975 */
1976static int
1977fxp_add_rfabuf(struct fxp_softc *sc, struct mbuf *oldm)
1978{
1979        u_int32_t v;
1980        struct mbuf *m;
1981        struct fxp_rfa *rfa, *p_rfa;
1982
1983        DBGLVL_PRINTK(4,"fxp_add_rfabuf called\n");
1984
1985        MGETHDR(m, M_DONTWAIT, MT_DATA);
1986        if (m != NULL) {
1987                MCLGET(m, M_DONTWAIT);
1988                if ((m->m_flags & M_EXT) == 0) {
1989                        m_freem(m);
1990                        if (oldm == NULL)
1991                                return 1;
1992                        m = oldm;
1993                        m->m_data = m->m_ext.ext_buf;
1994                }
1995        } else {
1996                if (oldm == NULL)
1997                        return 1;
1998                m = oldm;
1999                m->m_data = m->m_ext.ext_buf;
2000        }
2001
2002        /*
2003         * Move the data pointer up so that the incoming data packet
2004         * will be 32-bit aligned.
2005         */
2006        m->m_data += RFA_ALIGNMENT_FUDGE;
2007
2008        /*
2009         * Get a pointer to the base of the mbuf cluster and move
2010         * data start past it.
2011         */
2012        rfa = mtod(m, struct fxp_rfa *);
2013        m->m_data += sizeof(struct fxp_rfa);
2014        rfa->size = (u_int16_t)(MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE);
2015
2016        /*
2017         * Initialize the rest of the RFA.  Note that since the RFA
2018         * is misaligned, we cannot store values directly.  Instead,
2019         * we use an optimized, inline copy.
2020         */
2021
2022        rfa->rfa_status = 0;
2023        rfa->rfa_control = FXP_RFA_CONTROL_EL;
2024        rfa->actual_size = 0;
2025
2026        v = -1;
2027        fxp_lwcopy(&v, (volatile u_int32_t*) rfa->link_addr);
2028        fxp_lwcopy(&v, (volatile u_int32_t*) rfa->rbd_addr);
2029
2030        /*
2031         * If there are other buffers already on the list, attach this
2032         * one to the end by fixing up the tail to point to this one.
2033         */
2034        if (sc->rfa_headm != NULL) {
2035                p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf +
2036                    RFA_ALIGNMENT_FUDGE);
2037                sc->rfa_tailm->m_next = m;
2038                v = vtophys(rfa);
2039                fxp_lwcopy(&v, (volatile u_int32_t*) p_rfa->link_addr);
2040                p_rfa->rfa_control = 0;
2041        } else {
2042                sc->rfa_headm = m;
2043        }
2044        sc->rfa_tailm = m;
2045
2046        return (m == oldm);
2047}
2048
2049#ifdef NOTUSED
2050static volatile int
2051fxp_miibus_readreg(device_t dev, int phy, int reg)
2052{
2053        struct fxp_softc *sc = device_get_softc(dev);
2054        int count = 10000;
2055        int value;
2056
2057        CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
2058            (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21));
2059
2060        while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0
2061            && count--)
2062                DELAY(10);
2063
2064        if (count <= 0)
2065                device_printf(dev, "fxp_miibus_readreg: timed out\n");
2066
2067        return (value & 0xffff);
2068}
2069
2070static void
2071fxp_miibus_writereg(device_t dev, int phy, int reg, int value)
2072{
2073        struct fxp_softc *sc = device_get_softc(dev);
2074        int count = 10000;
2075
2076        CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
2077            (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) |
2078            (value & 0xffff));
2079
2080        while ((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 &&
2081            count--)
2082                DELAY(10);
2083
2084        if (count <= 0)
2085                device_printf(dev, "fxp_miibus_writereg: timed out\n");
2086}
2087#endif
2088
2089static int
2090fxp_ioctl(struct ifnet *ifp, int command, caddr_t data)
2091{
2092        struct fxp_softc *sc = ifp->if_softc;
2093#ifdef NOTUSED
2094        struct ifreq *ifr = (struct ifreq *)data;
2095        struct mii_data *mii;
2096#endif
2097        int s, error = 0;
2098
2099        DBGLVL_PRINTK(2,"fxp_ioctl called\n");
2100
2101        s = splimp();
2102
2103        switch (command) {
2104        case SIOCSIFADDR:
2105        case SIOCGIFADDR:
2106        case SIOCSIFMTU:
2107                error = ether_ioctl(ifp, command, data);
2108                break;
2109
2110        case SIOCSIFFLAGS:
2111                if (ifp->if_flags & IFF_ALLMULTI)
2112                        sc->flags |= FXP_FLAG_ALL_MCAST;
2113                else
2114                        sc->flags &= ~FXP_FLAG_ALL_MCAST;
2115
2116                /*
2117                 * If interface is marked up and not running, then start it.
2118                 * If it is marked down and running, stop it.
2119                 * XXX If it's up then re-initialize it. This is so flags
2120                 * such as IFF_PROMISC are handled.
2121                 */
2122                if (ifp->if_flags & IFF_UP) {
2123                        fxp_init(sc);
2124                } else {
2125                        if (ifp->if_flags & IFF_RUNNING)
2126                                fxp_stop(sc);
2127                }
2128                break;
2129
2130        case SIOCADDMULTI:
2131        case SIOCDELMULTI:
2132                if (ifp->if_flags & IFF_ALLMULTI)
2133                        sc->flags |= FXP_FLAG_ALL_MCAST;
2134                else
2135                        sc->flags &= ~FXP_FLAG_ALL_MCAST;
2136                /*
2137                 * Multicast list has changed; set the hardware filter
2138                 * accordingly.
2139                 */
2140                if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0)
2141                        fxp_mc_setup(sc);
2142                /*
2143                 * fxp_mc_setup() can set FXP_FLAG_ALL_MCAST, so check it
2144                 * again rather than else {}.
2145                 */
2146                if (sc->flags & FXP_FLAG_ALL_MCAST)
2147                        fxp_init(sc);
2148                error = 0;
2149                break;
2150
2151#ifdef NOTUSED
2152        case SIOCSIFMEDIA:
2153        case SIOCGIFMEDIA:
2154                if (sc->miibus != NULL) {
2155                        mii = device_get_softc(sc->miibus);
2156                        error = ifmedia_ioctl(ifp, ifr,
2157                            &mii->mii_media, command);
2158                } else {
2159                        error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command);
2160                }
2161                break;
2162#endif
2163
2164    case SIO_RTEMS_SHOW_STATS:
2165        fxp_stats(sc);
2166        break;
2167
2168        default:
2169                error = EINVAL;
2170        }
2171        splx(s);
2172        return (error);
2173}
2174
2175/*
2176 * Program the multicast filter.
2177 *
2178 * We have an artificial restriction that the multicast setup command
2179 * must be the first command in the chain, so we take steps to ensure
2180 * this. By requiring this, it allows us to keep up the performance of
2181 * the pre-initialized command ring (esp. link pointers) by not actually
2182 * inserting the mcsetup command in the ring - i.e. its link pointer
2183 * points to the TxCB ring, but the mcsetup descriptor itself is not part
2184 * of it. We then can do 'CU_START' on the mcsetup descriptor and have it
2185 * lead into the regular TxCB ring when it completes.
2186 *
2187 * This function must be called at splimp.
2188 */
2189static void
2190fxp_mc_setup(struct fxp_softc *sc)
2191{
2192        struct fxp_cb_mcs *mcsp = sc->mcsp;
2193        struct ifnet *ifp = &sc->sc_if;
2194#ifdef NOTUSED
2195        struct ifmultiaddr *ifma;
2196#endif
2197        int nmcasts;
2198        int count;
2199
2200        DBGLVL_PRINTK(2,"fxp_mc_setup called\n");
2201
2202        /*
2203         * If there are queued commands, we must wait until they are all
2204         * completed. If we are already waiting, then add a NOP command
2205         * with interrupt option so that we're notified when all commands
2206         * have been completed - fxp_start() ensures that no additional
2207         * TX commands will be added when need_mcsetup is true.
2208         */
2209        if (sc->tx_queued) {
2210                struct fxp_cb_tx *txp;
2211
2212                /*
2213                 * need_mcsetup will be true if we are already waiting for the
2214                 * NOP command to be completed (see below). In this case, bail.
2215                 */
2216                if (sc->need_mcsetup)
2217                        return;
2218                sc->need_mcsetup = 1;
2219
2220                /*
2221                 * Add a NOP command with interrupt so that we are notified when all
2222                 * TX commands have been processed.
2223                 */
2224                txp = sc->cbl_last->next;
2225                txp->mb_head = NULL;
2226                txp->cb_status = 0;
2227                txp->cb_command = FXP_CB_COMMAND_NOP |
2228                    FXP_CB_COMMAND_S | FXP_CB_COMMAND_I;
2229                /*
2230                 * Advance the end of list forward.
2231                 */
2232                sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
2233                sc->cbl_last = txp;
2234                sc->tx_queued++;
2235                /*
2236                 * Issue a resume in case the CU has just suspended.
2237                 */
2238                fxp_scb_wait(sc);
2239                fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME);
2240                /*
2241                 * Set a 5 second timer just in case we don't hear from the
2242                 * card again.
2243                 */
2244                ifp->if_timer = 5;
2245
2246                return;
2247        }
2248        sc->need_mcsetup = 0;
2249
2250        /*
2251         * Initialize multicast setup descriptor.
2252         */
2253        mcsp->next = sc->cbl_base;
2254        mcsp->mb_head = NULL;
2255        mcsp->cb_status = 0;
2256        mcsp->cb_command = FXP_CB_COMMAND_MCAS |
2257            FXP_CB_COMMAND_S | FXP_CB_COMMAND_I;
2258        mcsp->link_addr = vtophys(&sc->cbl_base->cb_status);
2259
2260        nmcasts = 0;
2261#ifdef NOTUSED /* FIXME: Multicast not supported? */
2262        if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0) {
2263#if __FreeBSD_version < 500000
2264                LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2265#else
2266                TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2267#endif
2268                        if (ifma->ifma_addr->sa_family != AF_LINK)
2269                                continue;
2270                        if (nmcasts >= MAXMCADDR) {
2271                                sc->flags |= FXP_FLAG_ALL_MCAST;
2272                                nmcasts = 0;
2273                                break;
2274                        }
2275                        memcpy((void *)(uintptr_t)(volatile void *)
2276                                &sc->mcsp->mc_addr[nmcasts][0],
2277                                LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 6);
2278                        nmcasts++;
2279                }
2280        }
2281#endif
2282        mcsp->mc_cnt = nmcasts * 6;
2283        sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp;
2284        sc->tx_queued = 1;
2285
2286        /*
2287         * Wait until command unit is not active. This should never
2288         * be the case when nothing is queued, but make sure anyway.
2289         */
2290        count = 100;
2291        while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) ==
2292            FXP_SCB_CUS_ACTIVE && --count)
2293                DELAY(10);
2294        if (count == 0) {
2295                device_printf(sc->dev, "command queue timeout\n");
2296                return;
2297        }
2298
2299        /*
2300         * Start the multicast setup command.
2301         */
2302        fxp_scb_wait(sc);
2303        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status));
2304        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
2305
2306        ifp->if_timer = 2;
2307        return;
2308        }
2309
2310#endif /* defined(__i386__) */
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