source: rtems/c/src/libchip/network/if_fxp.c @ 55243362

4.104.114.84.95
Last change on this file since 55243362 was 55243362, checked in by Eric Norum <WENorum@…>, on 11/29/04 at 17:06:12

Add another module ID code.

  • Property mode set to 100644
File size: 61.6 KB
Line 
1/*-
2 * Copyright (c) 1995, David Greenman
3 * Copyright (c) 2001 Jonathan Lemon <jlemon@freebsd.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice unmodified, this list of conditions, and the following
11 *    disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: src/sys/dev/fxp/if_fxp.c,v 1.118 2001/09/05 23:33:58 brooks Exp $
29 */
30
31/*
32 * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
33 */
34
35/*
36 * RTEMS Revision Preliminary History
37 *
38 * July XXX, 2002     W. Eric Norum <eric.norum@usask.ca>
39 *     Placed in RTEMS CVS repository.  All further modifications will be
40 *     noted in the CVS log and not in this comment.
41 *
42 * July 11, 2002     W. Eric Norum <eric.norum@usask.ca>
43 *     Minor modifications to get driver working with NIC on VersaLogic
44 *     Bobcat PC-104 single-board computer.  The Bobcat has no video
45 *     driver so printf/printk calls are directed to COM2:.  This
46 *     arrangement seems to require delays after the printk calls or
47 *     else things lock up.  Perhaps the RTEMS pc386 console code
48 *     should be modified to insert these delays itself.
49 *
50 * June 27, 2002     W. Eric Norum <eric.norum@usask.ca>
51 *     Obtained from Thomas Doerfler <Thomas.Doerfler@imd-systems.de>.
52 *     A big thank-you to Thomas for making this available.
53 *
54 * October 01, 2001  Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
55 *     Original RTEMS modifications.
56 */
57
58#if defined(__i386__)
59
60/*#define DEBUG_OUT 0*/
61
62#include <rtems.h>
63#include <rtems/error.h>
64#include <rtems/rtems_bsdnet.h>
65#include <bsp.h>
66
67#include <sys/errno.h>
68#include <sys/param.h>
69#include <sys/mbuf.h>
70#include <sys/socket.h>
71#include <sys/sockio.h>
72#include <net/if.h>
73#include <netinet/in.h>
74#include <netinet/if_ether.h>
75#include <sys/malloc.h>
76#include <sys/systm.h>
77#include <bsp.h>
78#include <pcibios.h>
79#include <irq.h>
80#include <rtems/pci.h>
81
82#ifdef NS
83#include <netns/ns.h>
84#include <netns/ns_if.h>
85#endif
86
87#include <net/bpf.h>
88
89#include <vm/vm.h>              /* for vtophys */
90
91#include <net/if_types.h>
92
93#include "if_fxpreg.h"
94#include "if_fxpvar.h"
95
96/*
97 * some adaptation replacements for RTEMS
98 */
99static rtems_interval fxp_ticksPerSecond;
100#define device_printf(device,format,args...) printk(format,## args)
101#define DELAY(n) rtems_task_wake_after(((n)*fxp_ticksPerSecond/1000000)+1)
102#ifdef DEBUG_OUT
103#define DBGLVL_PRINTK(LVL,format, args...)                   \
104if (DEBUG_OUT >= (LVL)) {                                    \
105  printk(format, ## args);                                   \
106}
107#else
108#define DBGLVL_PRINTK(LVL,format, args...)
109#endif
110
111/*
112 * RTEMS event used by interrupt handler to signal driver tasks.
113 * This must not be any of the events used by the network task synchronization.
114 */
115#define INTERRUPT_EVENT RTEMS_EVENT_1
116
117/*
118 * remapping between PCI device and CPU memmory address view...
119 */
120#if defined(__i386)
121#define vtophys(p) (u_int32_t)(p)
122#else
123#define vtophys(p) vtophys(p)
124#endif
125
126#define NFXPDRIVER 1
127static struct fxp_softc fxp_softc[NFXPDRIVER];
128static int fxp_is_verbose = TRUE;
129/*
130 * NOTE!  On the Alpha, we have an alignment constraint.  The
131 * card DMAs the packet immediately following the RFA.  However,
132 * the first thing in the packet is a 14-byte Ethernet header.
133 * This means that the packet is misaligned.  To compensate,
134 * we actually offset the RFA 2 bytes into the cluster.  This
135 * alignes the packet after the Ethernet header at a 32-bit
136 * boundary.  HOWEVER!  This means that the RFA is misaligned!
137 */
138#define RFA_ALIGNMENT_FUDGE     2
139
140/*
141 * Set initial transmit threshold at 64 (512 bytes). This is
142 * increased by 64 (512 bytes) at a time, to maximum of 192
143 * (1536 bytes), if an underrun occurs.
144 */
145static int tx_threshold = 64;
146
147/*
148 * The configuration byte map has several undefined fields which
149 * must be one or must be zero.  Set up a template for these bits
150 * only, (assuming a 82557 chip) leaving the actual configuration
151 * to fxp_init.
152 *
153 * See struct fxp_cb_config for the bit definitions.
154 */
155static u_char fxp_cb_config_template[] = {
156        0x0, 0x0,               /* cb_status */
157        0x0, 0x0,               /* cb_command */
158        0x0, 0x0, 0x0, 0x0,     /* link_addr */
159        0x0,    /*  0 */
160        0x0,    /*  1 */
161        0x0,    /*  2 */
162        0x0,    /*  3 */
163        0x0,    /*  4 */
164        0x0,    /*  5 */
165        0x32,   /*  6 */
166        0x0,    /*  7 */
167        0x0,    /*  8 */
168        0x0,    /*  9 */
169        0x6,    /* 10 */
170        0x0,    /* 11 */
171        0x0,    /* 12 */
172        0x0,    /* 13 */
173        0xf2,   /* 14 */
174        0x48,   /* 15 */
175        0x0,    /* 16 */
176        0x40,   /* 17 */
177        0xf0,   /* 18 */
178        0x0,    /* 19 */
179        0x3f,   /* 20 */
180        0x5     /* 21 */
181};
182
183struct fxp_ident {
184        u_int16_t       devid;
185        char            *name;
186        int                     warn;
187};
188
189#define UNTESTED 1
190
191/*
192 * Claim various Intel PCI device identifiers for this driver.  The
193 * sub-vendor and sub-device field are extensively used to identify
194 * particular variants, but we don't currently differentiate between
195 * them.
196 */
197static struct fxp_ident fxp_ident_table[] = {
198    { 0x1229,           "Intel Pro 10/100B/100+ Ethernet", UNTESTED },
199    { 0x2449,           "Intel Pro/100 Ethernet", UNTESTED },
200    { 0x1209,           "Intel Embedded 10/100 Ethernet", 0 },
201    { 0x1029,           "Intel Pro/100 Ethernet", UNTESTED },
202    { 0x1030,           "Intel Pro/100 Ethernet", 0 },
203    { 0x1031,           "Intel Pro/100 Ethernet", UNTESTED },
204    { 0x1032,           "Intel Pro/100 Ethernet", UNTESTED },
205    { 0x1033,           "Intel Pro/100 Ethernet", UNTESTED },
206    { 0x1034,           "Intel Pro/100 Ethernet", UNTESTED },
207    { 0x1035,           "Intel Pro/100 Ethernet", UNTESTED },
208    { 0x1036,           "Intel Pro/100 Ethernet", UNTESTED },
209    { 0x1037,           "Intel Pro/100 Ethernet", UNTESTED },
210    { 0x1038,           "Intel Pro/100 Ethernet", UNTESTED },
211    { 0x103B,           "Intel Pro/100 Ethernet (82801BD PRO/100 VM (LOM))", 0 },
212    { 0,                NULL },
213};
214
215#if 0
216static int              fxp_probe(device_t dev);
217static int              fxp_attach(device_t dev);
218static int              fxp_detach(device_t dev);
219static int              fxp_shutdown(device_t dev);
220#endif
221int     fxp_output (struct ifnet *,
222           struct mbuf *, struct sockaddr *, struct rtentry *);
223
224
225static rtems_isr        fxp_intr(rtems_vector_number v);
226static void             fxp_init(void *xsc);
227static void             fxp_tick(void *xsc);
228static void             fxp_start(struct ifnet *ifp);
229static void             fxp_stop(struct fxp_softc *sc);
230static void             fxp_release(struct fxp_softc *sc);
231static int              fxp_ioctl(struct ifnet *ifp, int command,
232                            caddr_t data);
233static void             fxp_watchdog(struct ifnet *ifp);
234static int              fxp_add_rfabuf(struct fxp_softc *sc, struct mbuf *oldm);
235static void             fxp_mc_setup(struct fxp_softc *sc);
236static u_int16_t        fxp_eeprom_getword(struct fxp_softc *sc, int offset,
237                            int autosize);
238static void             fxp_eeprom_putword(struct fxp_softc *sc, int offset,
239                            u_int16_t data);
240static void             fxp_autosize_eeprom(struct fxp_softc *sc);
241static void             fxp_read_eeprom(struct fxp_softc *sc, u_short *data,
242                            int offset, int words);
243static void             fxp_write_eeprom(struct fxp_softc *sc, u_short *data,
244                            int offset, int words);
245#ifdef NOTUSED
246static int              fxp_ifmedia_upd(struct ifnet *ifp);
247static void             fxp_ifmedia_sts(struct ifnet *ifp,
248                            struct ifmediareq *ifmr);
249static int              fxp_serial_ifmedia_upd(struct ifnet *ifp);
250static void             fxp_serial_ifmedia_sts(struct ifnet *ifp,
251                            struct ifmediareq *ifmr);
252static volatile int     fxp_miibus_readreg(device_t dev, int phy, int reg);
253static void             fxp_miibus_writereg(device_t dev, int phy, int reg,
254                            int value);
255#endif
256static __inline void    fxp_lwcopy(volatile u_int32_t *src,
257                            volatile u_int32_t *dst);
258static __inline void    fxp_scb_wait(struct fxp_softc *sc);
259static __inline void    fxp_scb_cmd(struct fxp_softc *sc, int cmd);
260static __inline void    fxp_dma_wait(volatile u_int16_t *status,
261                            struct fxp_softc *sc);
262
263/*
264 * Inline function to copy a 16-bit aligned 32-bit quantity.
265 */
266static __inline void
267fxp_lwcopy(volatile u_int32_t *src, volatile u_int32_t *dst)
268{
269#ifdef __i386__
270        *dst = *src;
271#else
272        volatile u_int16_t *a = (volatile u_int16_t*)src;
273        volatile u_int16_t *b = (volatile u_int16_t*)dst;
274
275        b[0] = a[0];
276        b[1] = a[1];
277#endif
278}
279
280/*
281 * inline access functions to pci space registers
282 */
283static __inline u_int8_t fxp_csr_read_1(struct fxp_softc *sc,int  reg) {
284  u_int8_t val;
285  if (sc->pci_regs_are_io) {
286    inport_byte(sc->pci_regs_base + reg,val);
287  }
288  else {
289    val = *(u_int8_t*)(sc->pci_regs_base+reg);
290  }
291  return val;
292}
293static __inline u_int32_t fxp_csr_read_2(struct fxp_softc *sc,int  reg) {
294  u_int16_t val;
295  if (sc->pci_regs_are_io) {
296    inport_word(sc->pci_regs_base + reg,val);
297  }
298  else {
299    val = *(u_int16_t*)(sc->pci_regs_base+reg);
300  }
301  return val;
302}
303static __inline u_int32_t fxp_csr_read_4(struct fxp_softc *sc,int  reg) {
304  u_int32_t val;
305  if (sc->pci_regs_are_io) {
306    inport_long(sc->pci_regs_base + reg,val);
307  }
308  else {
309    val = *(u_int32_t*)(sc->pci_regs_base+reg);
310  }
311  return val;
312}
313
314/*
315 * Wait for the previous command to be accepted (but not necessarily
316 * completed).
317 */
318static __inline void
319fxp_scb_wait(struct fxp_softc *sc)
320{
321        int i = 10000;
322
323        while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i)
324                DELAY(2);
325        if (i == 0)
326                device_printf(sc->dev, "SCB timeout: 0x%x 0x%x 0x%x 0x%x\n",
327                    CSR_READ_1(sc, FXP_CSR_SCB_COMMAND),
328                    CSR_READ_1(sc, FXP_CSR_SCB_STATACK),
329                    CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS),
330                    CSR_READ_2(sc, FXP_CSR_FLOWCONTROL));
331}
332
333static __inline void
334fxp_scb_cmd(struct fxp_softc *sc, int cmd)
335{
336
337        if (cmd == FXP_SCB_COMMAND_CU_RESUME && sc->cu_resume_bug) {
338                CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_CB_COMMAND_NOP);
339                fxp_scb_wait(sc);
340        }
341        CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, cmd);
342}
343
344static __inline void
345fxp_dma_wait(volatile u_int16_t *status, struct fxp_softc *sc)
346{
347        int i = 10000;
348
349        while (!(*status & FXP_CB_STATUS_C) && --i)
350                DELAY(2);
351        if (i == 0)
352                device_printf(sc->dev, "DMA timeout\n");
353}
354
355static __inline unsigned int pci_get_vendor(struct fxp_softc *sc) {
356  u_int16_t vendor;
357  pcib_conf_read16(sc->pci_signature,0,&vendor);
358  return vendor;
359}
360
361static __inline unsigned int pci_get_device(struct fxp_softc *sc) {
362  u_int16_t device;
363  pcib_conf_read16(sc->pci_signature,2,&device);
364  return device;
365}
366
367static __inline unsigned int pci_get_subvendor(struct fxp_softc *sc) {
368  u_int16_t subvendor;
369  pcib_conf_read16(sc->pci_signature,0x2c,&subvendor);
370  return subvendor;
371}
372
373static __inline unsigned int pci_get_subdevice(struct fxp_softc *sc) {
374  u_int16_t subdevice;
375  pcib_conf_read16(sc->pci_signature,0x2e,&subdevice);
376  return subdevice;
377}
378
379static __inline unsigned int pci_get_revid(struct fxp_softc *sc) {
380  u_int8_t revid;
381  pcib_conf_read8(sc->pci_signature,0x08,&revid);
382  return revid;
383}
384
385static void nopOn(const rtems_irq_connect_data* notUsed)
386{
387  /*
388   * code should be moved from fxp_Enet_initialize_hardware
389   * to this location
390   */
391}
392
393static int fxpIsOn(const rtems_irq_connect_data* irq)
394{
395  return BSP_irq_enabled_at_i8259s (irq->name);
396}
397
398int
399rtems_fxp_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
400{
401        int error = 0;
402        struct fxp_softc *sc;
403        struct ifnet *ifp;
404        u_int16_t val16;
405        u_int32_t val32;
406        u_int16_t data;
407        int i;
408        int s;
409        int unitNumber;
410        char *unitName;
411        u_int16_t dev_id;
412        u_int8_t interrupt;
413        int mtu;
414
415    /*
416     * Set up some timing values
417     */
418    rtems_clock_get(RTEMS_CLOCK_GET_TICKS_PER_SECOND, &fxp_ticksPerSecond);
419        DBGLVL_PRINTK(1,"fxp_attach called\n");
420
421        /*
422         * Parse driver name
423         */
424        if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
425                return 0;
426
427        /*
428         * Is driver free?
429         */
430        if ((unitNumber <= 0) || (unitNumber > NFXPDRIVER)) {
431                device_printf(dev,"Bad FXP unit number.\n");
432                return 0;
433        }
434        sc = &fxp_softc[unitNumber - 1];
435        ifp = &sc->arpcom.ac_if;
436        if (ifp->if_softc != NULL) {
437                device_printf(dev,"FXP Driver already in use.\n");
438                return 0;
439        }
440
441        memset(sc, 0, sizeof(*sc));
442#ifdef NOTUSED
443        sc->dev = dev;
444        callout_handle_init(&sc->stat_ch);
445        mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_DEF | MTX_RECURSE);
446#endif
447        s = splimp();
448
449        /*
450         * init PCI Bios interface...
451         */
452        i = pcib_init();
453        DBGLVL_PRINTK(2,"fxp_attach: pcib_init returned %d\n",i);
454        if (i != PCIB_ERR_SUCCESS) {
455          device_printf(dev, "could not initialize pci bios interface\n");
456          return 0;
457        }
458
459        /*
460         * find device on pci bus
461         */
462    { int j;
463
464      for (j=0; fxp_ident_table[j].devid; j++ ) {
465                i = pcib_find_by_devid( 0x8086,
466                        fxp_ident_table[j].devid,
467                        unitNumber-1,
468                        &(sc->pci_signature));
469                DBGLVL_PRINTK(2,"fxp_attach: find_devid returned %d "
470                      "and pci signature 0x%x\n",
471                      i,sc->pci_signature);
472                if (PCIB_ERR_SUCCESS == i) {
473                  if ( UNTESTED == fxp_ident_table[j].warn ) {
474                        device_printf(dev,
475"WARNING: this chip version has NOT been reported to work under RTEMS yet.\n");
476                        device_printf(dev,
477"         If it works OK, report it as tested in 'c/src/libchip/network/if_fxp.c'\n");
478                        }
479                        break;
480                }
481          }
482        }
483
484        /*
485         * FIXME: add search for more device types...
486         */
487        if (i != PCIB_ERR_SUCCESS) {
488          device_printf(dev, "could not find 82559ER device\n");
489          return 0;
490        }
491
492
493        /*
494         * Enable bus mastering. Enable memory space too, in case
495         * BIOS/Prom forgot about it.
496         */
497        pcib_conf_read16(sc->pci_signature, PCI_COMMAND,&val16);
498        val16 |= (PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER);
499        pcib_conf_write16(sc->pci_signature, PCI_COMMAND, val16);
500        DBGLVL_PRINTK(3,"fxp_attach: PCI_COMMAND_write = 0x%x\n",val16);
501        pcib_conf_read16(sc->pci_signature, PCI_COMMAND,&val16);
502        DBGLVL_PRINTK(4,"fxp_attach: PCI_COMMAND_read  = 0x%x\n",val16);
503
504        /*
505         * Figure out which we should try first - memory mapping or i/o mapping?
506         * We default to memory mapping. Then we accept an override from the
507         * command line. Then we check to see which one is enabled.
508         */
509#ifdef NOTUSED
510        m1 = PCI_COMMAND_MEMORY;
511        m2 = PCI_COMMAND_IO;
512        prefer_iomap = 0;
513        if (resource_int_value(device_get_name(dev), device_get_unit(dev),
514            "prefer_iomap", &prefer_iomap) == 0 && prefer_iomap != 0) {
515                m1 = PCI_COMMAND_IO;
516                m2 = PCI_COMMAND_MEMORY;
517        }
518
519        if (val & m1) {
520                sc->rtp = ((m1 == PCI_COMMAND_MEMORY)
521                           ? SYS_RES_MEMORY : SYS_RES_IOPORT);
522                sc->rgd = ((m1 == PCI_COMMAND_MEMORY)
523                           ? FXP_PCI_MMBA   : FXP_PCI_IOBA);
524                sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd,
525                                             0, ~0, 1, RF_ACTIVE);
526        }
527        if (sc->mem == NULL && (val & m2)) {
528                sc->rtp = ((m2 == PCI_COMMAND_MEMORY)
529                           ? SYS_RES_MEMORY : SYS_RES_IOPORT);
530                sc->rgd = ((m2 == PCI_COMMAND_MEMORY)
531                           ? FXP_PCI_MMBA : FXP_PCI_IOBA);
532                sc->mem = bus_alloc_resource(dev, sc->rtp, &sc->rgd,
533                                            0, ~0, 1, RF_ACTIVE);
534        }
535
536        if (!sc->mem) {
537                device_printf(dev, "could not map device registers\n");
538                error = ENXIO;
539                goto fail;
540        }
541        if (fxp_is_verbose) {
542                device_printf(dev, "using %s space register mapping\n",
543                   sc->rtp == SYS_RES_MEMORY? "memory" : "I/O");
544        }
545
546        sc->sc_st = rman_get_bustag(sc->mem);
547        sc->sc_sh = rman_get_bushandle(sc->mem);
548
549        /*
550         * Allocate our interrupt.
551         */
552        rid = 0;
553        sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
554                                 RF_SHAREABLE | RF_ACTIVE);
555        if (sc->irq == NULL) {
556                device_printf(dev, "could not map interrupt\n");
557                error = ENXIO;
558                goto fail;
559        }
560
561        error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET,
562                               fxp_intr, sc, &sc->ih);
563        if (error) {
564                device_printf(dev, "could not setup irq\n");
565                goto fail;
566        }
567#endif
568
569        /*
570         * get mapping and base address of registers
571         */
572        pcib_conf_read16(sc->pci_signature, PCI_COMMAND,&val16);
573        DBGLVL_PRINTK(4,"fxp_attach: PCI_COMMAND_read  = 0x%x\n",val16);
574        if((val16 & PCI_COMMAND_IO) != 0) {
575          sc->pci_regs_are_io = TRUE;
576          pcib_conf_read32(sc->pci_signature,
577                           PCI_BASE_ADDRESS_1,
578                           &val32);
579          sc->pci_regs_base = val32 & PCI_BASE_ADDRESS_IO_MASK;
580        }
581        else {
582          sc->pci_regs_are_io = FALSE;
583          pcib_conf_read32(sc->pci_signature,
584                           PCI_BASE_ADDRESS_0,
585                           &val32);
586          sc->pci_regs_base = val32 & PCI_BASE_ADDRESS_MEM_MASK;
587        }
588        DBGLVL_PRINTK(3,"fxp_attach: CSR registers are mapped in %s space"
589                      " at address 0x%x\n",
590                      sc->pci_regs_are_io ? "I/O" : "MEM",
591                      sc->pci_regs_base);
592
593        /*
594         * get interrupt level to be used
595         */
596        pcib_conf_read8(sc->pci_signature, 60, &interrupt);
597        DBGLVL_PRINTK(3,"fxp_attach: interrupt = 0x%x\n",interrupt);
598        sc->irqInfo.name = (rtems_irq_symbolic_name)interrupt;
599        /*
600         * Set up interrupts
601         */
602        sc->irqInfo.hdl = (rtems_irq_hdl)fxp_intr;
603        sc->irqInfo.on  = nopOn;
604        sc->irqInfo.off = nopOn;
605        sc->irqInfo.isOn = fxpIsOn;
606        s = BSP_install_rtems_irq_handler (&sc->irqInfo);
607        if (!s)
608          rtems_panic ("Can't attach fxp interrupt handler for irq %d\n",
609                       sc->irqInfo.name);
610        /*
611         * Reset to a stable state.
612        CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
613         */
614        CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
615        DELAY(10);
616
617        sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB,
618            M_DEVBUF, M_NOWAIT);
619        DBGLVL_PRINTK(3,"fxp_attach: sc->cbl_base = 0x%x\n",sc->cbl_base);
620        if (sc->cbl_base == NULL)
621                goto failmem;
622        else
623                memset(sc->cbl_base, 0, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
624
625        sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF,
626            M_NOWAIT);
627        DBGLVL_PRINTK(3,"fxp_attach: sc->fxp_stats = 0x%x\n",sc->fxp_stats);
628        if (sc->fxp_stats == NULL)
629                goto failmem;
630        else
631                memset(sc->fxp_stats, 0, sizeof(struct fxp_stats));
632
633        sc->mcsp = malloc(sizeof(struct fxp_cb_mcs), M_DEVBUF, M_NOWAIT);
634        DBGLVL_PRINTK(3,"fxp_attach: sc->mcsp = 0x%x\n",sc->mcsp);
635        if (sc->mcsp == NULL)
636                goto failmem;
637
638        /*
639         * Pre-allocate our receive buffers.
640         */
641        for (i = 0; i < FXP_NRFABUFS; i++) {
642                if (fxp_add_rfabuf(sc, NULL) != 0) {
643                        goto failmem;
644                }
645        }
646
647        /*
648         * Find out how large of an SEEPROM we have.
649         */
650        DBGLVL_PRINTK(3,"fxp_attach: calling fxp_autosize_eeprom\n");
651        fxp_autosize_eeprom(sc);
652
653        /*
654         * Determine whether we must use the 503 serial interface.
655         */
656        fxp_read_eeprom(sc, &data, 6, 1);
657        if ((data & FXP_PHY_DEVICE_MASK) != 0 &&
658            (data & FXP_PHY_SERIAL_ONLY))
659                sc->flags |= FXP_FLAG_SERIAL_MEDIA;
660
661        /*
662         * Find out the basic controller type; we currently only
663         * differentiate between a 82557 and greater.
664         */
665        fxp_read_eeprom(sc, &data, 5, 1);
666        if ((data >> 8) == 1)
667                sc->chip = FXP_CHIP_82557;
668        DBGLVL_PRINTK(3,"fxp_attach: sc->chip = %d\n",sc->chip);
669
670        /*
671         * Enable workarounds for certain chip revision deficiencies.
672         *
673         * Systems based on the ICH2/ICH2-M chip from Intel have a defect
674         * where the chip can cause a PCI protocol violation if it receives
675         * a CU_RESUME command when it is entering the IDLE state.  The
676         * workaround is to disable Dynamic Standby Mode, so the chip never
677         * deasserts CLKRUN#, and always remains in an active state.
678         *
679         * See Intel 82801BA/82801BAM Specification Update, Errata #30.
680         */
681#ifdef NOTUSED
682        i = pci_get_device(dev);
683#else
684        pcib_conf_read16(sc->pci_signature,2,&dev_id);
685        DBGLVL_PRINTK(3,"fxp_attach: device id = 0x%x\n",dev_id);
686#endif
687        if (dev_id == 0x2449 || (dev_id > 0x1030 && dev_id < 0x1039)) {
688        device_printf(dev, "*** See Intel 82801BA/82801BAM Specification Update, Errata #30. ***\n");
689                fxp_read_eeprom(sc, &data, 10, 1);
690                if (data & 0x02) {                      /* STB enable */
691                        u_int16_t cksum;
692                        int i;
693
694                        device_printf(dev,
695                    "*** DISABLING DYNAMIC STANDBY MODE IN EEPROM ***\n");
696                        data &= ~0x02;
697                        fxp_write_eeprom(sc, &data, 10, 1);
698                        device_printf(dev, "New EEPROM ID: 0x%x\n", data);
699                        cksum = 0;
700                        for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) {
701                                fxp_read_eeprom(sc, &data, i, 1);
702                                cksum += data;
703                        }
704                        i = (1 << sc->eeprom_size) - 1;
705                        cksum = 0xBABA - cksum;
706                        fxp_read_eeprom(sc, &data, i, 1);
707                        fxp_write_eeprom(sc, &cksum, i, 1);
708                        device_printf(dev,
709                            "EEPROM checksum @ 0x%x: 0x%x -> 0x%x\n",
710                            i, data, cksum);
711                        /*
712                         * We need to do a full PCI reset here.  A software
713                         * reset to the port doesn't cut it, but let's try
714                         * anyway.
715                         */
716                        CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
717                        DELAY(50);
718                        device_printf(dev,
719            "*** PLEASE REBOOT THE SYSTEM NOW FOR CORRECT OPERATION ***\n");
720#if 1
721                        /*
722                         * If the user elects to continue, try the software
723                         * workaround, as it is better than nothing.
724                         */
725                        sc->flags |= FXP_FLAG_CU_RESUME_BUG;
726#endif
727                }
728        }
729
730        /*
731         * If we are not a 82557 chip, we can enable extended features.
732         */
733        if (sc->chip != FXP_CHIP_82557) {
734          u_int8_t tmp_val;
735                /*
736                 * If MWI is enabled in the PCI configuration, and there
737                 * is a valid cacheline size (8 or 16 dwords), then tell
738                 * the board to turn on MWI.
739                 */
740                pcib_conf_read8(sc->pci_signature,
741                                PCI_CACHE_LINE_SIZE,&tmp_val);
742                DBGLVL_PRINTK(3,"fxp_attach: CACHE_LINE_SIZE = %d\n",tmp_val);
743                if (val16 & PCI_COMMAND_MEMORY &&
744                    tmp_val != 0)
745                        sc->flags |= FXP_FLAG_MWI_ENABLE;
746
747                /* turn on the extended TxCB feature */
748                sc->flags |= FXP_FLAG_EXT_TXCB;
749
750                /* enable reception of long frames for VLAN */
751                sc->flags |= FXP_FLAG_LONG_PKT_EN;
752                DBGLVL_PRINTK(3,"fxp_attach: sc->flags = 0x%x\n",
753                              sc->flags);
754        }
755
756        /*
757         * Read MAC address.
758         */
759        fxp_read_eeprom(sc, (u_int16_t*)sc->arpcom.ac_enaddr, 0, 3);
760        if (fxp_is_verbose) {
761            device_printf(dev, "Ethernet address %x:%x:%x:%x:%x:%x %s \n",
762                ((u_int8_t*)sc->arpcom.ac_enaddr)[0],
763                ((u_int8_t*)sc->arpcom.ac_enaddr)[1],
764            ((u_int8_t*)sc->arpcom.ac_enaddr)[2],
765            ((u_int8_t*)sc->arpcom.ac_enaddr)[3],
766            ((u_int8_t*)sc->arpcom.ac_enaddr)[4],
767            ((u_int8_t*)sc->arpcom.ac_enaddr)[5],
768            sc->flags & FXP_FLAG_SERIAL_MEDIA ? ", 10Mbps" : "");
769                device_printf(dev, "PCI IDs: 0x%x 0x%x 0x%x 0x%x 0x%x\n",
770                    pci_get_vendor(sc), pci_get_device(sc),
771                    pci_get_subvendor(sc), pci_get_subdevice(sc),
772                    pci_get_revid(sc));
773                device_printf(dev, "Chip Type: %d\n", sc->chip);
774        }
775
776#ifdef NOTUSED /* do not set up interface at all... */
777        /*
778         * If this is only a 10Mbps device, then there is no MII, and
779         * the PHY will use a serial interface instead.
780         *
781         * The Seeq 80c24 AutoDUPLEX(tm) Ethernet Interface Adapter
782         * doesn't have a programming interface of any sort.  The
783         * media is sensed automatically based on how the link partner
784         * is configured.  This is, in essence, manual configuration.
785         */
786        if (sc->flags & FXP_FLAG_SERIAL_MEDIA) {
787                ifmedia_init(&sc->sc_media, 0, fxp_serial_ifmedia_upd,
788                    fxp_serial_ifmedia_sts);
789                ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
790                ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
791        } else {
792                if (mii_phy_probe(dev, &sc->miibus, fxp_ifmedia_upd,
793                    fxp_ifmedia_sts)) {
794                        device_printf(dev, "MII without any PHY!\n");
795                        error = ENXIO;
796                        goto fail;
797                }
798        }
799#endif
800        if (config->mtu)
801                mtu = config->mtu;
802        else
803                mtu = ETHERMTU;
804
805        ifp->if_softc = sc;
806        ifp->if_unit = unitNumber;
807        ifp->if_name = unitName;
808        ifp->if_mtu  = mtu;
809        ifp->if_baudrate = 100000000;
810        ifp->if_init = fxp_init;
811        ifp->if_ioctl = fxp_ioctl;
812        ifp->if_start = fxp_start;
813        ifp->if_output = ether_output;
814        ifp->if_watchdog = fxp_watchdog;
815        ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX /*| IFF_MULTICAST*/;
816        if (ifp->if_snd.ifq_maxlen == 0)
817                ifp->if_snd.ifq_maxlen = ifqmaxlen;
818
819        /*
820         * Attach the interface.
821         */
822        DBGLVL_PRINTK(3,"fxp_attach: calling if_attach\n");
823        if_attach (ifp);
824        DBGLVL_PRINTK(3,"fxp_attach: calling ether_if_attach\n");
825        ether_ifattach(ifp);
826        DBGLVL_PRINTK(3,"fxp_attach: return from ether_if_attach\n");
827
828#ifdef NOTUSED
829        /*
830         * Tell the upper layer(s) we support long frames.
831         */
832        ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
833#endif
834        /*
835         * Let the system queue as many packets as we have available
836         * TX descriptors.
837         */
838        ifp->if_snd.ifq_maxlen = FXP_NTXCB - 1;
839
840        splx(s);
841        return (0);
842
843failmem:
844        device_printf(dev, "Failed to malloc memory\n");
845        error = ENOMEM;
846#ifdef NOTUSED
847fail:
848#endif
849        splx(s);
850        fxp_release(sc);
851        return (error);
852}
853
854/*
855 * release all resources
856 */
857static void
858fxp_release(struct fxp_softc *sc)
859{
860
861#ifdef NOTUSED
862        bus_generic_detach(sc->dev);
863        if (sc->miibus)
864                device_delete_child(sc->dev, sc->miibus);
865#endif
866        if (sc->cbl_base)
867                free(sc->cbl_base, M_DEVBUF);
868        if (sc->fxp_stats)
869                free(sc->fxp_stats, M_DEVBUF);
870        if (sc->mcsp)
871                free(sc->mcsp, M_DEVBUF);
872        if (sc->rfa_headm)
873                m_freem(sc->rfa_headm);
874
875#ifdef NOTUSED
876        if (sc->ih)
877                bus_teardown_intr(sc->dev, sc->irq, sc->ih);
878        if (sc->irq)
879                bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq);
880        if (sc->mem)
881                bus_release_resource(sc->dev, sc->rtp, sc->rgd, sc->mem);
882        mtx_destroy(&sc->sc_mtx);
883#endif
884}
885
886#if NOTUSED
887/*
888 * Detach interface.
889 */
890static int
891fxp_detach(device_t dev)
892{
893        struct fxp_softc *sc = device_get_softc(dev);
894        int s;
895
896        /* disable interrupts */
897        CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE);
898
899        s = splimp();
900
901        /*
902         * Stop DMA and drop transmit queue.
903         */
904        fxp_stop(sc);
905
906        /*
907         * Close down routes etc.
908         */
909        ether_ifdetach(&sc->arpcom.ac_if, ETHER_BPF_SUPPORTED);
910
911        /*
912         * Free all media structures.
913         */
914        ifmedia_removeall(&sc->sc_media);
915
916        splx(s);
917
918        /* Release our allocated resources. */
919        fxp_release(sc);
920
921        return (0);
922}
923
924/*
925 * Device shutdown routine. Called at system shutdown after sync. The
926 * main purpose of this routine is to shut off receiver DMA so that
927 * kernel memory doesn't get clobbered during warmboot.
928 */
929static int
930fxp_shutdown(device_t dev)
931{
932        /*
933         * Make sure that DMA is disabled prior to reboot. Not doing
934         * do could allow DMA to corrupt kernel memory during the
935         * reboot before the driver initializes.
936         */
937        fxp_stop((struct fxp_softc *) device_get_softc(dev));
938        return (0);
939}
940#endif
941
942/*
943 * Show interface statistics
944 */
945static void
946fxp_stats(struct fxp_softc *sc)
947{
948        struct ifnet *ifp = &sc->sc_if;
949
950        printf ("   Output packets:%-8lu", ifp->if_opackets);
951        printf ("    Collisions:%-8lu", ifp->if_collisions);
952        printf (" Output errors:%-8lu\n", ifp->if_oerrors);
953        printf ("    Input packets:%-8lu", ifp->if_ipackets);
954        printf ("  Input errors:%-8lu\n", ifp->if_ierrors);
955}
956
957static void
958fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length)
959{
960        u_int16_t reg;
961        int x;
962
963        /*
964         * Shift in data.
965         */
966        for (x = 1 << (length - 1); x; x >>= 1) {
967                if (data & x)
968                        reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
969                else
970                        reg = FXP_EEPROM_EECS;
971                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
972                DELAY(1);
973                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK);
974                DELAY(1);
975                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
976                DELAY(1);
977        }
978}
979
980/*
981 * Read from the serial EEPROM. Basically, you manually shift in
982 * the read opcode (one bit at a time) and then shift in the address,
983 * and then you shift out the data (all of this one bit at a time).
984 * The word size is 16 bits, so you have to provide the address for
985 * every 16 bits of data.
986 */
987static u_int16_t
988fxp_eeprom_getword(struct fxp_softc *sc, int offset, int autosize)
989{
990        u_int16_t reg, data;
991        int x;
992
993        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
994        /*
995         * Shift in read opcode.
996         */
997        fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_READ, 3);
998        /*
999         * Shift in address.
1000         */
1001        data = 0;
1002        for (x = 1 << (sc->eeprom_size - 1); x; x >>= 1) {
1003                if (offset & x)
1004                        reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
1005                else
1006                        reg = FXP_EEPROM_EECS;
1007                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
1008                DELAY(1);
1009                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK);
1010                DELAY(1);
1011                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
1012                DELAY(1);
1013                reg = CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO;
1014                data++;
1015                if (autosize && reg == 0) {
1016                        sc->eeprom_size = data;
1017                        break;
1018                }
1019        }
1020        /*
1021         * Shift out data.
1022         */
1023        data = 0;
1024        reg = FXP_EEPROM_EECS;
1025        for (x = 1 << 15; x; x >>= 1) {
1026                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK);
1027                DELAY(1);
1028                if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO)
1029                        data |= x;
1030                CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
1031                DELAY(1);
1032        }
1033        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1034        DELAY(1);
1035
1036        return (data);
1037}
1038
1039static void
1040fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data)
1041{
1042        int i;
1043
1044        /*
1045         * Erase/write enable.
1046         */
1047        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
1048        fxp_eeprom_shiftin(sc, 0x4, 3);
1049        fxp_eeprom_shiftin(sc, 0x03 << (sc->eeprom_size - 2), sc->eeprom_size);
1050        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1051        DELAY(1);
1052        /*
1053         * Shift in write opcode, address, data.
1054         */
1055        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
1056        fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_WRITE, 3);
1057        fxp_eeprom_shiftin(sc, offset, sc->eeprom_size);
1058        fxp_eeprom_shiftin(sc, data, 16);
1059        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1060        DELAY(1);
1061        /*
1062         * Wait for EEPROM to finish up.
1063         */
1064        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
1065        DELAY(1);
1066        for (i = 0; i < 1000; i++) {
1067                if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO)
1068                        break;
1069                DELAY(50);
1070        }
1071        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1072        DELAY(1);
1073        /*
1074         * Erase/write disable.
1075         */
1076        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
1077        fxp_eeprom_shiftin(sc, 0x4, 3);
1078        fxp_eeprom_shiftin(sc, 0, sc->eeprom_size);
1079        CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
1080        DELAY(1);
1081}
1082
1083/*
1084 * From NetBSD:
1085 *
1086 * Figure out EEPROM size.
1087 *
1088 * 559's can have either 64-word or 256-word EEPROMs, the 558
1089 * datasheet only talks about 64-word EEPROMs, and the 557 datasheet
1090 * talks about the existance of 16 to 256 word EEPROMs.
1091 *
1092 * The only known sizes are 64 and 256, where the 256 version is used
1093 * by CardBus cards to store CIS information.
1094 *
1095 * The address is shifted in msb-to-lsb, and after the last
1096 * address-bit the EEPROM is supposed to output a `dummy zero' bit,
1097 * after which follows the actual data. We try to detect this zero, by
1098 * probing the data-out bit in the EEPROM control register just after
1099 * having shifted in a bit. If the bit is zero, we assume we've
1100 * shifted enough address bits. The data-out should be tri-state,
1101 * before this, which should translate to a logical one.
1102 */
1103static void
1104fxp_autosize_eeprom(struct fxp_softc *sc)
1105{
1106
1107        /* guess maximum size of 256 words */
1108        sc->eeprom_size = 8;
1109
1110        /* autosize */
1111        (void) fxp_eeprom_getword(sc, 0, 1);
1112}
1113
1114static void
1115fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
1116{
1117        int i;
1118
1119        for (i = 0; i < words; i++) {
1120                data[i] = fxp_eeprom_getword(sc, offset + i, 0);
1121                DBGLVL_PRINTK(4,"fxp_eeprom_read(off=0x%x)=0x%x\n",
1122                              offset+i,data[i]);
1123        }
1124}
1125
1126static void
1127fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
1128{
1129        int i;
1130
1131        for (i = 0; i < words; i++)
1132                fxp_eeprom_putword(sc, offset + i, data[i]);
1133                DBGLVL_PRINTK(4,"fxp_eeprom_write(off=0x%x,0x%x)\n",
1134                              offset+i,data[i]);
1135}
1136
1137/*
1138 * Start packet transmission on the interface.
1139 */
1140static void
1141fxp_start(struct ifnet *ifp)
1142{
1143        struct fxp_softc *sc = ifp->if_softc;
1144        struct fxp_cb_tx *txp;
1145
1146        DBGLVL_PRINTK(3,"fxp_start called\n");
1147
1148        /*
1149         * See if we need to suspend xmit until the multicast filter
1150         * has been reprogrammed (which can only be done at the head
1151         * of the command chain).
1152         */
1153        if (sc->need_mcsetup) {
1154                return;
1155        }
1156
1157        txp = NULL;
1158
1159        /*
1160         * We're finished if there is nothing more to add to the list or if
1161         * we're all filled up with buffers to transmit.
1162         * NOTE: One TxCB is reserved to guarantee that fxp_mc_setup() can add
1163         *       a NOP command when needed.
1164         */
1165        while (ifp->if_snd.ifq_head != NULL && sc->tx_queued < FXP_NTXCB - 1) {
1166                struct mbuf *m, *mb_head;
1167                int segment;
1168
1169                /*
1170                 * Grab a packet to transmit.
1171                 */
1172                IF_DEQUEUE(&ifp->if_snd, mb_head);
1173
1174                /*
1175                 * Get pointer to next available tx desc.
1176                 */
1177                txp = sc->cbl_last->next;
1178
1179                /*
1180                 * Go through each of the mbufs in the chain and initialize
1181                 * the transmit buffer descriptors with the physical address
1182                 * and size of the mbuf.
1183                 */
1184tbdinit:
1185                for (m = mb_head, segment = 0; m != NULL; m = m->m_next) {
1186                        if (m->m_len != 0) {
1187                                if (segment == FXP_NTXSEG)
1188                                        break;
1189                                txp->tbd[segment].tb_addr =
1190                                    vtophys(mtod(m, vm_offset_t));
1191                                txp->tbd[segment].tb_size = m->m_len;
1192                                segment++;
1193                        }
1194                }
1195                if (m != NULL) {
1196                        struct mbuf *mn;
1197
1198                        /*
1199                         * We ran out of segments. We have to recopy this
1200                         * mbuf chain first. Bail out if we can't get the
1201                         * new buffers.
1202                         */
1203                        MGETHDR(mn, M_DONTWAIT, MT_DATA);
1204                        if (mn == NULL) {
1205                                m_freem(mb_head);
1206                                break;
1207                        }
1208                        if (mb_head->m_pkthdr.len > MHLEN) {
1209                                MCLGET(mn, M_DONTWAIT);
1210                                if ((mn->m_flags & M_EXT) == 0) {
1211                                        m_freem(mn);
1212                                        m_freem(mb_head);
1213                                        break;
1214                                }
1215                        }
1216                        m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
1217                            mtod(mn, caddr_t));
1218                        mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
1219                        m_freem(mb_head);
1220                        mb_head = mn;
1221                        goto tbdinit;
1222                }
1223
1224                txp->tbd_number = segment;
1225                txp->mb_head = mb_head;
1226                txp->cb_status = 0;
1227                if (sc->tx_queued != FXP_CXINT_THRESH - 1) {
1228                        txp->cb_command =
1229                            FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF |
1230                            FXP_CB_COMMAND_S;
1231                } else {
1232                        txp->cb_command =
1233                            FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF |
1234                            FXP_CB_COMMAND_S | FXP_CB_COMMAND_I;
1235                        /*
1236                         * Set a 5 second timer just in case we don't hear
1237                         * from the card again.
1238                         */
1239                        ifp->if_timer = 5;
1240                }
1241                txp->tx_threshold = tx_threshold;
1242
1243                /*
1244                 * Advance the end of list forward.
1245                 */
1246
1247#ifdef __alpha__
1248                /*
1249                 * On platforms which can't access memory in 16-bit
1250                 * granularities, we must prevent the card from DMA'ing
1251                 * up the status while we update the command field.
1252                 * This could cause us to overwrite the completion status.
1253                 */
1254                atomic_clear_short(&sc->cbl_last->cb_command,
1255                    FXP_CB_COMMAND_S);
1256#else
1257                sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
1258#endif /*__alpha__*/
1259                sc->cbl_last = txp;
1260
1261                /*
1262                 * Advance the beginning of the list forward if there are
1263                 * no other packets queued (when nothing is queued, cbl_first
1264                 * sits on the last TxCB that was sent out).
1265                 */
1266                if (sc->tx_queued == 0)
1267                        sc->cbl_first = txp;
1268
1269                sc->tx_queued++;
1270
1271#ifdef NOTUSED
1272                /*
1273                 * Pass packet to bpf if there is a listener.
1274                 */
1275                if (ifp->if_bpf)
1276                        bpf_mtap(ifp, mb_head);
1277#endif
1278        }
1279
1280        /*
1281         * We're finished. If we added to the list, issue a RESUME to get DMA
1282         * going again if suspended.
1283         */
1284        if (txp != NULL) {
1285                fxp_scb_wait(sc);
1286                fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME);
1287        }
1288}
1289
1290/*
1291 * Process interface interrupts.
1292 */
1293static rtems_isr fxp_intr(rtems_vector_number v)
1294{
1295  /*
1296   * FIXME: currently only works with one interface...
1297   */
1298  struct fxp_softc *sc = &(fxp_softc[0]);
1299
1300  /*
1301   * disable interrupts
1302   */
1303  CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTR_DISABLE);
1304  /*
1305   * send event to deamon
1306   */
1307  rtems_event_send (sc->daemonTid, INTERRUPT_EVENT);
1308}
1309
1310static void fxp_daemon(void *xsc)
1311{
1312        struct fxp_softc *sc = xsc;
1313        struct ifnet *ifp = &sc->sc_if;
1314        u_int8_t statack;
1315        rtems_event_set events;
1316        rtems_interrupt_level level;
1317
1318#ifdef NOTUSED
1319        if (sc->suspended) {
1320                return;
1321        }
1322#endif
1323        for (;;) {
1324
1325        DBGLVL_PRINTK(4,"fxp_daemon waiting for event\n");
1326          /*
1327           * wait for event to receive from interrupt function
1328           */
1329          rtems_bsdnet_event_receive (INTERRUPT_EVENT,
1330                                      RTEMS_WAIT|RTEMS_EVENT_ANY,
1331                                      RTEMS_NO_TIMEOUT,
1332                                      &events);
1333          while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) {
1334            DBGLVL_PRINTK(4,"fxp_daemon: processing event, statack = 0x%x\n",
1335                          statack);
1336#ifdef NOTUSED
1337                /*
1338                 * It should not be possible to have all bits set; the
1339                 * FXP_SCB_INTR_SWI bit always returns 0 on a read.  If
1340                 * all bits are set, this may indicate that the card has
1341                 * been physically ejected, so ignore it.
1342                 */
1343                if (statack == 0xff)
1344                        return;
1345#endif
1346
1347                /*
1348                 * First ACK all the interrupts in this pass.
1349                 */
1350                CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
1351
1352                /*
1353                 * Free any finished transmit mbuf chains.
1354                 *
1355                 * Handle the CNA event likt a CXTNO event. It used to
1356                 * be that this event (control unit not ready) was not
1357                 * encountered, but it is now with the SMPng modifications.
1358                 * The exact sequence of events that occur when the interface
1359                 * is brought up are different now, and if this event
1360                 * goes unhandled, the configuration/rxfilter setup sequence
1361                 * can stall for several seconds. The result is that no
1362                 * packets go out onto the wire for about 5 to 10 seconds
1363                 * after the interface is ifconfig'ed for the first time.
1364                 */
1365                if (statack & (FXP_SCB_STATACK_CXTNO | FXP_SCB_STATACK_CNA)) {
1366                        struct fxp_cb_tx *txp;
1367
1368                        for (txp = sc->cbl_first; sc->tx_queued &&
1369                            (txp->cb_status & FXP_CB_STATUS_C) != 0;
1370                            txp = txp->next) {
1371                                if (txp->mb_head != NULL) {
1372                                        m_freem(txp->mb_head);
1373                                        txp->mb_head = NULL;
1374                                }
1375                                sc->tx_queued--;
1376                        }
1377                        sc->cbl_first = txp;
1378                        ifp->if_timer = 0;
1379                        if (sc->tx_queued == 0) {
1380                                if (sc->need_mcsetup)
1381                                        fxp_mc_setup(sc);
1382                        }
1383                        /*
1384                         * Try to start more packets transmitting.
1385                         */
1386                        if (ifp->if_snd.ifq_head != NULL)
1387                                fxp_start(ifp);
1388                }
1389                /*
1390                 * Process receiver interrupts. If a no-resource (RNR)
1391                 * condition exists, get whatever packets we can and
1392                 * re-start the receiver.
1393                 */
1394                if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) {
1395                        struct mbuf *m;
1396                        struct fxp_rfa *rfa;
1397rcvloop:
1398                        m = sc->rfa_headm;
1399                        rfa = (struct fxp_rfa *)(m->m_ext.ext_buf +
1400                            RFA_ALIGNMENT_FUDGE);
1401
1402                        if (rfa->rfa_status & FXP_RFA_STATUS_C) {
1403                                /*
1404                                 * Remove first packet from the chain.
1405                                 */
1406                                sc->rfa_headm = m->m_next;
1407                                m->m_next = NULL;
1408
1409                                /*
1410                                 * Add a new buffer to the receive chain.
1411                                 * If this fails, the old buffer is recycled
1412                                 * instead.
1413                                 */
1414                                if (fxp_add_rfabuf(sc, m) == 0) {
1415                                        struct ether_header *eh;
1416                                        int total_len;
1417
1418                                        total_len = rfa->actual_size &
1419                                            (MCLBYTES - 1);
1420                                        if (total_len <
1421                                            sizeof(struct ether_header)) {
1422                                                m_freem(m);
1423                                                goto rcvloop;
1424                                        }
1425
1426                                        /*
1427                                         * Drop the packet if it has CRC
1428                                         * errors.  This test is only needed
1429                                         * when doing 802.1q VLAN on the 82557
1430                                         * chip.
1431                                         */
1432                                        if (rfa->rfa_status &
1433                                            FXP_RFA_STATUS_CRC) {
1434                                                m_freem(m);
1435                                                goto rcvloop;
1436                                        }
1437
1438                                        m->m_pkthdr.rcvif = ifp;
1439                                        m->m_pkthdr.len = m->m_len = total_len;
1440                                        eh = mtod(m, struct ether_header *);
1441                                        m->m_data +=
1442                                            sizeof(struct ether_header);
1443                                        m->m_len -=
1444                                            sizeof(struct ether_header);
1445                                        m->m_pkthdr.len = m->m_len;
1446                                        ether_input(ifp, eh, m);
1447                                }
1448                                goto rcvloop;
1449                        }
1450                        if (statack & FXP_SCB_STATACK_RNR) {
1451                                fxp_scb_wait(sc);
1452                                CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
1453                                    vtophys(sc->rfa_headm->m_ext.ext_buf) +
1454                                        RFA_ALIGNMENT_FUDGE);
1455                                fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START);
1456                        }
1457                }
1458          }
1459          /*
1460           * reenable interrupts
1461           */
1462          rtems_interrupt_disable (level);
1463          CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL,0);
1464          rtems_interrupt_enable (level);
1465        }
1466}
1467
1468/*
1469 * Update packet in/out/collision statistics. The i82557 doesn't
1470 * allow you to access these counters without doing a fairly
1471 * expensive DMA to get _all_ of the statistics it maintains, so
1472 * we do this operation here only once per second. The statistics
1473 * counters in the kernel are updated from the previous dump-stats
1474 * DMA and then a new dump-stats DMA is started. The on-chip
1475 * counters are zeroed when the DMA completes. If we can't start
1476 * the DMA immediately, we don't wait - we just prepare to read
1477 * them again next time.
1478 */
1479static void
1480fxp_tick(void *xsc)
1481{
1482        struct fxp_softc *sc = xsc;
1483        struct ifnet *ifp = &sc->sc_if;
1484        struct fxp_stats *sp = sc->fxp_stats;
1485        struct fxp_cb_tx *txp;
1486        int s;
1487
1488        DBGLVL_PRINTK(4,"fxp_tick called\n");
1489
1490        ifp->if_opackets += sp->tx_good;
1491        ifp->if_collisions += sp->tx_total_collisions;
1492        if (sp->rx_good) {
1493                ifp->if_ipackets += sp->rx_good;
1494                sc->rx_idle_secs = 0;
1495        } else {
1496                /*
1497                 * Receiver's been idle for another second.
1498                 */
1499                sc->rx_idle_secs++;
1500        }
1501        ifp->if_ierrors +=
1502            sp->rx_crc_errors +
1503            sp->rx_alignment_errors +
1504            sp->rx_rnr_errors +
1505            sp->rx_overrun_errors;
1506        /*
1507         * If any transmit underruns occured, bump up the transmit
1508         * threshold by another 512 bytes (64 * 8).
1509         */
1510        if (sp->tx_underruns) {
1511                ifp->if_oerrors += sp->tx_underruns;
1512                if (tx_threshold < 192)
1513                        tx_threshold += 64;
1514        }
1515        s = splimp();
1516        /*
1517         * Release any xmit buffers that have completed DMA. This isn't
1518         * strictly necessary to do here, but it's advantagous for mbufs
1519         * with external storage to be released in a timely manner rather
1520         * than being defered for a potentially long time. This limits
1521         * the delay to a maximum of one second.
1522         */
1523        for (txp = sc->cbl_first; sc->tx_queued &&
1524            (txp->cb_status & FXP_CB_STATUS_C) != 0;
1525            txp = txp->next) {
1526                if (txp->mb_head != NULL) {
1527                        m_freem(txp->mb_head);
1528                        txp->mb_head = NULL;
1529                }
1530                sc->tx_queued--;
1531        }
1532        sc->cbl_first = txp;
1533        /*
1534         * If we haven't received any packets in FXP_MAC_RX_IDLE seconds,
1535         * then assume the receiver has locked up and attempt to clear
1536         * the condition by reprogramming the multicast filter. This is
1537         * a work-around for a bug in the 82557 where the receiver locks
1538         * up if it gets certain types of garbage in the syncronization
1539         * bits prior to the packet header. This bug is supposed to only
1540         * occur in 10Mbps mode, but has been seen to occur in 100Mbps
1541         * mode as well (perhaps due to a 10/100 speed transition).
1542         */
1543        if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) {
1544                sc->rx_idle_secs = 0;
1545                fxp_mc_setup(sc);
1546        }
1547        /*
1548         * If there is no pending command, start another stats
1549         * dump. Otherwise punt for now.
1550         */
1551        if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) {
1552                /*
1553                 * Start another stats dump.
1554                 */
1555                fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMPRESET);
1556        } else {
1557                /*
1558                 * A previous command is still waiting to be accepted.
1559                 * Just zero our copy of the stats and wait for the
1560                 * next timer event to update them.
1561                 */
1562                sp->tx_good = 0;
1563                sp->tx_underruns = 0;
1564                sp->tx_total_collisions = 0;
1565
1566                sp->rx_good = 0;
1567                sp->rx_crc_errors = 0;
1568                sp->rx_alignment_errors = 0;
1569                sp->rx_rnr_errors = 0;
1570                sp->rx_overrun_errors = 0;
1571        }
1572#ifdef NOTUSED
1573        if (sc->miibus != NULL)
1574                mii_tick(device_get_softc(sc->miibus));
1575#endif
1576        splx(s);
1577        /*
1578         * Schedule another timeout one second from now.
1579         */
1580        if (sc->stat_ch == fxp_timeout_running) {
1581          timeout(fxp_tick, sc, hz);
1582        }
1583        else if (sc->stat_ch == fxp_timeout_stop_rq) {
1584          sc->stat_ch = fxp_timeout_stopped;
1585        }
1586}
1587
1588/*
1589 * Stop the interface. Cancels the statistics updater and resets
1590 * the interface.
1591 */
1592static void
1593fxp_stop(struct fxp_softc *sc)
1594{
1595        struct ifnet *ifp = &sc->sc_if;
1596        struct fxp_cb_tx *txp;
1597        int i;
1598
1599        DBGLVL_PRINTK(2,"fxp_stop called\n");
1600
1601        ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1602        ifp->if_timer = 0;
1603
1604        /*
1605         * stop stats updater.
1606         */
1607        if (sc->stat_ch == fxp_timeout_running) {
1608          DBGLVL_PRINTK(3,"fxp_stop: trying to stop stat update tick\n");
1609          sc->stat_ch = fxp_timeout_stop_rq;
1610          while(sc->stat_ch != fxp_timeout_stopped) {
1611            rtems_bsdnet_semaphore_release();
1612            rtems_task_wake_after(fxp_ticksPerSecond);
1613            rtems_bsdnet_semaphore_obtain();
1614          }
1615          DBGLVL_PRINTK(3,"fxp_stop: stat update tick stopped\n");
1616        }
1617        /*
1618         * Issue software reset
1619         */
1620        DBGLVL_PRINTK(3,"fxp_stop: issue software reset\n");
1621        CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
1622        DELAY(10);
1623
1624        /*
1625         * Release any xmit buffers.
1626         */
1627        DBGLVL_PRINTK(3,"fxp_stop: releasing xmit buffers\n");
1628        txp = sc->cbl_base;
1629        if (txp != NULL) {
1630                for (i = 0; i < FXP_NTXCB; i++) {
1631                        if (txp[i].mb_head != NULL) {
1632                                m_freem(txp[i].mb_head);
1633                                txp[i].mb_head = NULL;
1634                        }
1635                }
1636        }
1637        sc->tx_queued = 0;
1638
1639        /*
1640         * Free all the receive buffers then reallocate/reinitialize
1641         */
1642        DBGLVL_PRINTK(3,"fxp_stop: free and reinit all receive buffers\n");
1643        if (sc->rfa_headm != NULL)
1644                m_freem(sc->rfa_headm);
1645        sc->rfa_headm = NULL;
1646        sc->rfa_tailm = NULL;
1647        for (i = 0; i < FXP_NRFABUFS; i++) {
1648                if (fxp_add_rfabuf(sc, NULL) != 0) {
1649                        /*
1650                         * This "can't happen" - we're at splimp()
1651                         * and we just freed all the buffers we need
1652                         * above.
1653                         */
1654                        panic("fxp_stop: no buffers!");
1655                }
1656        }
1657        DBGLVL_PRINTK(2,"fxp_stop: finished\n");
1658}
1659
1660/*
1661 * Watchdog/transmission transmit timeout handler. Called when a
1662 * transmission is started on the interface, but no interrupt is
1663 * received before the timeout. This usually indicates that the
1664 * card has wedged for some reason.
1665 */
1666static void
1667fxp_watchdog(struct ifnet *ifp)
1668{
1669        struct fxp_softc *sc = ifp->if_softc;
1670
1671        device_printf(sc->dev, "device timeout\n");
1672        ifp->if_oerrors++;
1673
1674        fxp_init(sc);
1675}
1676
1677static void
1678fxp_init(void *xsc)
1679{
1680        struct fxp_softc *sc = xsc;
1681        struct ifnet *ifp = &sc->sc_if;
1682        struct fxp_cb_config *cbp;
1683        struct fxp_cb_ias *cb_ias;
1684        struct fxp_cb_tx *txp;
1685        int i, prm, s;
1686
1687rtems_task_wake_after(100);
1688        DBGLVL_PRINTK(2,"fxp_init called\n");
1689
1690        s = splimp();
1691        /*
1692         * Cancel any pending I/O
1693         */
1694        /*
1695         * E. Norum 2004-10-11
1696         * Add line suggested by "Eugene Denisov" <dea@sendmail.ru>.
1697         * Prevents lockup at initialization.
1698         */
1699        sc->stat_ch = fxp_timeout_stopped;
1700        fxp_stop(sc);
1701
1702        prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
1703
1704        DBGLVL_PRINTK(5,"fxp_init: Initializing base of CBL and RFA memory\n");
1705        /*
1706         * Initialize base of CBL and RFA memory. Loading with zero
1707         * sets it up for regular linear addressing.
1708         */
1709        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
1710        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_BASE);
1711
1712        fxp_scb_wait(sc);
1713        fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_BASE);
1714
1715        /*
1716         * Initialize base of dump-stats buffer.
1717         */
1718        DBGLVL_PRINTK(5,"fxp_init: Initializing base of dump-stats buffer\n");
1719        fxp_scb_wait(sc);
1720        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats));
1721        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMP_ADR);
1722
1723        /*
1724         * We temporarily use memory that contains the TxCB list to
1725         * construct the config CB. The TxCB list memory is rebuilt
1726         * later.
1727         */
1728        cbp = (struct fxp_cb_config *) sc->cbl_base;
1729        DBGLVL_PRINTK(5,"fxp_init: cbp = 0x%x\n",cbp);
1730
1731        /*
1732         * This memcpy is kind of disgusting, but there are a bunch of must be
1733         * zero and must be one bits in this structure and this is the easiest
1734         * way to initialize them all to proper values.
1735         */
1736        memcpy( (void *)(u_int32_t*)(volatile void *)&cbp->cb_status,
1737                fxp_cb_config_template,
1738                sizeof(fxp_cb_config_template));
1739
1740        cbp->cb_status =        0;
1741        cbp->cb_command =       FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
1742        cbp->link_addr =        -1;     /* (no) next command */
1743        cbp->byte_count =       22;     /* (22) bytes to config */
1744        cbp->rx_fifo_limit =    8;      /* rx fifo threshold (32 bytes) */
1745        cbp->tx_fifo_limit =    0;      /* tx fifo threshold (0 bytes) */
1746        cbp->adaptive_ifs =     0;      /* (no) adaptive interframe spacing */
1747        cbp->mwi_enable =       sc->flags & FXP_FLAG_MWI_ENABLE ? 1 : 0;
1748        cbp->type_enable =      0;      /* actually reserved */
1749        cbp->read_align_en =    sc->flags & FXP_FLAG_READ_ALIGN ? 1 : 0;
1750        cbp->end_wr_on_cl =     sc->flags & FXP_FLAG_WRITE_ALIGN ? 1 : 0;
1751        cbp->rx_dma_bytecount = 0;      /* (no) rx DMA max */
1752        cbp->tx_dma_bytecount = 0;      /* (no) tx DMA max */
1753        cbp->dma_mbce =         0;      /* (disable) dma max counters */
1754        cbp->late_scb =         0;      /* (don't) defer SCB update */
1755        cbp->direct_dma_dis =   1;      /* disable direct rcv dma mode */
1756        cbp->tno_int_or_tco_en =0;      /* (disable) tx not okay interrupt */
1757        cbp->ci_int =           1;      /* interrupt on CU idle */
1758        cbp->ext_txcb_dis =     sc->flags & FXP_FLAG_EXT_TXCB ? 0 : 1;
1759        cbp->ext_stats_dis =    1;      /* disable extended counters */
1760        cbp->keep_overrun_rx =  0;      /* don't pass overrun frames to host */
1761        cbp->save_bf =          sc->chip == FXP_CHIP_82557 ? 1 : prm;
1762        cbp->disc_short_rx =    !prm;   /* discard short packets */
1763        cbp->underrun_retry =   1;      /* retry mode (once) on DMA underrun */
1764        cbp->two_frames =       0;      /* do not limit FIFO to 2 frames */
1765        cbp->dyn_tbd =          0;      /* (no) dynamic TBD mode */
1766        cbp->mediatype =        sc->flags & FXP_FLAG_SERIAL_MEDIA ? 0 : 1;
1767        cbp->csma_dis =         0;      /* (don't) disable link */
1768        cbp->tcp_udp_cksum =    0;      /* (don't) enable checksum */
1769        cbp->vlan_tco =         0;      /* (don't) enable vlan wakeup */
1770        cbp->link_wake_en =     0;      /* (don't) assert PME# on link change */
1771        cbp->arp_wake_en =      0;      /* (don't) assert PME# on arp */
1772        cbp->mc_wake_en =       0;      /* (don't) enable PME# on mcmatch */
1773        cbp->nsai =             1;      /* (don't) disable source addr insert */
1774        cbp->preamble_length =  2;      /* (7 byte) preamble */
1775        cbp->loopback =         0;      /* (don't) loopback */
1776        cbp->linear_priority =  0;      /* (normal CSMA/CD operation) */
1777        cbp->linear_pri_mode =  0;      /* (wait after xmit only) */
1778        cbp->interfrm_spacing = 6;      /* (96 bits of) interframe spacing */
1779        cbp->promiscuous =      prm;    /* promiscuous mode */
1780        cbp->bcast_disable =    0;      /* (don't) disable broadcasts */
1781        cbp->wait_after_win =   0;      /* (don't) enable modified backoff alg*/
1782        cbp->ignore_ul =        0;      /* consider U/L bit in IA matching */
1783        cbp->crc16_en =         0;      /* (don't) enable crc-16 algorithm */
1784        cbp->crscdt =           sc->flags & FXP_FLAG_SERIAL_MEDIA ? 1 : 0;
1785
1786        cbp->stripping =        !prm;   /* truncate rx packet to byte count */
1787        cbp->padding =          1;      /* (do) pad short tx packets */
1788        cbp->rcv_crc_xfer =     0;      /* (don't) xfer CRC to host */
1789        cbp->long_rx_en =       sc->flags & FXP_FLAG_LONG_PKT_EN ? 1 : 0;
1790        cbp->ia_wake_en =       0;      /* (don't) wake up on address match */
1791        cbp->magic_pkt_dis =    0;      /* (don't) disable magic packet */
1792                                        /* must set wake_en in PMCSR also */
1793        cbp->force_fdx =        0;      /* (don't) force full duplex */
1794        cbp->fdx_pin_en =       1;      /* (enable) FDX# pin */
1795        cbp->multi_ia =         0;      /* (don't) accept multiple IAs */
1796        cbp->mc_all =           sc->flags & FXP_FLAG_ALL_MCAST ? 1 : 0;
1797
1798        DBGLVL_PRINTK(5,"fxp_init: cbp initialized\n");
1799        if (sc->chip == FXP_CHIP_82557) {
1800                /*
1801                 * The 82557 has no hardware flow control, the values
1802                 * below are the defaults for the chip.
1803                 */
1804                cbp->fc_delay_lsb =     0;
1805                cbp->fc_delay_msb =     0x40;
1806                cbp->pri_fc_thresh =    3;
1807                cbp->tx_fc_dis =        0;
1808                cbp->rx_fc_restop =     0;
1809                cbp->rx_fc_restart =    0;
1810                cbp->fc_filter =        0;
1811                cbp->pri_fc_loc =       1;
1812        } else {
1813                cbp->fc_delay_lsb =     0x1f;
1814                cbp->fc_delay_msb =     0x01;
1815                cbp->pri_fc_thresh =    3;
1816                cbp->tx_fc_dis =        0;      /* enable transmit FC */
1817                cbp->rx_fc_restop =     1;      /* enable FC restop frames */
1818                cbp->rx_fc_restart =    1;      /* enable FC restart frames */
1819                cbp->fc_filter =        !prm;   /* drop FC frames to host */
1820                cbp->pri_fc_loc =       1;      /* FC pri location (byte31) */
1821        }
1822
1823        /*
1824         * Start the config command/DMA.
1825         */
1826        DBGLVL_PRINTK(5,"fxp_init: starting config command/DMA\n");
1827        fxp_scb_wait(sc);
1828        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&cbp->cb_status));
1829        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
1830        /* ...and wait for it to complete. */
1831        fxp_dma_wait(&cbp->cb_status, sc);
1832
1833        /*
1834         * Now initialize the station address. Temporarily use the TxCB
1835         * memory area like we did above for the config CB.
1836         */
1837        DBGLVL_PRINTK(5,"fxp_init: initialize station address\n");
1838        cb_ias = (struct fxp_cb_ias *) sc->cbl_base;
1839        cb_ias->cb_status = 0;
1840        cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
1841        cb_ias->link_addr = -1;
1842        memcpy((void *)(u_int32_t*)(volatile void *)cb_ias->macaddr,
1843            sc->arpcom.ac_enaddr,
1844            sizeof(sc->arpcom.ac_enaddr));
1845
1846        /*
1847         * Start the IAS (Individual Address Setup) command/DMA.
1848         */
1849        DBGLVL_PRINTK(5,"fxp_init: start IAS command/DMA\n");
1850        fxp_scb_wait(sc);
1851        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
1852        /* ...and wait for it to complete. */
1853        fxp_dma_wait(&cb_ias->cb_status, sc);
1854
1855        /*
1856         * Initialize transmit control block (TxCB) list.
1857         */
1858
1859        DBGLVL_PRINTK(5,"fxp_init: initialize TxCB list\n");
1860        txp = sc->cbl_base;
1861        memset(txp, 0, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
1862        for (i = 0; i < FXP_NTXCB; i++) {
1863                txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
1864                txp[i].cb_command = FXP_CB_COMMAND_NOP;
1865                txp[i].link_addr =
1866                    vtophys(&txp[(i + 1) & FXP_TXCB_MASK].cb_status);
1867                if (sc->flags & FXP_FLAG_EXT_TXCB)
1868                        txp[i].tbd_array_addr = vtophys(&txp[i].tbd[2]);
1869                else
1870                        txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
1871                txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
1872        }
1873        /*
1874         * Set the suspend flag on the first TxCB and start the control
1875         * unit. It will execute the NOP and then suspend.
1876         */
1877        DBGLVL_PRINTK(5,"fxp_init: setup suspend flag\n");
1878        txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
1879        sc->cbl_first = sc->cbl_last = txp;
1880        sc->tx_queued = 1;
1881
1882        fxp_scb_wait(sc);
1883        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
1884
1885        /*
1886         * Initialize receiver buffer area - RFA.
1887         */
1888        DBGLVL_PRINTK(5,"fxp_init: initialize RFA\n");
1889        fxp_scb_wait(sc);
1890        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
1891            vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE);
1892        fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START);
1893
1894#ifdef NOTUSED
1895        /*
1896         * Set current media.
1897         */
1898        if (sc->miibus != NULL)
1899                mii_mediachg(device_get_softc(sc->miibus));
1900#endif
1901
1902        ifp->if_flags |= IFF_RUNNING;
1903        ifp->if_flags &= ~IFF_OACTIVE;
1904
1905        if (sc->daemonTid == 0) {
1906                /*
1907                 * Start driver task
1908                 */
1909                sc->daemonTid = rtems_bsdnet_newproc ("FXPd", 4096, fxp_daemon, sc);
1910
1911        }
1912        /*
1913         * Enable interrupts.
1914         */
1915        CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, 0);
1916        splx(s);
1917
1918        /*
1919         * Start stats updater.
1920         */
1921        sc->stat_ch = fxp_timeout_running;
1922        DBGLVL_PRINTK(2,"fxp_init: stats updater timeout called with hz=%d\n", hz);
1923        timeout(fxp_tick, sc, hz);
1924        DBGLVL_PRINTK(2,"fxp_init finished\n");
1925}
1926
1927#ifdef NOTUSED
1928static int
1929fxp_serial_ifmedia_upd(struct ifnet *ifp)
1930{
1931
1932        return (0);
1933}
1934
1935static void
1936fxp_serial_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1937{
1938
1939        ifmr->ifm_active = IFM_ETHER|IFM_MANUAL;
1940}
1941
1942/*
1943 * Change media according to request.
1944 */
1945static int
1946fxp_ifmedia_upd(struct ifnet *ifp)
1947{
1948        struct fxp_softc *sc = ifp->if_softc;
1949        struct mii_data *mii;
1950
1951        mii = device_get_softc(sc->miibus);
1952        mii_mediachg(mii);
1953        return (0);
1954}
1955
1956/*
1957 * Notify the world which media we're using.
1958 */
1959static void
1960fxp_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1961{
1962        struct fxp_softc *sc = ifp->if_softc;
1963        struct mii_data *mii;
1964
1965        mii = device_get_softc(sc->miibus);
1966        mii_pollstat(mii);
1967        ifmr->ifm_active = mii->mii_media_active;
1968        ifmr->ifm_status = mii->mii_media_status;
1969
1970        if (ifmr->ifm_status & IFM_10_T && sc->flags & FXP_FLAG_CU_RESUME_BUG)
1971                sc->cu_resume_bug = 1;
1972        else
1973                sc->cu_resume_bug = 0;
1974}
1975#endif
1976
1977/*
1978 * Add a buffer to the end of the RFA buffer list.
1979 * Return 0 if successful, 1 for failure. A failure results in
1980 * adding the 'oldm' (if non-NULL) on to the end of the list -
1981 * tossing out its old contents and recycling it.
1982 * The RFA struct is stuck at the beginning of mbuf cluster and the
1983 * data pointer is fixed up to point just past it.
1984 */
1985static int
1986fxp_add_rfabuf(struct fxp_softc *sc, struct mbuf *oldm)
1987{
1988        u_int32_t v;
1989        struct mbuf *m;
1990        struct fxp_rfa *rfa, *p_rfa;
1991
1992        DBGLVL_PRINTK(4,"fxp_add_rfabuf called\n");
1993
1994        MGETHDR(m, M_DONTWAIT, MT_DATA);
1995        if (m != NULL) {
1996                MCLGET(m, M_DONTWAIT);
1997                if ((m->m_flags & M_EXT) == 0) {
1998                        m_freem(m);
1999                        if (oldm == NULL)
2000                                return 1;
2001                        m = oldm;
2002                        m->m_data = m->m_ext.ext_buf;
2003                }
2004        } else {
2005                if (oldm == NULL)
2006                        return 1;
2007                m = oldm;
2008                m->m_data = m->m_ext.ext_buf;
2009        }
2010
2011        /*
2012         * Move the data pointer up so that the incoming data packet
2013         * will be 32-bit aligned.
2014         */
2015        m->m_data += RFA_ALIGNMENT_FUDGE;
2016
2017        /*
2018         * Get a pointer to the base of the mbuf cluster and move
2019         * data start past it.
2020         */
2021        rfa = mtod(m, struct fxp_rfa *);
2022        m->m_data += sizeof(struct fxp_rfa);
2023        rfa->size = (u_int16_t)(MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE);
2024
2025        /*
2026         * Initialize the rest of the RFA.  Note that since the RFA
2027         * is misaligned, we cannot store values directly.  Instead,
2028         * we use an optimized, inline copy.
2029         */
2030
2031        rfa->rfa_status = 0;
2032        rfa->rfa_control = FXP_RFA_CONTROL_EL;
2033        rfa->actual_size = 0;
2034
2035        v = -1;
2036        fxp_lwcopy(&v, (volatile u_int32_t*) rfa->link_addr);
2037        fxp_lwcopy(&v, (volatile u_int32_t*) rfa->rbd_addr);
2038
2039        /*
2040         * If there are other buffers already on the list, attach this
2041         * one to the end by fixing up the tail to point to this one.
2042         */
2043        if (sc->rfa_headm != NULL) {
2044                p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf +
2045                    RFA_ALIGNMENT_FUDGE);
2046                sc->rfa_tailm->m_next = m;
2047                v = vtophys(rfa);
2048                fxp_lwcopy(&v, (volatile u_int32_t*) p_rfa->link_addr);
2049                p_rfa->rfa_control = 0;
2050        } else {
2051                sc->rfa_headm = m;
2052        }
2053        sc->rfa_tailm = m;
2054
2055        return (m == oldm);
2056}
2057
2058#ifdef NOTUSED
2059static volatile int
2060fxp_miibus_readreg(device_t dev, int phy, int reg)
2061{
2062        struct fxp_softc *sc = device_get_softc(dev);
2063        int count = 10000;
2064        int value;
2065
2066        CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
2067            (FXP_MDI_READ << 26) | (reg << 16) | (phy << 21));
2068
2069        while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0
2070            && count--)
2071                DELAY(10);
2072
2073        if (count <= 0)
2074                device_printf(dev, "fxp_miibus_readreg: timed out\n");
2075
2076        return (value & 0xffff);
2077}
2078
2079static void
2080fxp_miibus_writereg(device_t dev, int phy, int reg, int value)
2081{
2082        struct fxp_softc *sc = device_get_softc(dev);
2083        int count = 10000;
2084
2085        CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
2086            (FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) |
2087            (value & 0xffff));
2088
2089        while ((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 &&
2090            count--)
2091                DELAY(10);
2092
2093        if (count <= 0)
2094                device_printf(dev, "fxp_miibus_writereg: timed out\n");
2095}
2096#endif
2097
2098static int
2099fxp_ioctl(struct ifnet *ifp, int command, caddr_t data)
2100{
2101        struct fxp_softc *sc = ifp->if_softc;
2102#ifdef NOTUSED
2103        struct ifreq *ifr = (struct ifreq *)data;
2104        struct mii_data *mii;
2105#endif
2106        int s, error = 0;
2107
2108        DBGLVL_PRINTK(2,"fxp_ioctl called\n");
2109
2110        s = splimp();
2111
2112        switch (command) {
2113        case SIOCSIFADDR:
2114        case SIOCGIFADDR:
2115        case SIOCSIFMTU:
2116                error = ether_ioctl(ifp, command, data);
2117                break;
2118
2119        case SIOCSIFFLAGS:
2120                if (ifp->if_flags & IFF_ALLMULTI)
2121                        sc->flags |= FXP_FLAG_ALL_MCAST;
2122                else
2123                        sc->flags &= ~FXP_FLAG_ALL_MCAST;
2124
2125                /*
2126                 * If interface is marked up and not running, then start it.
2127                 * If it is marked down and running, stop it.
2128                 * XXX If it's up then re-initialize it. This is so flags
2129                 * such as IFF_PROMISC are handled.
2130                 */
2131                if (ifp->if_flags & IFF_UP) {
2132                        fxp_init(sc);
2133                } else {
2134                        if (ifp->if_flags & IFF_RUNNING)
2135                                fxp_stop(sc);
2136                }
2137                break;
2138
2139        case SIOCADDMULTI:
2140        case SIOCDELMULTI:
2141                if (ifp->if_flags & IFF_ALLMULTI)
2142                        sc->flags |= FXP_FLAG_ALL_MCAST;
2143                else
2144                        sc->flags &= ~FXP_FLAG_ALL_MCAST;
2145                /*
2146                 * Multicast list has changed; set the hardware filter
2147                 * accordingly.
2148                 */
2149                if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0)
2150                        fxp_mc_setup(sc);
2151                /*
2152                 * fxp_mc_setup() can set FXP_FLAG_ALL_MCAST, so check it
2153                 * again rather than else {}.
2154                 */
2155                if (sc->flags & FXP_FLAG_ALL_MCAST)
2156                        fxp_init(sc);
2157                error = 0;
2158                break;
2159
2160#ifdef NOTUSED
2161        case SIOCSIFMEDIA:
2162        case SIOCGIFMEDIA:
2163                if (sc->miibus != NULL) {
2164                        mii = device_get_softc(sc->miibus);
2165                        error = ifmedia_ioctl(ifp, ifr,
2166                            &mii->mii_media, command);
2167                } else {
2168                        error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command);
2169                }
2170                break;
2171#endif
2172
2173    case SIO_RTEMS_SHOW_STATS:
2174        fxp_stats(sc);
2175        break;
2176
2177        default:
2178                error = EINVAL;
2179        }
2180        splx(s);
2181        return (error);
2182}
2183
2184/*
2185 * Program the multicast filter.
2186 *
2187 * We have an artificial restriction that the multicast setup command
2188 * must be the first command in the chain, so we take steps to ensure
2189 * this. By requiring this, it allows us to keep up the performance of
2190 * the pre-initialized command ring (esp. link pointers) by not actually
2191 * inserting the mcsetup command in the ring - i.e. its link pointer
2192 * points to the TxCB ring, but the mcsetup descriptor itself is not part
2193 * of it. We then can do 'CU_START' on the mcsetup descriptor and have it
2194 * lead into the regular TxCB ring when it completes.
2195 *
2196 * This function must be called at splimp.
2197 */
2198static void
2199fxp_mc_setup(struct fxp_softc *sc)
2200{
2201        struct fxp_cb_mcs *mcsp = sc->mcsp;
2202        struct ifnet *ifp = &sc->sc_if;
2203#ifdef NOTUSED
2204        struct ifmultiaddr *ifma;
2205#endif
2206        int nmcasts;
2207        int count;
2208
2209        DBGLVL_PRINTK(2,"fxp_mc_setup called\n");
2210
2211        /*
2212         * If there are queued commands, we must wait until they are all
2213         * completed. If we are already waiting, then add a NOP command
2214         * with interrupt option so that we're notified when all commands
2215         * have been completed - fxp_start() ensures that no additional
2216         * TX commands will be added when need_mcsetup is true.
2217         */
2218        if (sc->tx_queued) {
2219                struct fxp_cb_tx *txp;
2220
2221                /*
2222                 * need_mcsetup will be true if we are already waiting for the
2223                 * NOP command to be completed (see below). In this case, bail.
2224                 */
2225                if (sc->need_mcsetup)
2226                        return;
2227                sc->need_mcsetup = 1;
2228
2229                /*
2230                 * Add a NOP command with interrupt so that we are notified when all
2231                 * TX commands have been processed.
2232                 */
2233                txp = sc->cbl_last->next;
2234                txp->mb_head = NULL;
2235                txp->cb_status = 0;
2236                txp->cb_command = FXP_CB_COMMAND_NOP |
2237                    FXP_CB_COMMAND_S | FXP_CB_COMMAND_I;
2238                /*
2239                 * Advance the end of list forward.
2240                 */
2241                sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
2242                sc->cbl_last = txp;
2243                sc->tx_queued++;
2244                /*
2245                 * Issue a resume in case the CU has just suspended.
2246                 */
2247                fxp_scb_wait(sc);
2248                fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME);
2249                /*
2250                 * Set a 5 second timer just in case we don't hear from the
2251                 * card again.
2252                 */
2253                ifp->if_timer = 5;
2254
2255                return;
2256        }
2257        sc->need_mcsetup = 0;
2258
2259        /*
2260         * Initialize multicast setup descriptor.
2261         */
2262        mcsp->next = sc->cbl_base;
2263        mcsp->mb_head = NULL;
2264        mcsp->cb_status = 0;
2265        mcsp->cb_command = FXP_CB_COMMAND_MCAS |
2266            FXP_CB_COMMAND_S | FXP_CB_COMMAND_I;
2267        mcsp->link_addr = vtophys(&sc->cbl_base->cb_status);
2268
2269        nmcasts = 0;
2270#ifdef NOTUSED /* FIXME: Multicast not supported? */
2271        if ((sc->flags & FXP_FLAG_ALL_MCAST) == 0) {
2272#if __FreeBSD_version < 500000
2273                LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2274#else
2275                TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2276#endif
2277                        if (ifma->ifma_addr->sa_family != AF_LINK)
2278                                continue;
2279                        if (nmcasts >= MAXMCADDR) {
2280                                sc->flags |= FXP_FLAG_ALL_MCAST;
2281                                nmcasts = 0;
2282                                break;
2283                        }
2284                        memcpy((void *)(uintptr_t)(volatile void *)
2285                                &sc->mcsp->mc_addr[nmcasts][0],
2286                                LLADDR((struct sockaddr_dl *)ifma->ifma_addr), 6);
2287                        nmcasts++;
2288                }
2289        }
2290#endif
2291        mcsp->mc_cnt = nmcasts * 6;
2292        sc->cbl_first = sc->cbl_last = (struct fxp_cb_tx *) mcsp;
2293        sc->tx_queued = 1;
2294
2295        /*
2296         * Wait until command unit is not active. This should never
2297         * be the case when nothing is queued, but make sure anyway.
2298         */
2299        count = 100;
2300        while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) ==
2301            FXP_SCB_CUS_ACTIVE && --count)
2302                DELAY(10);
2303        if (count == 0) {
2304                device_printf(sc->dev, "command queue timeout\n");
2305                return;
2306        }
2307
2308        /*
2309         * Start the multicast setup command.
2310         */
2311        fxp_scb_wait(sc);
2312        CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(&mcsp->cb_status));
2313        fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
2314
2315        ifp->if_timer = 2;
2316        return;
2317        }
2318
2319#endif /* defined(__i386__) */
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