1 | /* |
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2 | * Gaisler Research ethernet MAC driver |
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3 | * adapted from Opencores driver by Marko Isomaki |
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4 | * |
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5 | * The license and distribution terms for this file may be |
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6 | * found in the file LICENSE in this distribution or at |
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7 | * http://www.rtems.com/license/LICENSE. |
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8 | * |
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9 | * $Id$ |
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10 | * |
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11 | * 2007-09-07, Ported GBIT support from 4.6.5 |
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12 | */ |
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13 | |
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14 | #include <rtems.h> |
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15 | #include <bsp.h> |
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16 | |
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17 | #ifdef GRETH_SUPPORTED |
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18 | |
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19 | #include <inttypes.h> |
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20 | #include <errno.h> |
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21 | #include <rtems/bspIo.h> |
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22 | #include <stdlib.h> |
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23 | #include <stdio.h> |
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24 | #include <stdarg.h> |
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25 | #include <rtems/error.h> |
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26 | #include <rtems/rtems_bsdnet.h> |
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27 | #include "greth.h" |
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28 | |
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29 | #include <sys/param.h> |
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30 | #include <sys/mbuf.h> |
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31 | |
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32 | #include <sys/socket.h> |
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33 | #include <sys/sockio.h> |
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34 | #include <net/if.h> |
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35 | #include <netinet/in.h> |
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36 | #include <netinet/if_ether.h> |
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37 | |
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38 | #ifdef malloc |
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39 | #undef malloc |
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40 | #endif |
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41 | #ifdef free |
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42 | #undef free |
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43 | #endif |
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44 | |
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45 | /* #define GRETH_DEBUG */ |
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46 | |
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47 | #ifdef CPU_U32_FIX |
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48 | extern void ipalign(struct mbuf *m); |
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49 | #endif |
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50 | |
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51 | /* Used when reading from memory written by GRETH DMA unit */ |
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52 | #ifndef GRETH_MEM_LOAD |
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53 | #define GRETH_MEM_LOAD(addr) (*(volatile unsigned int *)(addr)) |
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54 | #endif |
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55 | |
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56 | /* |
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57 | * Number of OCs supported by this driver |
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58 | */ |
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59 | #define NOCDRIVER 1 |
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60 | |
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61 | /* |
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62 | * Receive buffer size -- Allow for a full ethernet packet including CRC |
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63 | */ |
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64 | #define RBUF_SIZE 1518 |
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65 | |
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66 | #define ET_MINLEN 64 /* minimum message length */ |
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67 | |
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68 | /* |
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69 | * RTEMS event used by interrupt handler to signal driver tasks. |
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70 | * This must not be any of the events used by the network task synchronization. |
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71 | */ |
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72 | #define INTERRUPT_EVENT RTEMS_EVENT_1 |
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73 | |
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74 | /* |
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75 | * RTEMS event used to start transmit daemon. |
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76 | * This must not be the same as INTERRUPT_EVENT. |
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77 | */ |
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78 | #define START_TRANSMIT_EVENT RTEMS_EVENT_2 |
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79 | |
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80 | /* event to send when tx buffers become available */ |
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81 | #define GRETH_TX_WAIT_EVENT RTEMS_EVENT_3 |
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82 | |
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83 | #if (MCLBYTES < RBUF_SIZE) |
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84 | # error "Driver must have MCLBYTES > RBUF_SIZE" |
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85 | #endif |
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86 | |
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87 | /* 4s Autonegotiation Timeout */ |
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88 | #ifndef GRETH_AUTONEGO_TIMEOUT_MS |
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89 | #define GRETH_AUTONEGO_TIMEOUT_MS 4000 |
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90 | #endif |
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91 | const struct timespec greth_tan = { |
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92 | GRETH_AUTONEGO_TIMEOUT_MS/1000, |
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93 | GRETH_AUTONEGO_TIMEOUT_MS*1000000 |
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94 | }; |
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95 | |
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96 | /* For optimizing the autonegotiation time */ |
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97 | #define GRETH_AUTONEGO_PRINT_TIME |
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98 | |
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99 | /* Ethernet buffer descriptor */ |
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100 | |
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101 | typedef struct _greth_rxtxdesc { |
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102 | volatile uint32_t ctrl; /* Length and status */ |
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103 | uint32_t *addr; /* Buffer pointer */ |
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104 | } greth_rxtxdesc; |
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105 | |
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106 | |
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107 | /* |
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108 | * Per-device data |
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109 | */ |
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110 | struct greth_softc |
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111 | { |
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112 | |
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113 | struct arpcom arpcom; |
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114 | |
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115 | greth_regs *regs; |
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116 | |
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117 | int acceptBroadcast; |
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118 | rtems_id daemonTid; |
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119 | |
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120 | unsigned int tx_ptr; |
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121 | unsigned int tx_dptr; |
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122 | unsigned int tx_cnt; |
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123 | unsigned int rx_ptr; |
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124 | unsigned int txbufs; |
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125 | unsigned int rxbufs; |
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126 | greth_rxtxdesc *txdesc; |
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127 | greth_rxtxdesc *rxdesc; |
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128 | struct mbuf **rxmbuf; |
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129 | struct mbuf **txmbuf; |
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130 | rtems_vector_number vector; |
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131 | |
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132 | /* TX descriptor interrupt generation */ |
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133 | int tx_int_gen; |
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134 | int tx_int_gen_cur; |
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135 | struct mbuf *next_tx_mbuf; |
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136 | int max_fragsize; |
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137 | |
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138 | /*Status*/ |
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139 | struct phy_device_info phydev; |
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140 | int fd; |
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141 | int sp; |
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142 | int gb; |
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143 | int gbit_mac; |
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144 | int auto_neg; |
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145 | struct timespec auto_neg_time; |
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146 | |
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147 | /* |
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148 | * Statistics |
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149 | */ |
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150 | unsigned long rxInterrupts; |
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151 | |
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152 | unsigned long rxPackets; |
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153 | unsigned long rxLengthError; |
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154 | unsigned long rxNonOctet; |
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155 | unsigned long rxBadCRC; |
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156 | unsigned long rxOverrun; |
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157 | |
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158 | unsigned long txInterrupts; |
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159 | |
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160 | unsigned long txDeferred; |
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161 | unsigned long txHeartbeat; |
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162 | unsigned long txLateCollision; |
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163 | unsigned long txRetryLimit; |
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164 | unsigned long txUnderrun; |
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165 | |
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166 | }; |
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167 | |
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168 | static struct greth_softc greth; |
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169 | |
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170 | int greth_process_tx_gbit(struct greth_softc *sc); |
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171 | int greth_process_tx(struct greth_softc *sc); |
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172 | |
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173 | static char *almalloc(int sz) |
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174 | { |
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175 | char *tmp; |
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176 | tmp = calloc(1,2*sz); |
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177 | tmp = (char *) (((uintptr_t)tmp+sz) & ~(sz -1)); |
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178 | return(tmp); |
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179 | } |
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180 | |
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181 | /* GRETH interrupt handler */ |
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182 | |
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183 | void greth_interrupt_handler (void *arg) |
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184 | { |
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185 | uint32_t status; |
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186 | uint32_t ctrl; |
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187 | rtems_event_set events = 0; |
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188 | struct greth_softc *greth = arg; |
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189 | |
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190 | /* read and clear interrupt cause */ |
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191 | status = greth->regs->status; |
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192 | greth->regs->status = status; |
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193 | ctrl = greth->regs->ctrl; |
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194 | |
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195 | /* Frame received? */ |
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196 | if ((ctrl & GRETH_CTRL_RXIRQ) && (status & (GRETH_STATUS_RXERR | GRETH_STATUS_RXIRQ))) |
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197 | { |
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198 | greth->rxInterrupts++; |
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199 | /* Stop RX-Error and RX-Packet interrupts */ |
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200 | ctrl &= ~GRETH_CTRL_RXIRQ; |
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201 | events |= INTERRUPT_EVENT; |
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202 | } |
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203 | |
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204 | if ( (ctrl & GRETH_CTRL_TXIRQ) && (status & (GRETH_STATUS_TXERR | GRETH_STATUS_TXIRQ)) ) |
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205 | { |
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206 | greth->txInterrupts++; |
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207 | ctrl &= ~GRETH_CTRL_TXIRQ; |
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208 | events |= GRETH_TX_WAIT_EVENT; |
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209 | } |
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210 | |
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211 | /* Clear interrupt sources */ |
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212 | greth->regs->ctrl = ctrl; |
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213 | |
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214 | /* Send the event(s) */ |
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215 | if ( events ) |
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216 | rtems_event_send (greth->daemonTid, events); |
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217 | } |
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218 | |
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219 | static uint32_t read_mii(uint32_t phy_addr, uint32_t reg_addr) |
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220 | { |
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221 | while (greth.regs->mdio_ctrl & GRETH_MDIO_BUSY) {} |
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222 | greth.regs->mdio_ctrl = (phy_addr << 11) | (reg_addr << 6) | GRETH_MDIO_READ; |
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223 | while (greth.regs->mdio_ctrl & GRETH_MDIO_BUSY) {} |
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224 | if (!(greth.regs->mdio_ctrl & GRETH_MDIO_LINKFAIL)) |
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225 | return((greth.regs->mdio_ctrl >> 16) & 0xFFFF); |
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226 | else { |
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227 | printf("greth: failed to read mii\n"); |
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228 | return (0); |
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229 | } |
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230 | } |
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231 | |
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232 | static void write_mii(uint32_t phy_addr, uint32_t reg_addr, uint32_t data) |
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233 | { |
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234 | while (greth.regs->mdio_ctrl & GRETH_MDIO_BUSY) {} |
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235 | greth.regs->mdio_ctrl = |
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236 | ((data & 0xFFFF) << 16) | (phy_addr << 11) | (reg_addr << 6) | GRETH_MDIO_WRITE; |
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237 | while (greth.regs->mdio_ctrl & GRETH_MDIO_BUSY) {} |
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238 | } |
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239 | |
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240 | static void print_init_info(struct greth_softc *sc) |
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241 | { |
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242 | printf("greth: driver attached\n"); |
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243 | if ( sc->auto_neg == -1 ){ |
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244 | printf("Auto negotiation timed out. Selecting default config\n"); |
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245 | } |
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246 | printf("**** PHY ****\n"); |
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247 | printf("Vendor: %x Device: %x Revision: %d\n",sc->phydev.vendor, sc->phydev.device, sc->phydev.rev); |
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248 | printf("Current Operating Mode: "); |
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249 | if (sc->gb) { |
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250 | printf("1000 Mbit "); |
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251 | } else if (sc->sp) { |
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252 | printf("100 Mbit "); |
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253 | } else { |
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254 | printf("10 Mbit "); |
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255 | } |
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256 | if (sc->fd) { |
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257 | printf("Full Duplex\n"); |
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258 | } else { |
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259 | printf("Half Duplex\n"); |
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260 | } |
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261 | #ifdef GRETH_AUTONEGO_PRINT_TIME |
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262 | if ( sc->auto_neg ) { |
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263 | printf("Autonegotiation Time: %dms\n", sc->auto_neg_time.tv_sec*1000 + |
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264 | sc->auto_neg_time.tv_nsec/1000000); |
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265 | } |
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266 | #endif |
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267 | } |
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268 | |
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269 | |
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270 | /* |
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271 | * Initialize the ethernet hardware |
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272 | */ |
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273 | static void |
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274 | greth_initialize_hardware (struct greth_softc *sc) |
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275 | { |
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276 | struct mbuf *m; |
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277 | int i; |
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278 | int phyaddr; |
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279 | int phyctrl; |
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280 | int phystatus; |
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281 | int tmp1; |
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282 | int tmp2; |
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283 | struct timespec tstart, tnow; |
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284 | |
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285 | greth_regs *regs; |
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286 | |
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287 | regs = sc->regs; |
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288 | |
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289 | /* Reset the controller. */ |
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290 | greth.rxInterrupts = 0; |
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291 | greth.rxPackets = 0; |
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292 | |
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293 | regs->ctrl = 0; |
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294 | regs->ctrl = GRETH_CTRL_RST; /* Reset ON */ |
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295 | regs->ctrl = 0; /* Reset OFF */ |
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296 | |
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297 | /* Check if mac is gbit capable*/ |
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298 | sc->gbit_mac = (regs->ctrl >> 27) & 1; |
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299 | |
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300 | /* Get the phy address which assumed to have been set |
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301 | correctly with the reset value in hardware*/ |
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302 | phyaddr = (regs->mdio_ctrl >> 11) & 0x1F; |
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303 | |
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304 | /* get phy control register default values */ |
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305 | while ((phyctrl = read_mii(phyaddr, 0)) & 0x8000) {} |
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306 | |
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307 | /* reset PHY and wait for completion */ |
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308 | write_mii(phyaddr, 0, 0x8000 | phyctrl); |
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309 | |
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310 | while ((read_mii(phyaddr, 0)) & 0x8000) {} |
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311 | |
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312 | /* Check if PHY is autoneg capable and then determine operating mode, |
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313 | otherwise force it to 10 Mbit halfduplex */ |
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314 | sc->gb = 0; |
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315 | sc->fd = 0; |
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316 | sc->sp = 0; |
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317 | sc->auto_neg = 0; |
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318 | _Timespec_Set_to_zero(&sc->auto_neg_time); |
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319 | if ((phyctrl >> 12) & 1) { |
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320 | /*wait for auto negotiation to complete*/ |
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321 | sc->auto_neg = 1; |
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322 | if (rtems_clock_get_uptime(&tstart) != RTEMS_SUCCESSFUL) |
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323 | printk("rtems_clock_get_uptime failed\n"); |
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324 | while (!(((phystatus = read_mii(phyaddr, 1)) >> 5) & 1)) { |
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325 | if (rtems_clock_get_uptime(&tnow) != RTEMS_SUCCESSFUL) |
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326 | printk("rtems_clock_get_uptime failed\n"); |
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327 | _Timespec_Subtract(&tstart, &tnow, &sc->auto_neg_time); |
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328 | if (_Timespec_Greater_than(&sc->auto_neg_time, &greth_tan)) { |
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329 | sc->auto_neg = -1; /* Failed */ |
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330 | tmp1 = read_mii(phyaddr, 0); |
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331 | sc->gb = ((phyctrl >> 6) & 1) && !((phyctrl >> 13) & 1); |
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332 | sc->sp = !((phyctrl >> 6) & 1) && ((phyctrl >> 13) & 1); |
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333 | sc->fd = (phyctrl >> 8) & 1; |
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334 | goto auto_neg_done; |
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335 | } |
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336 | /* Wait about 30ms, time is PHY dependent */ |
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337 | rtems_task_wake_after(rtems_clock_get_ticks_per_second()/32); |
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338 | } |
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339 | sc->phydev.adv = read_mii(phyaddr, 4); |
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340 | sc->phydev.part = read_mii(phyaddr, 5); |
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341 | if ((phystatus >> 8) & 1) { |
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342 | sc->phydev.extadv = read_mii(phyaddr, 9); |
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343 | sc->phydev.extpart = read_mii(phyaddr, 10); |
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344 | if ( (sc->phydev.extadv & GRETH_MII_EXTADV_1000FD) && |
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345 | (sc->phydev.extpart & GRETH_MII_EXTPRT_1000FD)) { |
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346 | sc->gb = 1; |
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347 | sc->fd = 1; |
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348 | } |
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349 | if ( (sc->phydev.extadv & GRETH_MII_EXTADV_1000HD) && |
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350 | (sc->phydev.extpart & GRETH_MII_EXTPRT_1000HD)) { |
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351 | sc->gb = 1; |
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352 | sc->fd = 0; |
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353 | } |
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354 | } |
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355 | if ((sc->gb == 0) || ((sc->gb == 1) && (sc->gbit_mac == 0))) { |
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356 | if ( (sc->phydev.adv & GRETH_MII_100TXFD) && |
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357 | (sc->phydev.part & GRETH_MII_100TXFD)) { |
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358 | sc->sp = 1; |
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359 | sc->fd = 1; |
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360 | } |
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361 | if ( (sc->phydev.adv & GRETH_MII_100TXHD) && |
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362 | (sc->phydev.part & GRETH_MII_100TXHD)) { |
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363 | sc->sp = 1; |
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364 | sc->fd = 0; |
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365 | } |
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366 | if ( (sc->phydev.adv & GRETH_MII_10FD) && |
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367 | (sc->phydev.part & GRETH_MII_10FD)) { |
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368 | sc->fd = 1; |
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369 | } |
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370 | } |
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371 | } |
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372 | auto_neg_done: |
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373 | sc->phydev.vendor = 0; |
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374 | sc->phydev.device = 0; |
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375 | sc->phydev.rev = 0; |
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376 | phystatus = read_mii(phyaddr, 1); |
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377 | |
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378 | /*Read out PHY info if extended registers are available */ |
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379 | if (phystatus & 1) { |
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380 | tmp1 = read_mii(phyaddr, 2); |
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381 | tmp2 = read_mii(phyaddr, 3); |
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382 | |
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383 | sc->phydev.vendor = (tmp1 << 6) | ((tmp2 >> 10) & 0x3F); |
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384 | sc->phydev.rev = tmp2 & 0xF; |
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385 | sc->phydev.device = (tmp2 >> 4) & 0x3F; |
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386 | } |
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387 | |
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388 | /* Force to 10 mbit half duplex if the 10/100 MAC is used with a 1000 PHY*/ |
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389 | /*check if marvell 88EE1111 PHY. Needs special reset handling */ |
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390 | if ((phystatus & 1) && (sc->phydev.vendor == 0x005043) && (sc->phydev.device == 0x0C)) { |
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391 | if (((sc->gb) && !(sc->gbit_mac)) || !((phyctrl >> 12) & 1)) { |
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392 | write_mii(phyaddr, 0, sc->sp << 13); |
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393 | write_mii(phyaddr, 0, 0x8000); |
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394 | sc->gb = 0; |
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395 | sc->sp = 0; |
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396 | sc->fd = 0; |
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397 | } |
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398 | } else { |
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399 | if (((sc->gb) && !(sc->gbit_mac)) || !((phyctrl >> 12) & 1)) { |
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400 | write_mii(phyaddr, 0, sc->sp << 13); |
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401 | sc->gb = 0; |
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402 | sc->sp = 0; |
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403 | sc->fd = 0; |
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404 | } |
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405 | } |
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406 | while ((read_mii(phyaddr, 0)) & 0x8000) {} |
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407 | |
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408 | regs->ctrl = 0; |
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409 | regs->ctrl = GRETH_CTRL_RST; /* Reset ON */ |
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410 | regs->ctrl = 0; |
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411 | |
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412 | /* Initialize rx/tx descriptor pointers */ |
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413 | sc->txdesc = (greth_rxtxdesc *) almalloc(1024); |
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414 | sc->rxdesc = (greth_rxtxdesc *) almalloc(1024); |
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415 | sc->tx_ptr = 0; |
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416 | sc->tx_dptr = 0; |
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417 | sc->tx_cnt = 0; |
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418 | sc->rx_ptr = 0; |
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419 | regs->txdesc = (uintptr_t) sc->txdesc; |
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420 | regs->rxdesc = (uintptr_t) sc->rxdesc; |
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421 | |
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422 | sc->rxmbuf = calloc(sc->rxbufs, sizeof(*sc->rxmbuf)); |
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423 | sc->txmbuf = calloc(sc->txbufs, sizeof(*sc->txmbuf)); |
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424 | |
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425 | for (i = 0; i < sc->txbufs; i++) |
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426 | { |
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427 | sc->txdesc[i].ctrl = 0; |
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428 | if (!(sc->gbit_mac)) { |
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429 | sc->txdesc[i].addr = malloc(GRETH_MAXBUF_LEN); |
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430 | } |
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431 | #ifdef GRETH_DEBUG |
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432 | /* printf("TXBUF: %08x\n", (int) sc->txdesc[i].addr); */ |
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433 | #endif |
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434 | } |
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435 | for (i = 0; i < sc->rxbufs; i++) |
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436 | { |
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437 | |
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438 | MGETHDR (m, M_WAIT, MT_DATA); |
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439 | MCLGET (m, M_WAIT); |
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440 | if (sc->gbit_mac) |
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441 | m->m_data += 2; |
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442 | m->m_pkthdr.rcvif = &sc->arpcom.ac_if; |
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443 | sc->rxmbuf[i] = m; |
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444 | sc->rxdesc[i].addr = (uint32_t *) mtod(m, uint32_t *); |
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445 | sc->rxdesc[i].ctrl = GRETH_RXD_ENABLE | GRETH_RXD_IRQ; |
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446 | #ifdef GRETH_DEBUG |
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447 | /* printf("RXBUF: %08x\n", (int) sc->rxdesc[i].addr); */ |
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448 | #endif |
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449 | } |
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450 | sc->rxdesc[sc->rxbufs - 1].ctrl |= GRETH_RXD_WRAP; |
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451 | |
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452 | /* set ethernet address. */ |
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453 | regs->mac_addr_msb = |
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454 | sc->arpcom.ac_enaddr[0] << 8 | sc->arpcom.ac_enaddr[1]; |
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455 | |
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456 | uint32_t mac_addr_lsb; |
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457 | mac_addr_lsb = sc->arpcom.ac_enaddr[2]; |
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458 | mac_addr_lsb <<= 8; |
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459 | mac_addr_lsb |= sc->arpcom.ac_enaddr[3]; |
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460 | mac_addr_lsb <<= 8; |
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461 | mac_addr_lsb |= sc->arpcom.ac_enaddr[4]; |
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462 | mac_addr_lsb <<= 8; |
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463 | mac_addr_lsb |= sc->arpcom.ac_enaddr[5]; |
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464 | regs->mac_addr_lsb = mac_addr_lsb; |
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465 | |
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466 | if ( sc->rxbufs < 10 ) { |
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467 | sc->tx_int_gen = sc->tx_int_gen_cur = 1; |
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468 | }else{ |
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469 | sc->tx_int_gen = sc->tx_int_gen_cur = sc->txbufs/2; |
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470 | } |
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471 | sc->next_tx_mbuf = NULL; |
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472 | |
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473 | if ( !sc->gbit_mac ) |
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474 | sc->max_fragsize = 1; |
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475 | |
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476 | /* clear all pending interrupts */ |
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477 | regs->status = 0xffffffff; |
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478 | |
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479 | /* install interrupt handler */ |
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480 | rtems_interrupt_handler_install(sc->vector, "greth", RTEMS_INTERRUPT_SHARED, |
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481 | greth_interrupt_handler, sc); |
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482 | |
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483 | regs->ctrl |= GRETH_CTRL_RXEN | (sc->fd << 4) | GRETH_CTRL_RXIRQ | (sc->sp << 7) | (sc->gb << 8); |
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484 | |
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485 | print_init_info(sc); |
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486 | } |
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487 | |
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488 | #ifdef CPU_U32_FIX |
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489 | |
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490 | /* |
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491 | * Routine to align the received packet so that the ip header |
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492 | * is on a 32-bit boundary. Necessary for cpu's that do not |
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493 | * allow unaligned loads and stores and when the 32-bit DMA |
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494 | * mode is used. |
---|
495 | * |
---|
496 | * Transfers are done on word basis to avoid possibly slow byte |
---|
497 | * and half-word writes. |
---|
498 | */ |
---|
499 | |
---|
500 | void ipalign(struct mbuf *m) |
---|
501 | { |
---|
502 | unsigned int *first, *last, data; |
---|
503 | unsigned int tmp; |
---|
504 | |
---|
505 | if ((((int) m->m_data) & 2) && (m->m_len)) { |
---|
506 | last = (unsigned int *) ((((int) m->m_data) + m->m_len + 8) & ~3); |
---|
507 | first = (unsigned int *) (((int) m->m_data) & ~3); |
---|
508 | tmp = GRETH_MEM_LOAD(first); |
---|
509 | tmp = tmp << 16; |
---|
510 | first++; |
---|
511 | do { |
---|
512 | /* When snooping is not available the LDA instruction must be used |
---|
513 | * to avoid the cache to return an illegal value. |
---|
514 | * Load with forced cache miss |
---|
515 | */ |
---|
516 | data = GRETH_MEM_LOAD(first); |
---|
517 | *first = tmp | (data >> 16); |
---|
518 | tmp = data << 16; |
---|
519 | first++; |
---|
520 | } while (first <= last); |
---|
521 | |
---|
522 | m->m_data = (caddr_t)(((int) m->m_data) + 2); |
---|
523 | } |
---|
524 | } |
---|
525 | #endif |
---|
526 | |
---|
527 | void |
---|
528 | greth_Daemon (void *arg) |
---|
529 | { |
---|
530 | struct ether_header *eh; |
---|
531 | struct greth_softc *dp = (struct greth_softc *) &greth; |
---|
532 | struct ifnet *ifp = &dp->arpcom.ac_if; |
---|
533 | struct mbuf *m; |
---|
534 | unsigned int len, len_status, bad; |
---|
535 | rtems_event_set events; |
---|
536 | rtems_interrupt_level level; |
---|
537 | int first; |
---|
538 | unsigned int tmp; |
---|
539 | |
---|
540 | for (;;) |
---|
541 | { |
---|
542 | rtems_bsdnet_event_receive (INTERRUPT_EVENT | GRETH_TX_WAIT_EVENT, |
---|
543 | RTEMS_WAIT | RTEMS_EVENT_ANY, |
---|
544 | RTEMS_NO_TIMEOUT, &events); |
---|
545 | |
---|
546 | if ( events & GRETH_TX_WAIT_EVENT ){ |
---|
547 | /* TX interrupt. |
---|
548 | * We only end up here when all TX descriptors has been used, |
---|
549 | * and |
---|
550 | */ |
---|
551 | if ( dp->gbit_mac ) |
---|
552 | greth_process_tx_gbit(dp); |
---|
553 | else |
---|
554 | greth_process_tx(dp); |
---|
555 | |
---|
556 | /* If we didn't get a RX interrupt we don't process it */ |
---|
557 | if ( (events & INTERRUPT_EVENT) == 0 ) |
---|
558 | continue; |
---|
559 | } |
---|
560 | |
---|
561 | #ifdef GRETH_ETH_DEBUG |
---|
562 | printf ("r\n"); |
---|
563 | #endif |
---|
564 | first=1; |
---|
565 | /* Scan for Received packets */ |
---|
566 | again: |
---|
567 | while (!((len_status = |
---|
568 | GRETH_MEM_LOAD(&dp->rxdesc[dp->rx_ptr].ctrl)) & GRETH_RXD_ENABLE)) |
---|
569 | { |
---|
570 | bad = 0; |
---|
571 | if (len_status & GRETH_RXD_TOOLONG) |
---|
572 | { |
---|
573 | dp->rxLengthError++; |
---|
574 | bad = 1; |
---|
575 | } |
---|
576 | if (len_status & GRETH_RXD_DRIBBLE) |
---|
577 | { |
---|
578 | dp->rxNonOctet++; |
---|
579 | bad = 1; |
---|
580 | } |
---|
581 | if (len_status & GRETH_RXD_CRCERR) |
---|
582 | { |
---|
583 | dp->rxBadCRC++; |
---|
584 | bad = 1; |
---|
585 | } |
---|
586 | if (len_status & GRETH_RXD_OVERRUN) |
---|
587 | { |
---|
588 | dp->rxOverrun++; |
---|
589 | bad = 1; |
---|
590 | } |
---|
591 | if (len_status & GRETH_RXD_LENERR) |
---|
592 | { |
---|
593 | dp->rxLengthError++; |
---|
594 | bad = 1; |
---|
595 | } |
---|
596 | if (!bad) |
---|
597 | { |
---|
598 | /* pass on the packet in the receive buffer */ |
---|
599 | len = len_status & 0x7FF; |
---|
600 | m = dp->rxmbuf[dp->rx_ptr]; |
---|
601 | #ifdef GRETH_DEBUG |
---|
602 | int i; |
---|
603 | printf("RX: 0x%08x, Len: %d : ", (int) m->m_data, len); |
---|
604 | for (i=0; i<len; i++) |
---|
605 | printf("%x%x", (m->m_data[i] >> 4) & 0x0ff, m->m_data[i] & 0x0ff); |
---|
606 | printf("\n"); |
---|
607 | #endif |
---|
608 | m->m_len = m->m_pkthdr.len = |
---|
609 | len - sizeof (struct ether_header); |
---|
610 | |
---|
611 | eh = mtod (m, struct ether_header *); |
---|
612 | |
---|
613 | m->m_data += sizeof (struct ether_header); |
---|
614 | #ifdef CPU_U32_FIX |
---|
615 | if(!dp->gbit_mac) { |
---|
616 | /* OVERRIDE CACHED ETHERNET HEADER FOR NON-SNOOPING SYSTEMS */ |
---|
617 | tmp = GRETH_MEM_LOAD((uintptr_t)eh); |
---|
618 | tmp = GRETH_MEM_LOAD(4+(uintptr_t)eh); |
---|
619 | tmp = GRETH_MEM_LOAD(8+(uintptr_t)eh); |
---|
620 | tmp = GRETH_MEM_LOAD(12+(uintptr_t)eh); |
---|
621 | |
---|
622 | ipalign(m); /* Align packet on 32-bit boundary */ |
---|
623 | } |
---|
624 | #endif |
---|
625 | |
---|
626 | ether_input (ifp, eh, m); |
---|
627 | MGETHDR (m, M_WAIT, MT_DATA); |
---|
628 | MCLGET (m, M_WAIT); |
---|
629 | if (dp->gbit_mac) |
---|
630 | m->m_data += 2; |
---|
631 | dp->rxmbuf[dp->rx_ptr] = m; |
---|
632 | m->m_pkthdr.rcvif = ifp; |
---|
633 | dp->rxdesc[dp->rx_ptr].addr = |
---|
634 | (uint32_t *) mtod (m, uint32_t *); |
---|
635 | dp->rxPackets++; |
---|
636 | } |
---|
637 | if (dp->rx_ptr == dp->rxbufs - 1) { |
---|
638 | dp->rxdesc[dp->rx_ptr].ctrl = GRETH_RXD_ENABLE | GRETH_RXD_IRQ | GRETH_RXD_WRAP; |
---|
639 | } else { |
---|
640 | dp->rxdesc[dp->rx_ptr].ctrl = GRETH_RXD_ENABLE | GRETH_RXD_IRQ; |
---|
641 | } |
---|
642 | rtems_interrupt_disable(level); |
---|
643 | dp->regs->ctrl |= GRETH_CTRL_RXEN; |
---|
644 | rtems_interrupt_enable(level); |
---|
645 | dp->rx_ptr = (dp->rx_ptr + 1) % dp->rxbufs; |
---|
646 | } |
---|
647 | |
---|
648 | /* Always scan twice to avoid deadlock */ |
---|
649 | if ( first ){ |
---|
650 | first=0; |
---|
651 | rtems_interrupt_disable(level); |
---|
652 | dp->regs->ctrl |= GRETH_CTRL_RXIRQ; |
---|
653 | rtems_interrupt_enable(level); |
---|
654 | goto again; |
---|
655 | } |
---|
656 | |
---|
657 | } |
---|
658 | |
---|
659 | } |
---|
660 | |
---|
661 | static int inside = 0; |
---|
662 | static int |
---|
663 | sendpacket (struct ifnet *ifp, struct mbuf *m) |
---|
664 | { |
---|
665 | struct greth_softc *dp = ifp->if_softc; |
---|
666 | unsigned char *temp; |
---|
667 | struct mbuf *n; |
---|
668 | unsigned int len; |
---|
669 | rtems_interrupt_level level; |
---|
670 | |
---|
671 | /*printf("Send packet entered\n");*/ |
---|
672 | if (inside) printf ("error: sendpacket re-entered!!\n"); |
---|
673 | inside = 1; |
---|
674 | |
---|
675 | /* |
---|
676 | * Is there a free descriptor available? |
---|
677 | */ |
---|
678 | if (GRETH_MEM_LOAD(&dp->txdesc[dp->tx_ptr].ctrl) & GRETH_TXD_ENABLE){ |
---|
679 | /* No. */ |
---|
680 | inside = 0; |
---|
681 | return 1; |
---|
682 | } |
---|
683 | |
---|
684 | /* Remember head of chain */ |
---|
685 | n = m; |
---|
686 | |
---|
687 | len = 0; |
---|
688 | temp = (unsigned char *) GRETH_MEM_LOAD(&dp->txdesc[dp->tx_ptr].addr); |
---|
689 | #ifdef GRETH_DEBUG |
---|
690 | printf("TXD: 0x%08x : BUF: 0x%08x\n", (int) m->m_data, (int) temp); |
---|
691 | #endif |
---|
692 | for (;;) |
---|
693 | { |
---|
694 | #ifdef GRETH_DEBUG |
---|
695 | int i; |
---|
696 | printf("MBUF: 0x%08x : ", (int) m->m_data); |
---|
697 | for (i=0;i<m->m_len;i++) |
---|
698 | printf("%x%x", (m->m_data[i] >> 4) & 0x0ff, m->m_data[i] & 0x0ff); |
---|
699 | printf("\n"); |
---|
700 | #endif |
---|
701 | len += m->m_len; |
---|
702 | if (len <= RBUF_SIZE) |
---|
703 | memcpy ((void *) temp, (char *) m->m_data, m->m_len); |
---|
704 | temp += m->m_len; |
---|
705 | if ((m = m->m_next) == NULL) |
---|
706 | break; |
---|
707 | } |
---|
708 | |
---|
709 | m_freem (n); |
---|
710 | |
---|
711 | /* don't send long packets */ |
---|
712 | |
---|
713 | if (len <= GRETH_MAXBUF_LEN) { |
---|
714 | if (dp->tx_ptr < dp->txbufs-1) { |
---|
715 | dp->txdesc[dp->tx_ptr].ctrl = GRETH_TXD_ENABLE | len; |
---|
716 | } else { |
---|
717 | dp->txdesc[dp->tx_ptr].ctrl = |
---|
718 | GRETH_TXD_WRAP | GRETH_TXD_ENABLE | len; |
---|
719 | } |
---|
720 | dp->tx_ptr = (dp->tx_ptr + 1) % dp->txbufs; |
---|
721 | rtems_interrupt_disable(level); |
---|
722 | dp->regs->ctrl = dp->regs->ctrl | GRETH_CTRL_TXEN; |
---|
723 | rtems_interrupt_enable(level); |
---|
724 | |
---|
725 | } |
---|
726 | inside = 0; |
---|
727 | |
---|
728 | return 0; |
---|
729 | } |
---|
730 | |
---|
731 | |
---|
732 | int |
---|
733 | sendpacket_gbit (struct ifnet *ifp, struct mbuf *m) |
---|
734 | { |
---|
735 | struct greth_softc *dp = ifp->if_softc; |
---|
736 | unsigned int len; |
---|
737 | |
---|
738 | unsigned int ctrl; |
---|
739 | int frags; |
---|
740 | struct mbuf *mtmp; |
---|
741 | int int_en; |
---|
742 | rtems_interrupt_level level; |
---|
743 | |
---|
744 | if (inside) printf ("error: sendpacket re-entered!!\n"); |
---|
745 | inside = 1; |
---|
746 | |
---|
747 | len = 0; |
---|
748 | #ifdef GRETH_DEBUG |
---|
749 | printf("TXD: 0x%08x\n", (int) m->m_data); |
---|
750 | #endif |
---|
751 | /* Get number of fragments too see if we have enough |
---|
752 | * resources. |
---|
753 | */ |
---|
754 | frags=1; |
---|
755 | mtmp=m; |
---|
756 | while(mtmp->m_next){ |
---|
757 | frags++; |
---|
758 | mtmp = mtmp->m_next; |
---|
759 | } |
---|
760 | |
---|
761 | if ( frags > dp->max_fragsize ) |
---|
762 | dp->max_fragsize = frags; |
---|
763 | |
---|
764 | if ( frags > dp->txbufs ){ |
---|
765 | inside = 0; |
---|
766 | printf("GRETH: MBUF-chain cannot be sent. Increase descriptor count.\n"); |
---|
767 | return -1; |
---|
768 | } |
---|
769 | |
---|
770 | if ( frags > (dp->txbufs-dp->tx_cnt) ){ |
---|
771 | inside = 0; |
---|
772 | /* Return number of fragments */ |
---|
773 | return frags; |
---|
774 | } |
---|
775 | |
---|
776 | |
---|
777 | /* Enable interrupt from descriptor every tx_int_gen |
---|
778 | * descriptor. Typically every 16 descriptor. This |
---|
779 | * is only to reduce the number of interrupts during |
---|
780 | * heavy load. |
---|
781 | */ |
---|
782 | dp->tx_int_gen_cur-=frags; |
---|
783 | if ( dp->tx_int_gen_cur <= 0 ){ |
---|
784 | dp->tx_int_gen_cur = dp->tx_int_gen; |
---|
785 | int_en = GRETH_TXD_IRQ; |
---|
786 | }else{ |
---|
787 | int_en = 0; |
---|
788 | } |
---|
789 | |
---|
790 | /* At this stage we know that enough descriptors are available */ |
---|
791 | for (;;) |
---|
792 | { |
---|
793 | |
---|
794 | #ifdef GRETH_DEBUG |
---|
795 | int i; |
---|
796 | printf("MBUF: 0x%08x, Len: %d : ", (int) m->m_data, m->m_len); |
---|
797 | for (i=0; i<m->m_len; i++) |
---|
798 | printf("%x%x", (m->m_data[i] >> 4) & 0x0ff, m->m_data[i] & 0x0ff); |
---|
799 | printf("\n"); |
---|
800 | #endif |
---|
801 | len += m->m_len; |
---|
802 | dp->txdesc[dp->tx_ptr].addr = (uint32_t *)m->m_data; |
---|
803 | |
---|
804 | /* Wrap around? */ |
---|
805 | if (dp->tx_ptr < dp->txbufs-1) { |
---|
806 | ctrl = GRETH_TXD_ENABLE | GRETH_TXD_CS; |
---|
807 | }else{ |
---|
808 | ctrl = GRETH_TXD_ENABLE | GRETH_TXD_CS | GRETH_TXD_WRAP; |
---|
809 | } |
---|
810 | |
---|
811 | /* Enable Descriptor */ |
---|
812 | if ((m->m_next) == NULL) { |
---|
813 | dp->txdesc[dp->tx_ptr].ctrl = ctrl | int_en | m->m_len; |
---|
814 | break; |
---|
815 | }else{ |
---|
816 | dp->txdesc[dp->tx_ptr].ctrl = GRETH_TXD_MORE | ctrl | int_en | m->m_len; |
---|
817 | } |
---|
818 | |
---|
819 | /* Next */ |
---|
820 | dp->txmbuf[dp->tx_ptr] = m; |
---|
821 | dp->tx_ptr = (dp->tx_ptr + 1) % dp->txbufs; |
---|
822 | dp->tx_cnt++; |
---|
823 | m = m->m_next; |
---|
824 | } |
---|
825 | dp->txmbuf[dp->tx_ptr] = m; |
---|
826 | dp->tx_ptr = (dp->tx_ptr + 1) % dp->txbufs; |
---|
827 | dp->tx_cnt++; |
---|
828 | |
---|
829 | /* Tell Hardware about newly enabled descriptor */ |
---|
830 | rtems_interrupt_disable(level); |
---|
831 | dp->regs->ctrl = dp->regs->ctrl | GRETH_CTRL_TXEN; |
---|
832 | rtems_interrupt_enable(level); |
---|
833 | |
---|
834 | inside = 0; |
---|
835 | |
---|
836 | return 0; |
---|
837 | } |
---|
838 | |
---|
839 | int greth_process_tx_gbit(struct greth_softc *sc) |
---|
840 | { |
---|
841 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
842 | struct mbuf *m; |
---|
843 | rtems_interrupt_level level; |
---|
844 | int first=1; |
---|
845 | |
---|
846 | /* |
---|
847 | * Send packets till queue is empty |
---|
848 | */ |
---|
849 | for (;;){ |
---|
850 | /* Reap Sent packets */ |
---|
851 | while((sc->tx_cnt > 0) && !(GRETH_MEM_LOAD(&sc->txdesc[sc->tx_dptr].ctrl) & GRETH_TXD_ENABLE)) { |
---|
852 | m_free(sc->txmbuf[sc->tx_dptr]); |
---|
853 | sc->tx_dptr = (sc->tx_dptr + 1) % sc->txbufs; |
---|
854 | sc->tx_cnt--; |
---|
855 | } |
---|
856 | |
---|
857 | if ( sc->next_tx_mbuf ){ |
---|
858 | /* Get packet we tried but faild to transmit last time */ |
---|
859 | m = sc->next_tx_mbuf; |
---|
860 | sc->next_tx_mbuf = NULL; /* Mark packet taken */ |
---|
861 | }else{ |
---|
862 | /* |
---|
863 | * Get the next mbuf chain to transmit from Stack. |
---|
864 | */ |
---|
865 | IF_DEQUEUE (&ifp->if_snd, m); |
---|
866 | if (!m){ |
---|
867 | /* Hardware has sent all schedule packets, this |
---|
868 | * makes the stack enter at greth_start next time |
---|
869 | * a packet is to be sent. |
---|
870 | */ |
---|
871 | ifp->if_flags &= ~IFF_OACTIVE; |
---|
872 | break; |
---|
873 | } |
---|
874 | } |
---|
875 | |
---|
876 | /* Are there free descriptors available? */ |
---|
877 | /* Try to send packet, if it a negative number is returned. */ |
---|
878 | if ( (sc->tx_cnt >= sc->txbufs) || sendpacket_gbit(ifp, m) ){ |
---|
879 | /* Not enough resources */ |
---|
880 | |
---|
881 | /* Since we have taken the mbuf out of the "send chain" |
---|
882 | * we must remember to use that next time we come back. |
---|
883 | * or else we have dropped a packet. |
---|
884 | */ |
---|
885 | sc->next_tx_mbuf = m; |
---|
886 | |
---|
887 | /* Not enough resources, enable interrupt for transmissions |
---|
888 | * this way we will be informed when more TX-descriptors are |
---|
889 | * available. |
---|
890 | */ |
---|
891 | if ( first ){ |
---|
892 | first = 0; |
---|
893 | rtems_interrupt_disable(level); |
---|
894 | ifp->if_flags |= IFF_OACTIVE; |
---|
895 | sc->regs->ctrl |= GRETH_CTRL_TXIRQ; |
---|
896 | rtems_interrupt_enable(level); |
---|
897 | |
---|
898 | /* We must check again to be sure that we didn't |
---|
899 | * miss an interrupt (if a packet was sent just before |
---|
900 | * enabling interrupts) |
---|
901 | */ |
---|
902 | continue; |
---|
903 | } |
---|
904 | |
---|
905 | return -1; |
---|
906 | }else{ |
---|
907 | /* Sent Ok, proceed to process more packets if available */ |
---|
908 | } |
---|
909 | } |
---|
910 | return 0; |
---|
911 | } |
---|
912 | |
---|
913 | int greth_process_tx(struct greth_softc *sc) |
---|
914 | { |
---|
915 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
916 | struct mbuf *m; |
---|
917 | rtems_interrupt_level level; |
---|
918 | int first=1; |
---|
919 | |
---|
920 | /* |
---|
921 | * Send packets till queue is empty |
---|
922 | */ |
---|
923 | for (;;){ |
---|
924 | if ( sc->next_tx_mbuf ){ |
---|
925 | /* Get packet we tried but failed to transmit last time */ |
---|
926 | m = sc->next_tx_mbuf; |
---|
927 | sc->next_tx_mbuf = NULL; /* Mark packet taken */ |
---|
928 | }else{ |
---|
929 | /* |
---|
930 | * Get the next mbuf chain to transmit from Stack. |
---|
931 | */ |
---|
932 | IF_DEQUEUE (&ifp->if_snd, m); |
---|
933 | if (!m){ |
---|
934 | /* Hardware has sent all schedule packets, this |
---|
935 | * makes the stack enter at greth_start next time |
---|
936 | * a packet is to be sent. |
---|
937 | */ |
---|
938 | ifp->if_flags &= ~IFF_OACTIVE; |
---|
939 | break; |
---|
940 | } |
---|
941 | } |
---|
942 | |
---|
943 | /* Try to send packet, failed if it a non-zero number is returned. */ |
---|
944 | if ( sendpacket(ifp, m) ){ |
---|
945 | /* Not enough resources */ |
---|
946 | |
---|
947 | /* Since we have taken the mbuf out of the "send chain" |
---|
948 | * we must remember to use that next time we come back. |
---|
949 | * or else we have dropped a packet. |
---|
950 | */ |
---|
951 | sc->next_tx_mbuf = m; |
---|
952 | |
---|
953 | /* Not enough resources, enable interrupt for transmissions |
---|
954 | * this way we will be informed when more TX-descriptors are |
---|
955 | * available. |
---|
956 | */ |
---|
957 | if ( first ){ |
---|
958 | first = 0; |
---|
959 | rtems_interrupt_disable(level); |
---|
960 | ifp->if_flags |= IFF_OACTIVE; |
---|
961 | sc->regs->ctrl |= GRETH_CTRL_TXIRQ; |
---|
962 | rtems_interrupt_enable(level); |
---|
963 | |
---|
964 | /* We must check again to be sure that we didn't |
---|
965 | * miss an interrupt (if a packet was sent just before |
---|
966 | * enabling interrupts) |
---|
967 | */ |
---|
968 | continue; |
---|
969 | } |
---|
970 | |
---|
971 | return -1; |
---|
972 | }else{ |
---|
973 | /* Sent Ok, proceed to process more packets if available */ |
---|
974 | } |
---|
975 | } |
---|
976 | return 0; |
---|
977 | } |
---|
978 | |
---|
979 | static void |
---|
980 | greth_start (struct ifnet *ifp) |
---|
981 | { |
---|
982 | struct greth_softc *sc = ifp->if_softc; |
---|
983 | |
---|
984 | if ( ifp->if_flags & IFF_OACTIVE ) |
---|
985 | return; |
---|
986 | |
---|
987 | if ( sc->gbit_mac ){ |
---|
988 | /* No use trying to handle this if we are waiting on GRETH |
---|
989 | * to send the previously scheduled packets. |
---|
990 | */ |
---|
991 | |
---|
992 | greth_process_tx_gbit(sc); |
---|
993 | }else{ |
---|
994 | greth_process_tx(sc); |
---|
995 | } |
---|
996 | } |
---|
997 | |
---|
998 | /* |
---|
999 | * Initialize and start the device |
---|
1000 | */ |
---|
1001 | static void |
---|
1002 | greth_init (void *arg) |
---|
1003 | { |
---|
1004 | struct greth_softc *sc = arg; |
---|
1005 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
1006 | |
---|
1007 | if (sc->daemonTid == 0) { |
---|
1008 | |
---|
1009 | /* |
---|
1010 | * Start driver tasks |
---|
1011 | */ |
---|
1012 | sc->daemonTid = rtems_bsdnet_newproc ("DCrxtx", 4096, |
---|
1013 | greth_Daemon, sc); |
---|
1014 | |
---|
1015 | /* |
---|
1016 | * Set up GRETH hardware |
---|
1017 | */ |
---|
1018 | greth_initialize_hardware (sc); |
---|
1019 | |
---|
1020 | } |
---|
1021 | |
---|
1022 | /* |
---|
1023 | * Tell the world that we're running. |
---|
1024 | */ |
---|
1025 | ifp->if_flags |= IFF_RUNNING; |
---|
1026 | } |
---|
1027 | |
---|
1028 | /* |
---|
1029 | * Stop the device |
---|
1030 | */ |
---|
1031 | static void |
---|
1032 | greth_stop (struct greth_softc *sc) |
---|
1033 | { |
---|
1034 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
1035 | |
---|
1036 | ifp->if_flags &= ~IFF_RUNNING; |
---|
1037 | |
---|
1038 | sc->regs->ctrl = 0; /* RX/TX OFF */ |
---|
1039 | sc->regs->ctrl = GRETH_CTRL_RST; /* Reset ON */ |
---|
1040 | sc->regs->ctrl = 0; /* Reset OFF */ |
---|
1041 | |
---|
1042 | sc->next_tx_mbuf = NULL; |
---|
1043 | } |
---|
1044 | |
---|
1045 | |
---|
1046 | /* |
---|
1047 | * Show interface statistics |
---|
1048 | */ |
---|
1049 | static void |
---|
1050 | greth_stats (struct greth_softc *sc) |
---|
1051 | { |
---|
1052 | printf (" Rx Interrupts:%-8lu", sc->rxInterrupts); |
---|
1053 | printf (" Rx Packets:%-8lu", sc->rxPackets); |
---|
1054 | printf (" Length:%-8lu", sc->rxLengthError); |
---|
1055 | printf (" Non-octet:%-8lu\n", sc->rxNonOctet); |
---|
1056 | printf (" Bad CRC:%-8lu", sc->rxBadCRC); |
---|
1057 | printf (" Overrun:%-8lu", sc->rxOverrun); |
---|
1058 | printf (" Tx Interrupts:%-8lu", sc->txInterrupts); |
---|
1059 | printf (" Maximal Frags:%-8d", sc->max_fragsize); |
---|
1060 | printf (" GBIT MAC:%-8d", sc->gbit_mac); |
---|
1061 | } |
---|
1062 | |
---|
1063 | /* |
---|
1064 | * Driver ioctl handler |
---|
1065 | */ |
---|
1066 | static int |
---|
1067 | greth_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data) |
---|
1068 | { |
---|
1069 | struct greth_softc *sc = ifp->if_softc; |
---|
1070 | int error = 0; |
---|
1071 | |
---|
1072 | switch (command) |
---|
1073 | { |
---|
1074 | case SIOCGIFADDR: |
---|
1075 | case SIOCSIFADDR: |
---|
1076 | ether_ioctl (ifp, command, data); |
---|
1077 | break; |
---|
1078 | |
---|
1079 | case SIOCSIFFLAGS: |
---|
1080 | switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) |
---|
1081 | { |
---|
1082 | case IFF_RUNNING: |
---|
1083 | greth_stop (sc); |
---|
1084 | break; |
---|
1085 | |
---|
1086 | case IFF_UP: |
---|
1087 | greth_init (sc); |
---|
1088 | break; |
---|
1089 | |
---|
1090 | case IFF_UP | IFF_RUNNING: |
---|
1091 | greth_stop (sc); |
---|
1092 | greth_init (sc); |
---|
1093 | break; |
---|
1094 | default: |
---|
1095 | break; |
---|
1096 | } |
---|
1097 | break; |
---|
1098 | |
---|
1099 | case SIO_RTEMS_SHOW_STATS: |
---|
1100 | greth_stats (sc); |
---|
1101 | break; |
---|
1102 | |
---|
1103 | /* |
---|
1104 | * FIXME: All sorts of multicast commands need to be added here! |
---|
1105 | */ |
---|
1106 | default: |
---|
1107 | error = EINVAL; |
---|
1108 | break; |
---|
1109 | } |
---|
1110 | |
---|
1111 | return error; |
---|
1112 | } |
---|
1113 | |
---|
1114 | /* |
---|
1115 | * Attach an GRETH driver to the system |
---|
1116 | */ |
---|
1117 | int |
---|
1118 | rtems_greth_driver_attach (struct rtems_bsdnet_ifconfig *config, |
---|
1119 | greth_configuration_t *chip) |
---|
1120 | { |
---|
1121 | struct greth_softc *sc; |
---|
1122 | struct ifnet *ifp; |
---|
1123 | int mtu; |
---|
1124 | int unitNumber; |
---|
1125 | char *unitName; |
---|
1126 | |
---|
1127 | /* parse driver name */ |
---|
1128 | if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0) |
---|
1129 | return 0; |
---|
1130 | |
---|
1131 | sc = &greth; |
---|
1132 | ifp = &sc->arpcom.ac_if; |
---|
1133 | memset (sc, 0, sizeof (*sc)); |
---|
1134 | |
---|
1135 | if (config->hardware_address) |
---|
1136 | { |
---|
1137 | memcpy (sc->arpcom.ac_enaddr, config->hardware_address, |
---|
1138 | ETHER_ADDR_LEN); |
---|
1139 | } |
---|
1140 | else |
---|
1141 | { |
---|
1142 | memset (sc->arpcom.ac_enaddr, 0x08, ETHER_ADDR_LEN); |
---|
1143 | } |
---|
1144 | |
---|
1145 | if (config->mtu) |
---|
1146 | mtu = config->mtu; |
---|
1147 | else |
---|
1148 | mtu = ETHERMTU; |
---|
1149 | |
---|
1150 | sc->acceptBroadcast = !config->ignore_broadcast; |
---|
1151 | sc->regs = chip->base_address; |
---|
1152 | sc->vector = chip->vector; |
---|
1153 | sc->txbufs = chip->txd_count; |
---|
1154 | sc->rxbufs = chip->rxd_count; |
---|
1155 | |
---|
1156 | /* |
---|
1157 | * Set up network interface values |
---|
1158 | */ |
---|
1159 | ifp->if_softc = sc; |
---|
1160 | ifp->if_unit = unitNumber; |
---|
1161 | ifp->if_name = unitName; |
---|
1162 | ifp->if_mtu = mtu; |
---|
1163 | ifp->if_init = greth_init; |
---|
1164 | ifp->if_ioctl = greth_ioctl; |
---|
1165 | ifp->if_start = greth_start; |
---|
1166 | ifp->if_output = ether_output; |
---|
1167 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; |
---|
1168 | if (ifp->if_snd.ifq_maxlen == 0) |
---|
1169 | ifp->if_snd.ifq_maxlen = ifqmaxlen; |
---|
1170 | |
---|
1171 | /* |
---|
1172 | * Attach the interface |
---|
1173 | */ |
---|
1174 | if_attach (ifp); |
---|
1175 | ether_ifattach (ifp); |
---|
1176 | |
---|
1177 | #ifdef GRETH_DEBUG |
---|
1178 | printf ("GRETH : driver has been attached\n"); |
---|
1179 | #endif |
---|
1180 | return 1; |
---|
1181 | }; |
---|
1182 | |
---|
1183 | #endif |
---|