1 | /* |
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2 | * RTEMS driver for Etherlink based Ethernet Controllers |
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3 | * |
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4 | * Copyright (C) 2003, Gregory Menke, NASA/GSFC |
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5 | * |
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6 | * The license and distribution terms for this file may be |
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7 | * found in found in the file LICENSE in this distribution or at |
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8 | * http://www.rtems.com/license/LICENSE. |
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9 | * |
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10 | * elnk.c |
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11 | * |
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12 | * |
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13 | */ |
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14 | |
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15 | |
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16 | /* |
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17 | * Portions of this driver are taken from the Freebsd if_xl.c driver, |
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18 | * version "1.133 2003/03/19 01:48:14" and are covered by the license |
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19 | * text included below that was taken verbatim from the original file. |
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20 | * More particularly, all structures, variables, and #defines prefixed |
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21 | * with XL_ or xl_, along with their associated comments were taken |
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22 | * directly from the Freebsd driver and modified as required to suit the |
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23 | * purposes of this one. Additionally, much of the device setup & |
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24 | * manipulation logic was also copied and modified to suit. All types |
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25 | * and functions beginning with elnk are either my own creations or were |
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26 | * adapted from other RTEMS components, and regardless, are subject to |
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27 | * the standard OAR licensing terms given in the comments at the top of |
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28 | * this file. |
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29 | * |
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30 | * Greg Menke, 6/11/2003 |
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31 | */ |
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32 | |
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33 | /* |
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34 | * Copyright (c) 1997, 1998, 1999 |
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35 | * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. |
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36 | * |
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37 | * Redistribution and use in source and binary forms, with or without |
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38 | * modification, are permitted provided that the following conditions |
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39 | * are met: |
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40 | * 1. Redistributions of source code must retain the above copyright |
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41 | * notice, this list of conditions and the following disclaimer. |
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42 | * 2. Redistributions in binary form must reproduce the above copyright |
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43 | * notice, this list of conditions and the following disclaimer in the |
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44 | * documentation and/or other materials provided with the distribution. |
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45 | * 3. All advertising materials mentioning features or use of this software |
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46 | * must display the following acknowledgement: |
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47 | * This product includes software developed by Bill Paul. |
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48 | * 4. Neither the name of the author nor the names of any co-contributors |
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49 | * may be used to endorse or promote products derived from this software |
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50 | * without specific prior written permission. |
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51 | * |
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52 | * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND |
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53 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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54 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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55 | * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD |
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56 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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57 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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58 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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59 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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60 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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61 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
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62 | * THE POSSIBILITY OF SUCH DAMAGE. |
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63 | */ |
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64 | |
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65 | #include <rtems.h> |
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66 | |
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67 | /* |
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68 | * This driver only supports architectures with the new style |
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69 | * exception processing. The following checks try to keep this |
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70 | * from being compiled on systems which can't support this driver. |
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71 | */ |
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72 | |
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73 | #if defined(__i386__) |
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74 | #define ELNK_SUPPORTED |
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75 | #define PCI_DRAM_OFFSET 0 |
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76 | #endif |
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77 | |
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78 | #if defined(__PPC__) |
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79 | #define ELNK_SUPPORTED |
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80 | #endif |
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81 | |
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82 | #include <bsp.h> |
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83 | #include <rtems/pci.h> |
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84 | |
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85 | #if !defined(PCI_DRAM_OFFSET) |
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86 | #undef ELNK_SUPPORTED |
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87 | #endif |
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88 | |
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89 | /* #undef ELNK_SUPPORTED */ |
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90 | |
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91 | |
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92 | #if defined(ELNK_SUPPORTED) |
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93 | |
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94 | #if defined(__PPC__) |
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95 | #include <libcpu/byteorder.h> |
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96 | #include <libcpu/io.h> |
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97 | #endif |
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98 | |
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99 | #if defined(__i386__) |
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100 | #include <libcpu/byteorder.h> |
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101 | #endif |
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102 | |
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103 | #include <stdlib.h> |
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104 | #include <stdio.h> |
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105 | #include <stdarg.h> |
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106 | #include <string.h> |
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107 | #include <errno.h> |
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108 | #include <rtems/error.h> |
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109 | #include <rtems/bspIo.h> |
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110 | #include <rtems/rtems_bsdnet.h> |
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111 | |
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112 | #include <sys/param.h> |
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113 | #include <sys/mbuf.h> |
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114 | |
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115 | #include <sys/socket.h> |
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116 | #include <sys/sockio.h> |
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117 | #include <net/if.h> |
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118 | #include <netinet/in.h> |
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119 | #include <netinet/if_ether.h> |
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120 | |
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121 | #include <net/if_media.h> |
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122 | #include <dev/mii/mii.h> |
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123 | #include <bsp/irq.h> |
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124 | |
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125 | #if defined(__i386__) |
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126 | #define IO_MASK 0x3 |
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127 | #define MEM_MASK 0xF |
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128 | #endif |
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129 | |
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130 | #ifdef malloc |
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131 | #undef malloc |
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132 | #endif |
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133 | #ifdef free |
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134 | #undef free |
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135 | #endif |
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136 | |
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137 | #define ELNK_DEBUG |
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138 | |
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139 | |
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140 | #define DRIVER_PREFIX "elnk" |
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141 | |
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142 | |
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143 | |
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144 | |
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145 | |
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146 | /* |
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147 | * These buffers allocated for each unit, so ensure |
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148 | * |
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149 | * rtems_bsdnet_config.mbuf_bytecount |
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150 | * rtems_bsdnet_config.mbuf_cluster_bytecount |
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151 | * |
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152 | * are adequately sized to provide enough clusters and mbufs for all the |
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153 | * units. The default bsdnet configuration is sufficient for one unit, |
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154 | * but will be nearing exhaustion with 2 or more. Although a little |
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155 | * expensive in memory, the following configuration should eliminate all |
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156 | * mbuf/cluster issues; |
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157 | * |
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158 | * rtems_bsdnet_config.mbuf_bytecount = 128*1024; |
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159 | * rtems_bsdnet_config.mbuf_cluster_bytecount = 256*1024; |
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160 | * |
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161 | * The default size in buffers of the rx & tx rings are given below. |
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162 | * This driver honors the rtems_bsdnet_ifconfig fields 'rbuf_count' and |
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163 | * 'xbuf_count', allowing the user to specify something else. |
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164 | */ |
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165 | |
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166 | #define RX_RING_SIZE 16 /* default number of receive buffers */ |
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167 | #define TX_RING_SIZE 16 /* default number of transmit buffers */ |
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168 | |
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169 | |
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170 | /* |
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171 | * Number of boards supported by this driver |
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172 | */ |
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173 | #define NUM_UNITS 8 |
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174 | |
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175 | /* |
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176 | * Receive buffer size -- Allow for a full ethernet packet including CRC |
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177 | */ |
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178 | #define XL_PACKET_SIZE 1540 |
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179 | |
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180 | |
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181 | /* |
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182 | ** Events, one per unit. The event is sent to the rx task from the isr |
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183 | ** or from the stack to the tx task whenever a unit needs service. The |
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184 | ** rx/tx tasks identify the requesting unit(s) by their particular |
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185 | ** events so only requesting units are serviced. |
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186 | */ |
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187 | |
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188 | static rtems_event_set unit_signals[NUM_UNITS]= { RTEMS_EVENT_1, |
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189 | RTEMS_EVENT_2, |
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190 | RTEMS_EVENT_3, |
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191 | RTEMS_EVENT_4, |
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192 | RTEMS_EVENT_5, |
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193 | RTEMS_EVENT_6, |
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194 | RTEMS_EVENT_7, |
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195 | RTEMS_EVENT_8 }; |
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196 | |
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197 | |
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198 | |
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199 | |
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200 | #if defined(__PPC__) |
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201 | #define phys_to_bus(address) ((unsigned int)((address)) + PCI_DRAM_OFFSET) |
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202 | #define bus_to_phys(address) ((unsigned int)((address)) - PCI_DRAM_OFFSET) |
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203 | #define CPU_CACHE_ALIGNMENT_FOR_BUFFER PPC_CACHE_ALIGNMENT |
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204 | #else |
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205 | extern void Wait_X_ms( unsigned int timeToWait ); |
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206 | #define phys_to_bus(address) ((unsigned int) ((address))) |
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207 | #define bus_to_phys(address) ((unsigned int) ((address))) |
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208 | #define rtems_bsp_delay_in_bus_cycles(cycle) Wait_X_ms( cycle/100 ) |
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209 | #define CPU_CACHE_ALIGNMENT_FOR_BUFFER PG_SIZE |
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210 | #endif |
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211 | |
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212 | /* the actual duration waited in DELAY is not especially predictable, |
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213 | * though it will be consistent on a given host. It should not be |
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214 | * relied upon for specific timing given the vague per-bsp, |
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215 | * per-architecture implementation of the actual delay function. It |
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216 | * would probably be helpful to make this more accurate at some point... |
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217 | */ |
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218 | #define DELAY(n) rtems_bsp_delay_in_bus_cycles( n*20 ) |
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219 | |
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220 | |
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221 | |
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222 | |
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223 | /* |
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224 | * Register layouts. |
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225 | */ |
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226 | #define XL_COMMAND 0x0E |
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227 | #define XL_STATUS 0x0E |
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228 | |
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229 | #define XL_TX_STATUS 0x1B |
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230 | #define XL_TX_FREE 0x1C |
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231 | #define XL_DMACTL 0x20 |
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232 | #define XL_DOWNLIST_PTR 0x24 |
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233 | #define XL_DOWN_POLL 0x2D /* 3c90xB only */ |
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234 | #define XL_TX_FREETHRESH 0x2F |
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235 | #define XL_UPLIST_PTR 0x38 |
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236 | #define XL_UPLIST_STATUS 0x30 |
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237 | #define XL_UP_POLL 0x3D /* 3c90xB only */ |
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238 | |
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239 | #define XL_PKTSTAT_UP_STALLED 0x00002000 |
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240 | #define XL_PKTSTAT_UP_ERROR 0x00004000 |
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241 | #define XL_PKTSTAT_UP_CMPLT 0x00008000 |
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242 | |
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243 | #define XL_DMACTL_DN_CMPLT_REQ 0x00000002 |
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244 | #define XL_DMACTL_DOWN_STALLED 0x00000004 |
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245 | #define XL_DMACTL_UP_CMPLT 0x00000008 |
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246 | #define XL_DMACTL_DOWN_CMPLT 0x00000010 |
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247 | #define XL_DMACTL_UP_RX_EARLY 0x00000020 |
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248 | #define XL_DMACTL_ARM_COUNTDOWN 0x00000040 |
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249 | #define XL_DMACTL_DOWN_INPROG 0x00000080 |
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250 | #define XL_DMACTL_COUNTER_SPEED 0x00000100 |
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251 | #define XL_DMACTL_DOWNDOWN_MODE 0x00000200 |
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252 | #define XL_DMACTL_TARGET_ABORT 0x40000000 |
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253 | #define XL_DMACTL_MASTER_ABORT 0x80000000 |
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254 | |
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255 | /* |
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256 | * Command codes. Some command codes require that we wait for |
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257 | * the CMD_BUSY flag to clear. Those codes are marked as 'mustwait.' |
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258 | */ |
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259 | #define XL_CMD_RESET 0x0000 /* mustwait */ |
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260 | #define XL_CMD_WINSEL 0x0800 |
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261 | #define XL_CMD_COAX_START 0x1000 |
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262 | #define XL_CMD_RX_DISABLE 0x1800 |
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263 | #define XL_CMD_RX_ENABLE 0x2000 |
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264 | #define XL_CMD_RX_RESET 0x2800 /* mustwait */ |
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265 | #define XL_CMD_UP_STALL 0x3000 /* mustwait */ |
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266 | #define XL_CMD_UP_UNSTALL 0x3001 |
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267 | #define XL_CMD_DOWN_STALL 0x3002 /* mustwait */ |
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268 | #define XL_CMD_DOWN_UNSTALL 0x3003 |
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269 | #define XL_CMD_RX_DISCARD 0x4000 |
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270 | #define XL_CMD_TX_ENABLE 0x4800 |
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271 | #define XL_CMD_TX_DISABLE 0x5000 |
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272 | #define XL_CMD_TX_RESET 0x5800 /* mustwait */ |
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273 | #define XL_CMD_INTR_FAKE 0x6000 |
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274 | #define XL_CMD_INTR_ACK 0x6800 |
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275 | #define XL_CMD_INTR_ENB 0x7000 |
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276 | #define XL_CMD_STAT_ENB 0x7800 |
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277 | #define XL_CMD_RX_SET_FILT 0x8000 |
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278 | #define XL_CMD_RX_SET_THRESH 0x8800 |
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279 | #define XL_CMD_TX_SET_THRESH 0x9000 |
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280 | #define XL_CMD_TX_SET_START 0x9800 |
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281 | #define XL_CMD_DMA_UP 0xA000 |
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282 | #define XL_CMD_DMA_STOP 0xA001 |
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283 | #define XL_CMD_STATS_ENABLE 0xA800 |
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284 | #define XL_CMD_STATS_DISABLE 0xB000 |
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285 | #define XL_CMD_COAX_STOP 0xB800 |
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286 | |
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287 | #define XL_CMD_SET_TX_RECLAIM 0xC000 /* 3c905B only */ |
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288 | #define XL_CMD_RX_SET_HASH 0xC800 /* 3c905B only */ |
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289 | |
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290 | #define XL_HASH_SET 0x0400 |
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291 | #define XL_HASHFILT_SIZE 256 |
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292 | |
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293 | /* |
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294 | * status codes |
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295 | * Note that bits 15 to 13 indicate the currently visible register window |
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296 | * which may be anything from 0 to 7. |
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297 | */ |
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298 | #define XL_STAT_INTLATCH 0x0001 /* 0 */ |
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299 | #define XL_STAT_ADFAIL 0x0002 /* 1 */ |
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300 | #define XL_STAT_TX_COMPLETE 0x0004 /* 2 */ |
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301 | #define XL_STAT_TX_AVAIL 0x0008 /* 3 first generation */ |
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302 | #define XL_STAT_RX_COMPLETE 0x0010 /* 4 */ |
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303 | #define XL_STAT_RX_EARLY 0x0020 /* 5 */ |
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304 | #define XL_STAT_INTREQ 0x0040 /* 6 */ |
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305 | #define XL_STAT_STATSOFLOW 0x0080 /* 7 */ |
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306 | #define XL_STAT_DMADONE 0x0100 /* 8 first generation */ |
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307 | #define XL_STAT_LINKSTAT 0x0100 /* 8 3c509B */ |
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308 | #define XL_STAT_DOWN_COMPLETE 0x0200 /* 9 */ |
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309 | #define XL_STAT_UP_COMPLETE 0x0400 /* 10 */ |
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310 | #define XL_STAT_DMABUSY 0x0800 /* 11 first generation */ |
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311 | #define XL_STAT_CMDBUSY 0x1000 /* 12 */ |
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312 | |
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313 | /* |
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314 | * Interrupts we normally want enabled. |
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315 | */ |
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316 | #define XL_INTRS \ |
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317 | (XL_STAT_UP_COMPLETE | XL_STAT_STATSOFLOW | XL_STAT_ADFAIL| \ |
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318 | XL_STAT_DOWN_COMPLETE | XL_STAT_TX_COMPLETE | XL_STAT_INTLATCH) |
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319 | |
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320 | |
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321 | |
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322 | /* |
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323 | * General constants that are fun to know. |
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324 | * |
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325 | * 3Com PCI vendor ID |
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326 | */ |
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327 | #define TC_VENDORID 0x10B7 |
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328 | |
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329 | /* |
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330 | * 3Com chip device IDs. |
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331 | */ |
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332 | #define TC_DEVICEID_BOOMERANG_10BT 0x9000 |
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333 | #define TC_DEVICEID_BOOMERANG_10BT_COMBO 0x9001 |
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334 | #define TC_DEVICEID_BOOMERANG_10_100BT 0x9050 |
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335 | #define TC_DEVICEID_BOOMERANG_100BT4 0x9051 |
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336 | #define TC_DEVICEID_KRAKATOA_10BT 0x9004 |
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337 | #define TC_DEVICEID_KRAKATOA_10BT_COMBO 0x9005 |
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338 | #define TC_DEVICEID_KRAKATOA_10BT_TPC 0x9006 |
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339 | #define TC_DEVICEID_CYCLONE_10FL 0x900A |
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340 | #define TC_DEVICEID_HURRICANE_10_100BT 0x9055 |
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341 | #define TC_DEVICEID_CYCLONE_10_100BT4 0x9056 |
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342 | #define TC_DEVICEID_CYCLONE_10_100_COMBO 0x9058 |
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343 | #define TC_DEVICEID_CYCLONE_10_100FX 0x905A |
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344 | #define TC_DEVICEID_TORNADO_10_100BT 0x9200 |
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345 | #define TC_DEVICEID_TORNADO_10_100BT_920B 0x9201 |
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346 | #define TC_DEVICEID_HURRICANE_10_100BT_SERV 0x9800 |
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347 | #define TC_DEVICEID_TORNADO_10_100BT_SERV 0x9805 |
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348 | #define TC_DEVICEID_HURRICANE_SOHO100TX 0x7646 |
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349 | #define TC_DEVICEID_TORNADO_HOMECONNECT 0x4500 |
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350 | #define TC_DEVICEID_HURRICANE_555 0x5055 |
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351 | #define TC_DEVICEID_HURRICANE_556 0x6055 |
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352 | #define TC_DEVICEID_HURRICANE_556B 0x6056 |
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353 | #define TC_DEVICEID_HURRICANE_575A 0x5057 |
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354 | #define TC_DEVICEID_HURRICANE_575B 0x5157 |
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355 | #define TC_DEVICEID_HURRICANE_575C 0x5257 |
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356 | #define TC_DEVICEID_HURRICANE_656 0x6560 |
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357 | #define TC_DEVICEID_HURRICANE_656B 0x6562 |
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358 | #define TC_DEVICEID_TORNADO_656C 0x6564 |
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359 | |
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360 | |
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361 | |
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362 | #define XL_RXSTAT_LENMASK 0x00001FFF |
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363 | #define XL_RXSTAT_UP_ERROR 0x00004000 |
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364 | #define XL_RXSTAT_UP_CMPLT 0x00008000 |
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365 | #define XL_RXSTAT_UP_OVERRUN 0x00010000 |
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366 | #define XL_RXSTAT_RUNT 0x00020000 |
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367 | #define XL_RXSTAT_ALIGN 0x00040000 |
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368 | #define XL_RXSTAT_CRC 0x00080000 |
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369 | #define XL_RXSTAT_OVERSIZE 0x00100000 |
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370 | #define XL_RXSTAT_DRIBBLE 0x00800000 |
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371 | #define XL_RXSTAT_UP_OFLOW 0x01000000 |
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372 | #define XL_RXSTAT_IPCKERR 0x02000000 /* 3c905B only */ |
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373 | #define XL_RXSTAT_TCPCKERR 0x04000000 /* 3c905B only */ |
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374 | #define XL_RXSTAT_UDPCKERR 0x08000000 /* 3c905B only */ |
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375 | #define XL_RXSTAT_BUFEN 0x10000000 /* 3c905B only */ |
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376 | #define XL_RXSTAT_IPCKOK 0x20000000 /* 3c905B only */ |
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377 | #define XL_RXSTAT_TCPCOK 0x40000000 /* 3c905B only */ |
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378 | #define XL_RXSTAT_UDPCKOK 0x80000000 /* 3c905B only */ |
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379 | |
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380 | #define XL_TXSTAT_LENMASK 0x00001FFF |
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381 | #define XL_TXSTAT_CRCDIS 0x00002000 |
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382 | #define XL_TXSTAT_TX_INTR 0x00008000 |
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383 | #define XL_TXSTAT_DL_COMPLETE 0x00010000 |
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384 | #define XL_TXSTAT_IPCKSUM 0x02000000 /* 3c905B only */ |
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385 | #define XL_TXSTAT_TCPCKSUM 0x04000000 /* 3c905B only */ |
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386 | #define XL_TXSTAT_UDPCKSUM 0x08000000 /* 3c905B only */ |
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387 | #define XL_TXSTAT_RND_DEFEAT 0x10000000 /* 3c905B only */ |
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388 | #define XL_TXSTAT_EMPTY 0x20000000 /* 3c905B only */ |
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389 | #define XL_TXSTAT_DL_INTR 0x80000000 |
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390 | |
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391 | |
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392 | #define XL_FLAG_FUNCREG 0x0001 |
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393 | #define XL_FLAG_PHYOK 0x0002 |
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394 | #define XL_FLAG_EEPROM_OFFSET_30 0x0004 |
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395 | #define XL_FLAG_WEIRDRESET 0x0008 |
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396 | #define XL_FLAG_8BITROM 0x0010 |
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397 | #define XL_FLAG_INVERT_LED_PWR 0x0020 |
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398 | #define XL_FLAG_INVERT_MII_PWR 0x0040 |
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399 | #define XL_FLAG_NO_XCVR_PWR 0x0080 |
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400 | #define XL_FLAG_USE_MMIO 0x0100 |
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401 | |
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402 | |
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403 | |
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404 | #define XL_EE_READ 0x0080 /* read, 5 bit address */ |
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405 | #define XL_EE_WRITE 0x0040 /* write, 5 bit address */ |
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406 | #define XL_EE_ERASE 0x00c0 /* erase, 5 bit address */ |
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407 | #define XL_EE_EWEN 0x0030 /* erase, no data needed */ |
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408 | #define XL_EE_8BIT_READ 0x0200 /* read, 8 bit address */ |
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409 | #define XL_EE_BUSY 0x8000 |
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410 | |
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411 | #define XL_EE_EADDR0 0x00 /* station address, first word */ |
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412 | #define XL_EE_EADDR1 0x01 /* station address, next word, */ |
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413 | #define XL_EE_EADDR2 0x02 /* station address, last word */ |
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414 | #define XL_EE_PRODID 0x03 /* product ID code */ |
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415 | #define XL_EE_MDATA_DATE 0x04 /* manufacturing data, date */ |
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416 | #define XL_EE_MDATA_DIV 0x05 /* manufacturing data, division */ |
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417 | #define XL_EE_MDATA_PCODE 0x06 /* manufacturing data, product code */ |
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418 | #define XL_EE_MFG_ID 0x07 |
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419 | #define XL_EE_PCI_PARM 0x08 |
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420 | #define XL_EE_ROM_ONFO 0x09 |
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421 | #define XL_EE_OEM_ADR0 0x0A |
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422 | #define XL_EE_OEM_ADR1 0x0B |
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423 | #define XL_EE_OEM_ADR2 0x0C |
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424 | #define XL_EE_SOFTINFO1 0x0D |
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425 | #define XL_EE_COMPAT 0x0E |
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426 | #define XL_EE_SOFTINFO2 0x0F |
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427 | #define XL_EE_CAPS 0x10 /* capabilities word */ |
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428 | #define XL_EE_RSVD0 0x11 |
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429 | #define XL_EE_ICFG_0 0x12 |
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430 | #define XL_EE_ICFG_1 0x13 |
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431 | #define XL_EE_RSVD1 0x14 |
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432 | #define XL_EE_SOFTINFO3 0x15 |
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433 | #define XL_EE_RSVD_2 0x16 |
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434 | |
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435 | /* |
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436 | * Bits in the capabilities word |
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437 | */ |
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438 | #define XL_CAPS_PNP 0x0001 |
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439 | #define XL_CAPS_FULL_DUPLEX 0x0002 |
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440 | #define XL_CAPS_LARGE_PKTS 0x0004 |
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441 | #define XL_CAPS_SLAVE_DMA 0x0008 |
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442 | #define XL_CAPS_SECOND_DMA 0x0010 |
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443 | #define XL_CAPS_FULL_BM 0x0020 |
---|
444 | #define XL_CAPS_FRAG_BM 0x0040 |
---|
445 | #define XL_CAPS_CRC_PASSTHRU 0x0080 |
---|
446 | #define XL_CAPS_TXDONE 0x0100 |
---|
447 | #define XL_CAPS_NO_TXLENGTH 0x0200 |
---|
448 | #define XL_CAPS_RX_REPEAT 0x0400 |
---|
449 | #define XL_CAPS_SNOOPING 0x0800 |
---|
450 | #define XL_CAPS_100MBPS 0x1000 |
---|
451 | #define XL_CAPS_PWRMGMT 0x2000 |
---|
452 | |
---|
453 | |
---|
454 | |
---|
455 | /* |
---|
456 | * Window 0 registers |
---|
457 | */ |
---|
458 | #define XL_W0_EE_DATA 0x0C |
---|
459 | #define XL_W0_EE_CMD 0x0A |
---|
460 | #define XL_W0_RSRC_CFG 0x08 |
---|
461 | #define XL_W0_ADDR_CFG 0x06 |
---|
462 | #define XL_W0_CFG_CTRL 0x04 |
---|
463 | |
---|
464 | #define XL_W0_PROD_ID 0x02 |
---|
465 | #define XL_W0_MFG_ID 0x00 |
---|
466 | |
---|
467 | /* |
---|
468 | * Window 1 |
---|
469 | */ |
---|
470 | |
---|
471 | #define XL_W1_TX_FIFO 0x10 |
---|
472 | |
---|
473 | #define XL_W1_FREE_TX 0x0C |
---|
474 | #define XL_W1_TX_STATUS 0x0B |
---|
475 | #define XL_W1_TX_TIMER 0x0A |
---|
476 | #define XL_W1_RX_STATUS 0x08 |
---|
477 | #define XL_W1_RX_FIFO 0x00 |
---|
478 | |
---|
479 | /* |
---|
480 | * RX status codes |
---|
481 | */ |
---|
482 | #define XL_RXSTATUS_OVERRUN 0x01 |
---|
483 | #define XL_RXSTATUS_RUNT 0x02 |
---|
484 | #define XL_RXSTATUS_ALIGN 0x04 |
---|
485 | #define XL_RXSTATUS_CRC 0x08 |
---|
486 | #define XL_RXSTATUS_OVERSIZE 0x10 |
---|
487 | #define XL_RXSTATUS_DRIBBLE 0x20 |
---|
488 | |
---|
489 | /* |
---|
490 | * TX status codes |
---|
491 | */ |
---|
492 | #define XL_TXSTATUS_RECLAIM 0x02 /* 3c905B only */ |
---|
493 | #define XL_TXSTATUS_OVERFLOW 0x04 |
---|
494 | #define XL_TXSTATUS_MAXCOLS 0x08 |
---|
495 | #define XL_TXSTATUS_UNDERRUN 0x10 |
---|
496 | #define XL_TXSTATUS_JABBER 0x20 |
---|
497 | #define XL_TXSTATUS_INTREQ 0x40 |
---|
498 | #define XL_TXSTATUS_COMPLETE 0x80 |
---|
499 | |
---|
500 | /* |
---|
501 | * Window 2 |
---|
502 | */ |
---|
503 | #define XL_W2_RESET_OPTIONS 0x0C /* 3c905B only */ |
---|
504 | #define XL_W2_STATION_MASK_HI 0x0A |
---|
505 | #define XL_W2_STATION_MASK_MID 0x08 |
---|
506 | #define XL_W2_STATION_MASK_LO 0x06 |
---|
507 | #define XL_W2_STATION_ADDR_HI 0x04 |
---|
508 | #define XL_W2_STATION_ADDR_MID 0x02 |
---|
509 | #define XL_W2_STATION_ADDR_LO 0x00 |
---|
510 | |
---|
511 | #define XL_RESETOPT_FEATUREMASK 0x0001|0x0002|0x004 |
---|
512 | #define XL_RESETOPT_D3RESETDIS 0x0008 |
---|
513 | #define XL_RESETOPT_DISADVFD 0x0010 |
---|
514 | #define XL_RESETOPT_DISADV100 0x0020 |
---|
515 | #define XL_RESETOPT_DISAUTONEG 0x0040 |
---|
516 | #define XL_RESETOPT_DEBUGMODE 0x0080 |
---|
517 | #define XL_RESETOPT_FASTAUTO 0x0100 |
---|
518 | #define XL_RESETOPT_FASTEE 0x0200 |
---|
519 | #define XL_RESETOPT_FORCEDCONF 0x0400 |
---|
520 | #define XL_RESETOPT_TESTPDTPDR 0x0800 |
---|
521 | #define XL_RESETOPT_TEST100TX 0x1000 |
---|
522 | #define XL_RESETOPT_TEST100RX 0x2000 |
---|
523 | |
---|
524 | #define XL_RESETOPT_INVERT_LED 0x0010 |
---|
525 | #define XL_RESETOPT_INVERT_MII 0x4000 |
---|
526 | |
---|
527 | /* |
---|
528 | * Window 3 (fifo management) |
---|
529 | */ |
---|
530 | #define XL_W3_INTERNAL_CFG 0x00 |
---|
531 | #define XL_W3_MAXPKTSIZE 0x04 /* 3c905B only */ |
---|
532 | #define XL_W3_RESET_OPT 0x08 |
---|
533 | #define XL_W3_FREE_TX 0x0C |
---|
534 | #define XL_W3_FREE_RX 0x0A |
---|
535 | #define XL_W3_MAC_CTRL 0x06 |
---|
536 | |
---|
537 | #define XL_ICFG_CONNECTOR_MASK 0x00F00000 |
---|
538 | #define XL_ICFG_CONNECTOR_BITS 20 |
---|
539 | |
---|
540 | #define XL_ICFG_RAMSIZE_MASK 0x00000007 |
---|
541 | #define XL_ICFG_RAMWIDTH 0x00000008 |
---|
542 | #define XL_ICFG_ROMSIZE_MASK (0x00000040|0x00000080) |
---|
543 | #define XL_ICFG_DISABLE_BASSD 0x00000100 |
---|
544 | #define XL_ICFG_RAMLOC 0x00000200 |
---|
545 | #define XL_ICFG_RAMPART (0x00010000|0x00020000) |
---|
546 | #define XL_ICFG_XCVRSEL (0x00100000|0x00200000|0x00400000) |
---|
547 | #define XL_ICFG_AUTOSEL 0x01000000 |
---|
548 | |
---|
549 | #define XL_XCVR_10BT 0x00 |
---|
550 | #define XL_XCVR_AUI 0x01 |
---|
551 | #define XL_XCVR_RSVD_0 0x02 |
---|
552 | #define XL_XCVR_COAX 0x03 |
---|
553 | #define XL_XCVR_100BTX 0x04 |
---|
554 | #define XL_XCVR_100BFX 0x05 |
---|
555 | #define XL_XCVR_MII 0x06 |
---|
556 | #define XL_XCVR_RSVD_1 0x07 |
---|
557 | #define XL_XCVR_AUTO 0x08 /* 3c905B only */ |
---|
558 | |
---|
559 | #define XL_MACCTRL_DEFER_EXT_END 0x0001 |
---|
560 | #define XL_MACCTRL_DEFER_0 0x0002 |
---|
561 | #define XL_MACCTRL_DEFER_1 0x0004 |
---|
562 | #define XL_MACCTRL_DEFER_2 0x0008 |
---|
563 | #define XL_MACCTRL_DEFER_3 0x0010 |
---|
564 | #define XL_MACCTRL_DUPLEX 0x0020 |
---|
565 | #define XL_MACCTRL_ALLOW_LARGE_PACK 0x0040 |
---|
566 | #define XL_MACCTRL_EXTEND_AFTER_COL 0x0080 (3c905B only) |
---|
567 | #define XL_MACCTRL_FLOW_CONTROL_ENB 0x0100 (3c905B only) |
---|
568 | #define XL_MACCTRL_VLT_END 0x0200 (3c905B only) |
---|
569 | |
---|
570 | /* |
---|
571 | * The 'reset options' register contains power-on reset values |
---|
572 | * loaded from the EEPROM. This includes the supported media |
---|
573 | * types on the card. It is also known as the media options register. |
---|
574 | */ |
---|
575 | #define XL_W3_MEDIA_OPT 0x08 |
---|
576 | |
---|
577 | #define XL_MEDIAOPT_BT4 0x0001 /* MII */ |
---|
578 | #define XL_MEDIAOPT_BTX 0x0002 /* on-chip */ |
---|
579 | #define XL_MEDIAOPT_BFX 0x0004 /* on-chip */ |
---|
580 | #define XL_MEDIAOPT_BT 0x0008 /* on-chip */ |
---|
581 | #define XL_MEDIAOPT_BNC 0x0010 /* on-chip */ |
---|
582 | #define XL_MEDIAOPT_AUI 0x0020 /* on-chip */ |
---|
583 | #define XL_MEDIAOPT_MII 0x0040 /* MII */ |
---|
584 | #define XL_MEDIAOPT_VCO 0x0100 /* 1st gen chip only */ |
---|
585 | |
---|
586 | #define XL_MEDIAOPT_10FL 0x0100 /* 3x905B only, on-chip */ |
---|
587 | #define XL_MEDIAOPT_MASK 0x01FF |
---|
588 | |
---|
589 | /* |
---|
590 | * Window 4 (diagnostics) |
---|
591 | */ |
---|
592 | #define XL_W4_UPPERBYTESOK 0x0D |
---|
593 | #define XL_W4_BADSSD 0x0C |
---|
594 | #define XL_W4_MEDIA_STATUS 0x0A |
---|
595 | #define XL_W4_PHY_MGMT 0x08 |
---|
596 | #define XL_W4_NET_DIAG 0x06 |
---|
597 | #define XL_W4_FIFO_DIAG 0x04 |
---|
598 | #define XL_W4_VCO_DIAG 0x02 |
---|
599 | |
---|
600 | #define XL_W4_CTRLR_STAT 0x08 |
---|
601 | #define XL_W4_TX_DIAG 0x00 |
---|
602 | |
---|
603 | #define XL_MII_CLK 0x01 |
---|
604 | #define XL_MII_DATA 0x02 |
---|
605 | #define XL_MII_DIR 0x04 |
---|
606 | |
---|
607 | #define XL_MEDIA_SQE 0x0008 |
---|
608 | #define XL_MEDIA_10TP 0x00C0 |
---|
609 | #define XL_MEDIA_LNK 0x0080 |
---|
610 | #define XL_MEDIA_LNKBEAT 0x0800 |
---|
611 | |
---|
612 | #define XL_MEDIASTAT_CRCSTRIP 0x0004 |
---|
613 | #define XL_MEDIASTAT_SQEENB 0x0008 |
---|
614 | #define XL_MEDIASTAT_COLDET 0x0010 |
---|
615 | #define XL_MEDIASTAT_CARRIER 0x0020 |
---|
616 | #define XL_MEDIASTAT_JABGUARD 0x0040 |
---|
617 | #define XL_MEDIASTAT_LINKBEAT 0x0080 |
---|
618 | #define XL_MEDIASTAT_JABDETECT 0x0200 |
---|
619 | #define XL_MEDIASTAT_POLREVERS 0x0400 |
---|
620 | #define XL_MEDIASTAT_LINKDETECT 0x0800 |
---|
621 | #define XL_MEDIASTAT_TXINPROG 0x1000 |
---|
622 | #define XL_MEDIASTAT_DCENB 0x4000 |
---|
623 | #define XL_MEDIASTAT_AUIDIS 0x8000 |
---|
624 | |
---|
625 | #define XL_NETDIAG_TEST_LOWVOLT 0x0001 |
---|
626 | #define XL_NETDIAG_ASIC_REVMASK (0x0002|0x0004|0x0008|0x0010|0x0020) |
---|
627 | #define XL_NETDIAG_UPPER_BYTES_ENABLE 0x0040 |
---|
628 | #define XL_NETDIAG_STATS_ENABLED 0x0080 |
---|
629 | #define XL_NETDIAG_TX_FATALERR 0x0100 |
---|
630 | #define XL_NETDIAG_TRANSMITTING 0x0200 |
---|
631 | #define XL_NETDIAG_RX_ENABLED 0x0400 |
---|
632 | #define XL_NETDIAG_TX_ENABLED 0x0800 |
---|
633 | #define XL_NETDIAG_FIFO_LOOPBACK 0x1000 |
---|
634 | #define XL_NETDIAG_MAC_LOOPBACK 0x2000 |
---|
635 | #define XL_NETDIAG_ENDEC_LOOPBACK 0x4000 |
---|
636 | #define XL_NETDIAG_EXTERNAL_LOOP 0x8000 |
---|
637 | |
---|
638 | /* |
---|
639 | * Window 5 |
---|
640 | */ |
---|
641 | #define XL_W5_STAT_ENB 0x0C |
---|
642 | #define XL_W5_INTR_ENB 0x0A |
---|
643 | #define XL_W5_RECLAIM_THRESH 0x09 /* 3c905B only */ |
---|
644 | #define XL_W5_RX_FILTER 0x08 |
---|
645 | #define XL_W5_RX_EARLYTHRESH 0x06 |
---|
646 | #define XL_W5_TX_AVAILTHRESH 0x02 |
---|
647 | #define XL_W5_TX_STARTTHRESH 0x00 |
---|
648 | |
---|
649 | /* |
---|
650 | * RX filter bits |
---|
651 | */ |
---|
652 | #define XL_RXFILTER_INDIVIDUAL 0x01 |
---|
653 | #define XL_RXFILTER_ALLMULTI 0x02 |
---|
654 | #define XL_RXFILTER_BROADCAST 0x04 |
---|
655 | #define XL_RXFILTER_ALLFRAMES 0x08 |
---|
656 | #define XL_RXFILTER_MULTIHASH 0x10 /* 3c905B only */ |
---|
657 | |
---|
658 | /* |
---|
659 | * Window 6 (stats) |
---|
660 | */ |
---|
661 | #define XL_W6_TX_BYTES_OK 0x0C |
---|
662 | #define XL_W6_RX_BYTES_OK 0x0A |
---|
663 | #define XL_W6_UPPER_FRAMES_OK 0x09 |
---|
664 | #define XL_W6_DEFERRED 0x08 |
---|
665 | #define XL_W6_RX_OK 0x07 |
---|
666 | #define XL_W6_TX_OK 0x06 |
---|
667 | #define XL_W6_RX_OVERRUN 0x05 |
---|
668 | #define XL_W6_COL_LATE 0x04 |
---|
669 | #define XL_W6_COL_SINGLE 0x03 |
---|
670 | #define XL_W6_COL_MULTIPLE 0x02 |
---|
671 | #define XL_W6_SQE_ERRORS 0x01 |
---|
672 | #define XL_W6_CARRIER_LOST 0x00 |
---|
673 | |
---|
674 | /* |
---|
675 | * Window 7 (bus master control) |
---|
676 | */ |
---|
677 | #define XL_W7_BM_ADDR 0x00 |
---|
678 | #define XL_W7_BM_LEN 0x06 |
---|
679 | #define XL_W7_BM_STATUS 0x0B |
---|
680 | #define XL_W7_BM_TIMEr 0x0A |
---|
681 | |
---|
682 | /* |
---|
683 | * bus master control registers |
---|
684 | */ |
---|
685 | #define XL_BM_PKTSTAT 0x20 |
---|
686 | #define XL_BM_DOWNLISTPTR 0x24 |
---|
687 | #define XL_BM_FRAGADDR 0x28 |
---|
688 | #define XL_BM_FRAGLEN 0x2C |
---|
689 | #define XL_BM_TXFREETHRESH 0x2F |
---|
690 | #define XL_BM_UPPKTSTAT 0x30 |
---|
691 | #define XL_BM_UPLISTPTR 0x38 |
---|
692 | |
---|
693 | |
---|
694 | |
---|
695 | |
---|
696 | |
---|
697 | |
---|
698 | |
---|
699 | |
---|
700 | struct xl_mii_frame { |
---|
701 | u_int8_t mii_stdelim; |
---|
702 | u_int8_t mii_opcode; |
---|
703 | u_int8_t mii_phyaddr; |
---|
704 | u_int8_t mii_regaddr; |
---|
705 | u_int8_t mii_turnaround; |
---|
706 | u_int16_t mii_data; |
---|
707 | }; |
---|
708 | |
---|
709 | /* |
---|
710 | * MII constants |
---|
711 | */ |
---|
712 | #define XL_MII_STARTDELIM 0x01 |
---|
713 | #define XL_MII_READOP 0x02 |
---|
714 | #define XL_MII_WRITEOP 0x01 |
---|
715 | #define XL_MII_TURNAROUND 0x02 |
---|
716 | |
---|
717 | |
---|
718 | |
---|
719 | /* |
---|
720 | * The 3C905B adapters implement a few features that we want to |
---|
721 | * take advantage of, namely the multicast hash filter. With older |
---|
722 | * chips, you only have the option of turning on reception of all |
---|
723 | * multicast frames, which is kind of lame. |
---|
724 | * |
---|
725 | * We also use this to decide on a transmit strategy. For the 3c90xB |
---|
726 | * cards, we can use polled descriptor mode, which reduces CPU overhead. |
---|
727 | */ |
---|
728 | #define XL_TYPE_905B 1 |
---|
729 | #define XL_TYPE_90X 2 |
---|
730 | |
---|
731 | #define XL_FLAG_FUNCREG 0x0001 |
---|
732 | #define XL_FLAG_PHYOK 0x0002 |
---|
733 | #define XL_FLAG_EEPROM_OFFSET_30 0x0004 |
---|
734 | #define XL_FLAG_WEIRDRESET 0x0008 |
---|
735 | #define XL_FLAG_8BITROM 0x0010 |
---|
736 | #define XL_FLAG_INVERT_LED_PWR 0x0020 |
---|
737 | #define XL_FLAG_INVERT_MII_PWR 0x0040 |
---|
738 | #define XL_FLAG_NO_XCVR_PWR 0x0080 |
---|
739 | #define XL_FLAG_USE_MMIO 0x0100 |
---|
740 | |
---|
741 | #define XL_NO_XCVR_PWR_MAGICBITS 0x0900 |
---|
742 | |
---|
743 | |
---|
744 | #define XL_MIN_FRAMELEN 60 |
---|
745 | |
---|
746 | #define XL_LAST_FRAG 0x80000000 |
---|
747 | |
---|
748 | |
---|
749 | |
---|
750 | |
---|
751 | |
---|
752 | |
---|
753 | |
---|
754 | struct xl_stats |
---|
755 | { |
---|
756 | /* accumulated stats */ |
---|
757 | u_int16_t xl_carrier_lost; |
---|
758 | u_int16_t xl_sqe_errs; |
---|
759 | u_int16_t xl_tx_multi_collision; |
---|
760 | u_int16_t xl_tx_single_collision; |
---|
761 | u_int16_t xl_tx_late_collision; |
---|
762 | u_int16_t xl_rx_overrun; |
---|
763 | u_int16_t xl_tx_deferred; |
---|
764 | |
---|
765 | u_int32_t xl_rx_bytes_ok; |
---|
766 | u_int32_t xl_tx_bytes_ok; |
---|
767 | |
---|
768 | u_int32_t xl_tx_frames_ok; |
---|
769 | u_int32_t xl_rx_frames_ok; |
---|
770 | |
---|
771 | u_int16_t xl_badssd; |
---|
772 | |
---|
773 | /* non-accumulated stats */ |
---|
774 | u_int16_t intstatus; |
---|
775 | u_int16_t rxstatus; |
---|
776 | u_int8_t txstatus; |
---|
777 | u_int16_t mediastatus; |
---|
778 | |
---|
779 | u_int32_t txcomplete_ints; |
---|
780 | |
---|
781 | u_int16_t miianr, miipar, miistatus, miicmd; |
---|
782 | |
---|
783 | u_int32_t device_interrupts; |
---|
784 | u_int32_t internalconfig; |
---|
785 | u_int16_t mac_control; |
---|
786 | |
---|
787 | u_int16_t smbstatus; |
---|
788 | u_int32_t dmactl; |
---|
789 | u_int16_t txfree; |
---|
790 | }; |
---|
791 | |
---|
792 | |
---|
793 | |
---|
794 | struct xl_type |
---|
795 | { |
---|
796 | u_int16_t xl_vid; |
---|
797 | u_int16_t xl_did; |
---|
798 | char *xl_name; |
---|
799 | }; |
---|
800 | |
---|
801 | |
---|
802 | |
---|
803 | /* |
---|
804 | * Various supported device vendors/types and their names. |
---|
805 | */ |
---|
806 | static struct xl_type xl_devs[] = { |
---|
807 | { TC_VENDORID, TC_DEVICEID_BOOMERANG_10BT, |
---|
808 | "3Com 3c900-TPO Etherlink XL" }, |
---|
809 | { TC_VENDORID, TC_DEVICEID_BOOMERANG_10BT_COMBO, |
---|
810 | "3Com 3c900-COMBO Etherlink XL" }, |
---|
811 | { TC_VENDORID, TC_DEVICEID_BOOMERANG_10_100BT, |
---|
812 | "3Com 3c905-TX Fast Etherlink XL" }, |
---|
813 | { TC_VENDORID, TC_DEVICEID_BOOMERANG_100BT4, |
---|
814 | "3Com 3c905-T4 Fast Etherlink XL" }, |
---|
815 | { TC_VENDORID, TC_DEVICEID_KRAKATOA_10BT, |
---|
816 | "3Com 3c900B-TPO Etherlink XL" }, |
---|
817 | { TC_VENDORID, TC_DEVICEID_KRAKATOA_10BT_COMBO, |
---|
818 | "3Com 3c900B-COMBO Etherlink XL" }, |
---|
819 | { TC_VENDORID, TC_DEVICEID_KRAKATOA_10BT_TPC, |
---|
820 | "3Com 3c900B-TPC Etherlink XL" }, |
---|
821 | { TC_VENDORID, TC_DEVICEID_CYCLONE_10FL, |
---|
822 | "3Com 3c900B-FL Etherlink XL" }, |
---|
823 | { TC_VENDORID, TC_DEVICEID_HURRICANE_10_100BT, |
---|
824 | "3Com 3c905B-TX Fast Etherlink XL" }, |
---|
825 | { TC_VENDORID, TC_DEVICEID_CYCLONE_10_100BT4, |
---|
826 | "3Com 3c905B-T4 Fast Etherlink XL" }, |
---|
827 | { TC_VENDORID, TC_DEVICEID_CYCLONE_10_100FX, |
---|
828 | "3Com 3c905B-FX/SC Fast Etherlink XL" }, |
---|
829 | { TC_VENDORID, TC_DEVICEID_CYCLONE_10_100_COMBO, |
---|
830 | "3Com 3c905B-COMBO Fast Etherlink XL" }, |
---|
831 | { TC_VENDORID, TC_DEVICEID_TORNADO_10_100BT, |
---|
832 | "3Com 3c905C-TX Fast Etherlink XL" }, |
---|
833 | { TC_VENDORID, TC_DEVICEID_TORNADO_10_100BT_920B, |
---|
834 | "3Com 3c920B-EMB Integrated Fast Etherlink XL" }, |
---|
835 | { TC_VENDORID, TC_DEVICEID_HURRICANE_10_100BT_SERV, |
---|
836 | "3Com 3c980 Fast Etherlink XL" }, |
---|
837 | { TC_VENDORID, TC_DEVICEID_TORNADO_10_100BT_SERV, |
---|
838 | "3Com 3c980C Fast Etherlink XL" }, |
---|
839 | { TC_VENDORID, TC_DEVICEID_HURRICANE_SOHO100TX, |
---|
840 | "3Com 3cSOHO100-TX OfficeConnect" }, |
---|
841 | { TC_VENDORID, TC_DEVICEID_TORNADO_HOMECONNECT, |
---|
842 | "3Com 3c450-TX HomeConnect" }, |
---|
843 | { TC_VENDORID, TC_DEVICEID_HURRICANE_555, |
---|
844 | "3Com 3c555 Fast Etherlink XL" }, |
---|
845 | { TC_VENDORID, TC_DEVICEID_HURRICANE_556, |
---|
846 | "3Com 3c556 Fast Etherlink XL" }, |
---|
847 | { TC_VENDORID, TC_DEVICEID_HURRICANE_556B, |
---|
848 | "3Com 3c556B Fast Etherlink XL" }, |
---|
849 | { TC_VENDORID, TC_DEVICEID_HURRICANE_575A, |
---|
850 | "3Com 3c575TX Fast Etherlink XL" }, |
---|
851 | { TC_VENDORID, TC_DEVICEID_HURRICANE_575B, |
---|
852 | "3Com 3c575B Fast Etherlink XL" }, |
---|
853 | { TC_VENDORID, TC_DEVICEID_HURRICANE_575C, |
---|
854 | "3Com 3c575C Fast Etherlink XL" }, |
---|
855 | { TC_VENDORID, TC_DEVICEID_HURRICANE_656, |
---|
856 | "3Com 3c656 Fast Etherlink XL" }, |
---|
857 | { TC_VENDORID, TC_DEVICEID_HURRICANE_656B, |
---|
858 | "3Com 3c656B Fast Etherlink XL" }, |
---|
859 | { TC_VENDORID, TC_DEVICEID_TORNADO_656C, |
---|
860 | "3Com 3c656C Fast Etherlink XL" }, |
---|
861 | { 0, 0, NULL } |
---|
862 | }; |
---|
863 | |
---|
864 | |
---|
865 | #define XL_TIMEOUT 1000 |
---|
866 | |
---|
867 | |
---|
868 | |
---|
869 | |
---|
870 | |
---|
871 | |
---|
872 | /* rx message descriptor entry, ensure the struct is aligned to 8 bytes */ |
---|
873 | struct RXMD |
---|
874 | { |
---|
875 | /* used by hardware */ |
---|
876 | volatile uint32_t next; |
---|
877 | volatile uint32_t status; |
---|
878 | volatile uint32_t addr; |
---|
879 | volatile uint32_t length; |
---|
880 | /* used by software */ |
---|
881 | struct mbuf *mbuf; /* scratch variable used in the tx ring */ |
---|
882 | struct RXMD *next_md; |
---|
883 | } __attribute__ ((aligned (8), packed)); |
---|
884 | |
---|
885 | |
---|
886 | |
---|
887 | |
---|
888 | |
---|
889 | #define NUM_FRAGS 6 |
---|
890 | |
---|
891 | /* |
---|
892 | * tx message descriptor entry, ensure the struct is aligned to 8 bytes |
---|
893 | */ |
---|
894 | |
---|
895 | struct tfrag |
---|
896 | { |
---|
897 | volatile uint32_t addr; |
---|
898 | volatile uint32_t length; |
---|
899 | } __attribute__ ((packed)); |
---|
900 | |
---|
901 | struct TXMD |
---|
902 | { |
---|
903 | /* used by hardware */ |
---|
904 | volatile uint32_t next; |
---|
905 | volatile uint32_t status; |
---|
906 | struct tfrag txfrags[NUM_FRAGS]; |
---|
907 | /* used by software */ |
---|
908 | struct mbuf *mbuf; /* scratch variable used in the tx ring */ |
---|
909 | struct TXMD *next_md, *chainptr; |
---|
910 | } __attribute__ ((aligned (8), packed)); |
---|
911 | |
---|
912 | |
---|
913 | |
---|
914 | |
---|
915 | |
---|
916 | #define NUM_CHAIN_LENGTHS 50 |
---|
917 | |
---|
918 | |
---|
919 | |
---|
920 | /* |
---|
921 | * Per-device data |
---|
922 | */ |
---|
923 | struct elnk_softc |
---|
924 | { |
---|
925 | struct arpcom arpcom; |
---|
926 | |
---|
927 | rtems_irq_connect_data irqInfo; |
---|
928 | rtems_event_set ioevent; |
---|
929 | unsigned int ioaddr; |
---|
930 | |
---|
931 | unsigned char *bufferBase, *ringBase; |
---|
932 | |
---|
933 | struct RXMD *rx_ring, *curr_rx_md; |
---|
934 | struct TXMD *tx_ring, *last_tx_md, *last_txchain_head; |
---|
935 | |
---|
936 | rtems_id stat_timer_id; |
---|
937 | uint32_t stats_update_ticks; |
---|
938 | |
---|
939 | struct xl_stats xl_stats; |
---|
940 | |
---|
941 | u_int8_t xl_unit; /* interface number */ |
---|
942 | u_int8_t xl_type; |
---|
943 | int xl_flags; |
---|
944 | u_int16_t xl_media; |
---|
945 | u_int16_t xl_caps; |
---|
946 | u_int32_t xl_xcvr; |
---|
947 | u_int8_t xl_stats_no_timeout; |
---|
948 | u_int16_t xl_tx_thresh; |
---|
949 | |
---|
950 | int tx_idle; |
---|
951 | |
---|
952 | short chain_lengths[NUM_CHAIN_LENGTHS]; |
---|
953 | int chlenIndex; |
---|
954 | |
---|
955 | unsigned short vendorID, deviceID; |
---|
956 | int acceptBroadcast; |
---|
957 | int numTxbuffers, numRxbuffers; |
---|
958 | }; |
---|
959 | |
---|
960 | static struct elnk_softc elnk_softc[NUM_UNITS]; |
---|
961 | static rtems_id rxDaemonTid; |
---|
962 | static rtems_id txDaemonTid; |
---|
963 | static rtems_id chainRecoveryQueue; |
---|
964 | |
---|
965 | |
---|
966 | |
---|
967 | |
---|
968 | |
---|
969 | |
---|
970 | |
---|
971 | #if defined(__i386__) |
---|
972 | |
---|
973 | #define CSR_WRITE_4(sc, reg, val) i386_outport_long( sc->ioaddr + reg, val ) |
---|
974 | #define CSR_WRITE_2(sc, reg, val) i386_outport_word( sc->ioaddr + reg, val ) |
---|
975 | #define CSR_WRITE_1(sc, reg, val) i386_outport_byte( sc->ioaddr + reg, val ) |
---|
976 | |
---|
977 | |
---|
978 | inline unsigned int CSR_READ_4( struct elnk_softc *sc, int reg) |
---|
979 | { |
---|
980 | unsigned int myval; |
---|
981 | i386_inport_long( sc->ioaddr + reg, myval ); |
---|
982 | return myval; |
---|
983 | } |
---|
984 | |
---|
985 | inline unsigned short CSR_READ_2( struct elnk_softc *sc, int reg) |
---|
986 | { |
---|
987 | unsigned short myval; |
---|
988 | i386_inport_word( sc->ioaddr + reg, myval ); |
---|
989 | return myval; |
---|
990 | } |
---|
991 | |
---|
992 | inline unsigned char CSR_READ_1( struct elnk_softc *sc, int reg) |
---|
993 | { |
---|
994 | unsigned char myval; |
---|
995 | i386_inport_byte( sc->ioaddr + reg, myval ); |
---|
996 | return myval; |
---|
997 | } |
---|
998 | |
---|
999 | #endif |
---|
1000 | |
---|
1001 | #if defined(__PPC__) |
---|
1002 | |
---|
1003 | #define CSR_WRITE_4(sc, reg, val) outl( val, sc->ioaddr + reg) |
---|
1004 | #define CSR_WRITE_2(sc, reg, val) outw( val, sc->ioaddr + reg) |
---|
1005 | #define CSR_WRITE_1(sc, reg, val) outb( val, sc->ioaddr + reg) |
---|
1006 | |
---|
1007 | #define CSR_READ_4(sc, reg) inl(sc->ioaddr + reg) |
---|
1008 | #define CSR_READ_2(sc, reg) inw(sc->ioaddr + reg) |
---|
1009 | #define CSR_READ_1(sc, reg) inb(sc->ioaddr + reg) |
---|
1010 | |
---|
1011 | #endif |
---|
1012 | |
---|
1013 | |
---|
1014 | #define XL_SEL_WIN(x) CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_WINSEL | x) |
---|
1015 | |
---|
1016 | |
---|
1017 | |
---|
1018 | |
---|
1019 | |
---|
1020 | |
---|
1021 | |
---|
1022 | |
---|
1023 | |
---|
1024 | |
---|
1025 | |
---|
1026 | /* |
---|
1027 | * Murphy's law says that it's possible the chip can wedge and |
---|
1028 | * the 'command in progress' bit may never clear. Hence, we wait |
---|
1029 | * only a finite amount of time to avoid getting caught in an |
---|
1030 | * infinite loop. Normally this delay routine would be a macro, |
---|
1031 | * but it isn't called during normal operation so we can afford |
---|
1032 | * to make it a function. |
---|
1033 | */ |
---|
1034 | static void |
---|
1035 | xl_wait(struct elnk_softc *sc) |
---|
1036 | { |
---|
1037 | register int i; |
---|
1038 | |
---|
1039 | for(i = 0; i < XL_TIMEOUT; i++) |
---|
1040 | { |
---|
1041 | if (!(CSR_READ_2(sc, XL_STATUS) & XL_STAT_CMDBUSY)) |
---|
1042 | break; |
---|
1043 | } |
---|
1044 | |
---|
1045 | if (i == XL_TIMEOUT) |
---|
1046 | printk("etherlink : unit elnk%d command never completed\n", sc->xl_unit ); |
---|
1047 | return; |
---|
1048 | } |
---|
1049 | |
---|
1050 | |
---|
1051 | |
---|
1052 | |
---|
1053 | |
---|
1054 | |
---|
1055 | /* |
---|
1056 | * MII access routines are provided for adapters with external |
---|
1057 | * PHYs (3c905-TX, 3c905-T4, 3c905B-T4) and those with built-in |
---|
1058 | * autoneg logic that's faked up to look like a PHY (3c905B-TX). |
---|
1059 | * Note: if you don't perform the MDIO operations just right, |
---|
1060 | * it's possible to end up with code that works correctly with |
---|
1061 | * some chips/CPUs/processor speeds/bus speeds/etc but not |
---|
1062 | * with others. |
---|
1063 | */ |
---|
1064 | #define MII_SET(x) \ |
---|
1065 | CSR_WRITE_2(sc, XL_W4_PHY_MGMT, \ |
---|
1066 | CSR_READ_2(sc, XL_W4_PHY_MGMT) | (x)) |
---|
1067 | |
---|
1068 | #define MII_CLR(x) \ |
---|
1069 | CSR_WRITE_2(sc, XL_W4_PHY_MGMT, \ |
---|
1070 | CSR_READ_2(sc, XL_W4_PHY_MGMT) & ~(x)) |
---|
1071 | |
---|
1072 | /* |
---|
1073 | * Sync the PHYs by setting data bit and strobing the clock 32 times. |
---|
1074 | */ |
---|
1075 | static void |
---|
1076 | xl_mii_sync( |
---|
1077 | struct elnk_softc *sc) |
---|
1078 | { |
---|
1079 | register int i; |
---|
1080 | |
---|
1081 | XL_SEL_WIN(4); |
---|
1082 | MII_SET(XL_MII_DIR|XL_MII_DATA); |
---|
1083 | |
---|
1084 | for (i = 0; i < 32; i++) { |
---|
1085 | MII_SET(XL_MII_CLK); |
---|
1086 | MII_SET(XL_MII_DATA); |
---|
1087 | MII_CLR(XL_MII_CLK); |
---|
1088 | MII_SET(XL_MII_DATA); |
---|
1089 | } |
---|
1090 | |
---|
1091 | return; |
---|
1092 | } |
---|
1093 | |
---|
1094 | /* |
---|
1095 | * Clock a series of bits through the MII. |
---|
1096 | */ |
---|
1097 | static void |
---|
1098 | xl_mii_send( |
---|
1099 | struct elnk_softc *sc, |
---|
1100 | u_int32_t bits, |
---|
1101 | int cnt ) |
---|
1102 | { |
---|
1103 | int i; |
---|
1104 | |
---|
1105 | XL_SEL_WIN(4); |
---|
1106 | MII_CLR(XL_MII_CLK); |
---|
1107 | |
---|
1108 | for (i = (0x1 << (cnt - 1)); i; i >>= 1) { |
---|
1109 | if (bits & i) { |
---|
1110 | MII_SET(XL_MII_DATA); |
---|
1111 | } else { |
---|
1112 | MII_CLR(XL_MII_DATA); |
---|
1113 | } |
---|
1114 | MII_CLR(XL_MII_CLK); |
---|
1115 | MII_SET(XL_MII_CLK); |
---|
1116 | } |
---|
1117 | } |
---|
1118 | |
---|
1119 | /* |
---|
1120 | * Read an PHY register through the MII. |
---|
1121 | */ |
---|
1122 | static int |
---|
1123 | xl_mii_readreg( |
---|
1124 | struct elnk_softc *sc, |
---|
1125 | struct xl_mii_frame *frame ) |
---|
1126 | { |
---|
1127 | int i, ack; |
---|
1128 | |
---|
1129 | /* |
---|
1130 | * Set up frame for RX. |
---|
1131 | */ |
---|
1132 | frame->mii_stdelim = XL_MII_STARTDELIM; |
---|
1133 | frame->mii_opcode = XL_MII_READOP; |
---|
1134 | frame->mii_turnaround = 0; |
---|
1135 | frame->mii_data = 0; |
---|
1136 | |
---|
1137 | /* |
---|
1138 | * Select register window 4. |
---|
1139 | */ |
---|
1140 | |
---|
1141 | XL_SEL_WIN(4); |
---|
1142 | |
---|
1143 | CSR_WRITE_2(sc, XL_W4_PHY_MGMT, 0); |
---|
1144 | /* |
---|
1145 | * Turn on data xmit. |
---|
1146 | */ |
---|
1147 | MII_SET(XL_MII_DIR); |
---|
1148 | |
---|
1149 | xl_mii_sync(sc); |
---|
1150 | |
---|
1151 | /* |
---|
1152 | * Send command/address info. |
---|
1153 | */ |
---|
1154 | xl_mii_send(sc, frame->mii_stdelim, 2); |
---|
1155 | xl_mii_send(sc, frame->mii_opcode, 2); |
---|
1156 | xl_mii_send(sc, frame->mii_phyaddr, 5); |
---|
1157 | xl_mii_send(sc, frame->mii_regaddr, 5); |
---|
1158 | |
---|
1159 | /* Idle bit */ |
---|
1160 | MII_CLR((XL_MII_CLK|XL_MII_DATA)); |
---|
1161 | MII_SET(XL_MII_CLK); |
---|
1162 | |
---|
1163 | /* Turn off xmit. */ |
---|
1164 | MII_CLR(XL_MII_DIR); |
---|
1165 | |
---|
1166 | /* Check for ack */ |
---|
1167 | MII_CLR(XL_MII_CLK); |
---|
1168 | ack = CSR_READ_2(sc, XL_W4_PHY_MGMT) & XL_MII_DATA; |
---|
1169 | MII_SET(XL_MII_CLK); |
---|
1170 | |
---|
1171 | /* |
---|
1172 | * Now try reading data bits. If the ack failed, we still |
---|
1173 | * need to clock through 16 cycles to keep the PHY(s) in sync. |
---|
1174 | */ |
---|
1175 | if (ack) { |
---|
1176 | for(i = 0; i < 16; i++) { |
---|
1177 | MII_CLR(XL_MII_CLK); |
---|
1178 | MII_SET(XL_MII_CLK); |
---|
1179 | } |
---|
1180 | goto fail; |
---|
1181 | } |
---|
1182 | |
---|
1183 | for (i = 0x8000; i; i >>= 1) { |
---|
1184 | MII_CLR(XL_MII_CLK); |
---|
1185 | if (!ack) { |
---|
1186 | if (CSR_READ_2(sc, XL_W4_PHY_MGMT) & XL_MII_DATA) |
---|
1187 | frame->mii_data |= i; |
---|
1188 | } |
---|
1189 | MII_SET(XL_MII_CLK); |
---|
1190 | } |
---|
1191 | |
---|
1192 | fail: |
---|
1193 | |
---|
1194 | MII_CLR(XL_MII_CLK); |
---|
1195 | MII_SET(XL_MII_CLK); |
---|
1196 | |
---|
1197 | if (ack) |
---|
1198 | return(1); |
---|
1199 | return(0); |
---|
1200 | } |
---|
1201 | |
---|
1202 | /* |
---|
1203 | * Write to a PHY register through the MII. |
---|
1204 | */ |
---|
1205 | static int |
---|
1206 | xl_mii_writereg( |
---|
1207 | struct elnk_softc *sc, |
---|
1208 | struct xl_mii_frame *frame ) |
---|
1209 | { |
---|
1210 | /* |
---|
1211 | * Set up frame for TX. |
---|
1212 | */ |
---|
1213 | |
---|
1214 | frame->mii_stdelim = XL_MII_STARTDELIM; |
---|
1215 | frame->mii_opcode = XL_MII_WRITEOP; |
---|
1216 | frame->mii_turnaround = XL_MII_TURNAROUND; |
---|
1217 | |
---|
1218 | /* |
---|
1219 | * Select the window 4. |
---|
1220 | */ |
---|
1221 | XL_SEL_WIN(4); |
---|
1222 | |
---|
1223 | /* |
---|
1224 | * Turn on data output. |
---|
1225 | */ |
---|
1226 | MII_SET(XL_MII_DIR); |
---|
1227 | |
---|
1228 | xl_mii_sync(sc); |
---|
1229 | |
---|
1230 | xl_mii_send(sc, frame->mii_stdelim, 2); |
---|
1231 | xl_mii_send(sc, frame->mii_opcode, 2); |
---|
1232 | xl_mii_send(sc, frame->mii_phyaddr, 5); |
---|
1233 | xl_mii_send(sc, frame->mii_regaddr, 5); |
---|
1234 | xl_mii_send(sc, frame->mii_turnaround, 2); |
---|
1235 | xl_mii_send(sc, frame->mii_data, 16); |
---|
1236 | |
---|
1237 | /* Idle bit. */ |
---|
1238 | MII_SET(XL_MII_CLK); |
---|
1239 | MII_CLR(XL_MII_CLK); |
---|
1240 | |
---|
1241 | /* |
---|
1242 | * Turn off xmit. |
---|
1243 | */ |
---|
1244 | MII_CLR(XL_MII_DIR); |
---|
1245 | |
---|
1246 | return(0); |
---|
1247 | } |
---|
1248 | |
---|
1249 | static int |
---|
1250 | xl_miibus_readreg( |
---|
1251 | struct elnk_softc *sc, |
---|
1252 | int phy, |
---|
1253 | int reg ) |
---|
1254 | { |
---|
1255 | struct xl_mii_frame frame; |
---|
1256 | |
---|
1257 | /* |
---|
1258 | * Pretend that PHYs are only available at MII address 24. |
---|
1259 | * This is to guard against problems with certain 3Com ASIC |
---|
1260 | * revisions that incorrectly map the internal transceiver |
---|
1261 | * control registers at all MII addresses. This can cause |
---|
1262 | * the miibus code to attach the same PHY several times over. |
---|
1263 | */ |
---|
1264 | if ((!(sc->xl_flags & XL_FLAG_PHYOK)) && phy != 24) |
---|
1265 | { |
---|
1266 | printk("etherlink : unit elnk%d xl_miibus_readreg returned\n", sc->xl_unit); |
---|
1267 | return(0); |
---|
1268 | } |
---|
1269 | |
---|
1270 | memset((char *)&frame, 0, sizeof(frame)); |
---|
1271 | |
---|
1272 | frame.mii_phyaddr = phy; |
---|
1273 | frame.mii_regaddr = reg; |
---|
1274 | xl_mii_readreg(sc, &frame); |
---|
1275 | |
---|
1276 | return(frame.mii_data); |
---|
1277 | } |
---|
1278 | |
---|
1279 | static int |
---|
1280 | xl_miibus_writereg( |
---|
1281 | struct elnk_softc *sc, |
---|
1282 | int phy, |
---|
1283 | int reg, |
---|
1284 | int data ) |
---|
1285 | { |
---|
1286 | struct xl_mii_frame frame; |
---|
1287 | |
---|
1288 | if ((!(sc->xl_flags & XL_FLAG_PHYOK)) && phy != 24) |
---|
1289 | { |
---|
1290 | printk("etherlink : unit elnk%d xl_miibus_writereg returned\n", sc->xl_unit); |
---|
1291 | return(0); |
---|
1292 | } |
---|
1293 | |
---|
1294 | memset((char *)&frame, 0, sizeof(frame)); |
---|
1295 | |
---|
1296 | frame.mii_phyaddr = phy; |
---|
1297 | frame.mii_regaddr = reg; |
---|
1298 | frame.mii_data = data; |
---|
1299 | |
---|
1300 | xl_mii_writereg(sc, &frame); |
---|
1301 | |
---|
1302 | return(0); |
---|
1303 | } |
---|
1304 | |
---|
1305 | |
---|
1306 | |
---|
1307 | |
---|
1308 | |
---|
1309 | |
---|
1310 | |
---|
1311 | |
---|
1312 | |
---|
1313 | /* |
---|
1314 | * The EEPROM is slow: give it time to come ready after issuing |
---|
1315 | * it a command. |
---|
1316 | */ |
---|
1317 | static int |
---|
1318 | xl_eeprom_wait(struct elnk_softc *sc) |
---|
1319 | { |
---|
1320 | int i; |
---|
1321 | |
---|
1322 | for (i = 0; i < 100; i++) { |
---|
1323 | if (CSR_READ_2(sc, XL_W0_EE_CMD) & XL_EE_BUSY) |
---|
1324 | DELAY(162); |
---|
1325 | else |
---|
1326 | break; |
---|
1327 | } |
---|
1328 | |
---|
1329 | if (i == 100) { |
---|
1330 | printk("etherlink : unit elnk%d eeprom failed to come ready\n", sc->xl_unit); |
---|
1331 | return(1); |
---|
1332 | } |
---|
1333 | |
---|
1334 | return(0); |
---|
1335 | } |
---|
1336 | |
---|
1337 | /* |
---|
1338 | * Read a sequence of words from the EEPROM. Note that ethernet address |
---|
1339 | * data is stored in the EEPROM in network byte order. |
---|
1340 | */ |
---|
1341 | static int |
---|
1342 | xl_read_eeprom( |
---|
1343 | struct elnk_softc *sc, |
---|
1344 | caddr_t dest, |
---|
1345 | int off, |
---|
1346 | int cnt, |
---|
1347 | int swap) |
---|
1348 | { |
---|
1349 | int err = 0, i; |
---|
1350 | u_int16_t word = 0, *ptr; |
---|
1351 | #define EEPROM_5BIT_OFFSET(A) ((((A) << 2) & 0x7F00) | ((A) & 0x003F)) |
---|
1352 | #define EEPROM_8BIT_OFFSET(A) ((A) & 0x003F) |
---|
1353 | /* WARNING! DANGER! |
---|
1354 | * It's easy to accidentally overwrite the rom content! |
---|
1355 | * Note: the 3c575 uses 8bit EEPROM offsets. |
---|
1356 | */ |
---|
1357 | XL_SEL_WIN(0); |
---|
1358 | |
---|
1359 | if (xl_eeprom_wait(sc)) |
---|
1360 | return(1); |
---|
1361 | |
---|
1362 | if (sc->xl_flags & XL_FLAG_EEPROM_OFFSET_30) |
---|
1363 | off += 0x30; |
---|
1364 | |
---|
1365 | for (i = 0; i < cnt; i++) { |
---|
1366 | if (sc->xl_flags & XL_FLAG_8BITROM) |
---|
1367 | CSR_WRITE_2(sc, XL_W0_EE_CMD, |
---|
1368 | XL_EE_8BIT_READ | EEPROM_8BIT_OFFSET(off + i)); |
---|
1369 | else |
---|
1370 | CSR_WRITE_2(sc, XL_W0_EE_CMD, |
---|
1371 | XL_EE_READ | EEPROM_5BIT_OFFSET(off + i)); |
---|
1372 | err = xl_eeprom_wait(sc); |
---|
1373 | if (err) |
---|
1374 | break; |
---|
1375 | word = CSR_READ_2(sc, XL_W0_EE_DATA); |
---|
1376 | ptr = (u_int16_t*)(dest + (i * 2)); |
---|
1377 | if (swap) |
---|
1378 | *ptr = ntohs(word); |
---|
1379 | else |
---|
1380 | *ptr = word; |
---|
1381 | } |
---|
1382 | |
---|
1383 | return(err ? 1 : 0); |
---|
1384 | } |
---|
1385 | |
---|
1386 | |
---|
1387 | |
---|
1388 | |
---|
1389 | static void |
---|
1390 | xl_stats_update( |
---|
1391 | rtems_id timerid, |
---|
1392 | void *xsc) |
---|
1393 | { |
---|
1394 | struct elnk_softc *sc = (struct elnk_softc *)xsc; |
---|
1395 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
1396 | u_int32_t t1; |
---|
1397 | |
---|
1398 | sc->xl_stats.intstatus = CSR_READ_2(sc, XL_STATUS); |
---|
1399 | |
---|
1400 | sc->xl_stats.miianr = xl_miibus_readreg(sc, 0x18, MII_ANAR ); |
---|
1401 | sc->xl_stats.miipar = xl_miibus_readreg(sc, 0x18, MII_ANLPAR ); |
---|
1402 | sc->xl_stats.miistatus = xl_miibus_readreg(sc, 0x18, MII_BMSR ); |
---|
1403 | sc->xl_stats.miicmd = xl_miibus_readreg(sc, 0x18, MII_BMCR ); |
---|
1404 | |
---|
1405 | XL_SEL_WIN(1); |
---|
1406 | sc->xl_stats.rxstatus = CSR_READ_2(sc, XL_W1_RX_STATUS ); |
---|
1407 | sc->xl_stats.txstatus = CSR_READ_1(sc, XL_W1_TX_STATUS ); |
---|
1408 | sc->xl_stats.smbstatus = CSR_READ_2(sc, 2 ); |
---|
1409 | |
---|
1410 | XL_SEL_WIN(3); |
---|
1411 | sc->xl_stats.internalconfig = CSR_READ_4(sc, XL_W3_INTERNAL_CFG); |
---|
1412 | sc->xl_stats.mac_control = CSR_READ_2(sc, XL_W3_MAC_CTRL); |
---|
1413 | sc->xl_stats.txfree = CSR_READ_2(sc, XL_W3_FREE_TX ); |
---|
1414 | |
---|
1415 | |
---|
1416 | /* Read all the stats registers. */ |
---|
1417 | XL_SEL_WIN(6); |
---|
1418 | |
---|
1419 | sc->xl_stats.xl_carrier_lost += CSR_READ_1(sc, XL_W6_CARRIER_LOST); |
---|
1420 | sc->xl_stats.xl_sqe_errs += CSR_READ_1(sc, XL_W6_SQE_ERRORS); |
---|
1421 | sc->xl_stats.xl_tx_multi_collision += CSR_READ_1(sc, XL_W6_COL_MULTIPLE); |
---|
1422 | sc->xl_stats.xl_tx_single_collision += CSR_READ_1(sc, XL_W6_COL_SINGLE); |
---|
1423 | sc->xl_stats.xl_tx_late_collision += CSR_READ_1(sc, XL_W6_COL_LATE); |
---|
1424 | sc->xl_stats.xl_rx_overrun += CSR_READ_1(sc, XL_W6_RX_OVERRUN); |
---|
1425 | sc->xl_stats.xl_tx_deferred += CSR_READ_1(sc, XL_W6_DEFERRED); |
---|
1426 | |
---|
1427 | sc->xl_stats.xl_tx_frames_ok += CSR_READ_1(sc, XL_W6_TX_OK); |
---|
1428 | sc->xl_stats.xl_rx_frames_ok += CSR_READ_1(sc, XL_W6_RX_OK); |
---|
1429 | |
---|
1430 | sc->xl_stats.xl_rx_bytes_ok += CSR_READ_2(sc, XL_W6_TX_BYTES_OK ); |
---|
1431 | sc->xl_stats.xl_tx_bytes_ok += CSR_READ_2(sc, XL_W6_RX_BYTES_OK ); |
---|
1432 | |
---|
1433 | t1 = CSR_READ_1(sc, XL_W6_UPPER_FRAMES_OK); |
---|
1434 | sc->xl_stats.xl_rx_frames_ok += ((t1 & 0x3) << 8); |
---|
1435 | sc->xl_stats.xl_tx_frames_ok += (((t1 >> 4) & 0x3) << 8); |
---|
1436 | |
---|
1437 | |
---|
1438 | ifp->if_ierrors += sc->xl_stats.xl_rx_overrun; |
---|
1439 | |
---|
1440 | ifp->if_collisions += sc->xl_stats.xl_tx_multi_collision + |
---|
1441 | sc->xl_stats.xl_tx_single_collision + |
---|
1442 | sc->xl_stats.xl_tx_late_collision; |
---|
1443 | |
---|
1444 | /* |
---|
1445 | * Boomerang and cyclone chips have an extra stats counter |
---|
1446 | * in window 4 (BadSSD). We have to read this too in order |
---|
1447 | * to clear out all the stats registers and avoid a statsoflow |
---|
1448 | * interrupt. |
---|
1449 | */ |
---|
1450 | XL_SEL_WIN(4); |
---|
1451 | |
---|
1452 | t1 = CSR_READ_1(sc, XL_W4_UPPERBYTESOK); |
---|
1453 | sc->xl_stats.xl_rx_bytes_ok += ((t1 & 0xf) << 16); |
---|
1454 | sc->xl_stats.xl_tx_bytes_ok += (((t1 >> 4) & 0xf) << 16); |
---|
1455 | |
---|
1456 | sc->xl_stats.xl_badssd += CSR_READ_1(sc, XL_W4_BADSSD); |
---|
1457 | |
---|
1458 | sc->xl_stats.mediastatus = CSR_READ_2(sc, XL_W4_MEDIA_STATUS ); |
---|
1459 | sc->xl_stats.dmactl = CSR_READ_4(sc, XL_DMACTL ); |
---|
1460 | |
---|
1461 | |
---|
1462 | XL_SEL_WIN(7); |
---|
1463 | |
---|
1464 | if (!sc->xl_stats_no_timeout) |
---|
1465 | rtems_timer_fire_after( sc->stat_timer_id, sc->stats_update_ticks, xl_stats_update, (void *)sc ); |
---|
1466 | return; |
---|
1467 | } |
---|
1468 | |
---|
1469 | |
---|
1470 | |
---|
1471 | |
---|
1472 | |
---|
1473 | |
---|
1474 | |
---|
1475 | static void |
---|
1476 | xl_reset(struct elnk_softc *sc) |
---|
1477 | { |
---|
1478 | register int i; |
---|
1479 | |
---|
1480 | XL_SEL_WIN(0); |
---|
1481 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RESET | |
---|
1482 | ((sc->xl_flags & XL_FLAG_WEIRDRESET) ? |
---|
1483 | XL_RESETOPT_DISADVFD:0)); |
---|
1484 | |
---|
1485 | for (i = 0; i < XL_TIMEOUT; i++) { |
---|
1486 | DELAY(10); |
---|
1487 | if (!(CSR_READ_2(sc, XL_STATUS) & XL_STAT_CMDBUSY)) |
---|
1488 | break; |
---|
1489 | } |
---|
1490 | |
---|
1491 | if (i == XL_TIMEOUT) |
---|
1492 | printk("etherlink : unit elnk%d reset didn't complete\n", sc->xl_unit); |
---|
1493 | |
---|
1494 | /* Reset TX and RX. */ |
---|
1495 | /* Note: the RX reset takes an absurd amount of time |
---|
1496 | * on newer versions of the Tornado chips such as those |
---|
1497 | * on the 3c905CX and newer 3c908C cards. We wait an |
---|
1498 | * extra amount of time so that xl_wait() doesn't complain |
---|
1499 | * and annoy the users. |
---|
1500 | */ |
---|
1501 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_RESET); |
---|
1502 | DELAY(100000); |
---|
1503 | xl_wait(sc); |
---|
1504 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET); |
---|
1505 | xl_wait(sc); |
---|
1506 | |
---|
1507 | if (sc->xl_flags & XL_FLAG_INVERT_LED_PWR || |
---|
1508 | sc->xl_flags & XL_FLAG_INVERT_MII_PWR) |
---|
1509 | { |
---|
1510 | XL_SEL_WIN(2); |
---|
1511 | CSR_WRITE_2(sc, XL_W2_RESET_OPTIONS, CSR_READ_2(sc, |
---|
1512 | XL_W2_RESET_OPTIONS) |
---|
1513 | | ((sc->xl_flags & XL_FLAG_INVERT_LED_PWR)?XL_RESETOPT_INVERT_LED:0) |
---|
1514 | | ((sc->xl_flags & XL_FLAG_INVERT_MII_PWR)?XL_RESETOPT_INVERT_MII:0) |
---|
1515 | ); |
---|
1516 | } |
---|
1517 | |
---|
1518 | /* Wait a little while for the chip to get its brains in order. */ |
---|
1519 | DELAY(100000); |
---|
1520 | return; |
---|
1521 | } |
---|
1522 | |
---|
1523 | |
---|
1524 | |
---|
1525 | |
---|
1526 | static void |
---|
1527 | xl_stop(struct elnk_softc *sc) |
---|
1528 | { |
---|
1529 | struct ifnet *ifp; |
---|
1530 | |
---|
1531 | ifp = &sc->arpcom.ac_if; |
---|
1532 | ifp->if_timer = 0; |
---|
1533 | |
---|
1534 | rtems_timer_cancel( sc->stat_timer_id ); |
---|
1535 | |
---|
1536 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_DISABLE); |
---|
1537 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STATS_DISABLE); |
---|
1538 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ENB); |
---|
1539 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_DISCARD); |
---|
1540 | xl_wait(sc); |
---|
1541 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_DISABLE); |
---|
1542 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP); |
---|
1543 | DELAY(800); |
---|
1544 | |
---|
1545 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ACK|XL_STAT_INTLATCH); |
---|
1546 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STAT_ENB|0); |
---|
1547 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ENB|0); |
---|
1548 | |
---|
1549 | return; |
---|
1550 | } |
---|
1551 | |
---|
1552 | |
---|
1553 | |
---|
1554 | |
---|
1555 | |
---|
1556 | |
---|
1557 | |
---|
1558 | |
---|
1559 | |
---|
1560 | |
---|
1561 | |
---|
1562 | |
---|
1563 | |
---|
1564 | |
---|
1565 | |
---|
1566 | static void |
---|
1567 | xl_setcfg(struct elnk_softc *sc) |
---|
1568 | { |
---|
1569 | u_int32_t icfg; |
---|
1570 | |
---|
1571 | XL_SEL_WIN(3); |
---|
1572 | icfg = CSR_READ_4(sc, XL_W3_INTERNAL_CFG); |
---|
1573 | |
---|
1574 | icfg &= ~XL_ICFG_CONNECTOR_MASK; |
---|
1575 | |
---|
1576 | if (sc->xl_media & XL_MEDIAOPT_MII || sc->xl_media & XL_MEDIAOPT_BT4) |
---|
1577 | icfg |= (XL_XCVR_MII << XL_ICFG_CONNECTOR_BITS); |
---|
1578 | |
---|
1579 | if (sc->xl_media & XL_MEDIAOPT_BTX) |
---|
1580 | icfg |= (XL_XCVR_AUTO << XL_ICFG_CONNECTOR_BITS); |
---|
1581 | |
---|
1582 | CSR_WRITE_4(sc, XL_W3_INTERNAL_CFG, icfg); |
---|
1583 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP); |
---|
1584 | |
---|
1585 | XL_SEL_WIN(7); |
---|
1586 | return; |
---|
1587 | } |
---|
1588 | |
---|
1589 | |
---|
1590 | |
---|
1591 | static void |
---|
1592 | xl_setmode( |
---|
1593 | struct elnk_softc *sc, |
---|
1594 | int media) |
---|
1595 | { |
---|
1596 | u_int32_t icfg; |
---|
1597 | u_int16_t mediastat; |
---|
1598 | |
---|
1599 | printk("etherlink : unit elnk%d selecting ", sc->xl_unit); |
---|
1600 | |
---|
1601 | XL_SEL_WIN(4); |
---|
1602 | mediastat = CSR_READ_2(sc, XL_W4_MEDIA_STATUS); |
---|
1603 | XL_SEL_WIN(3); |
---|
1604 | icfg = CSR_READ_4(sc, XL_W3_INTERNAL_CFG); |
---|
1605 | |
---|
1606 | if (sc->xl_media & XL_MEDIAOPT_BT) { |
---|
1607 | if (IFM_SUBTYPE(media) == IFM_10_T) { |
---|
1608 | printk("10baseT transceiver, "); |
---|
1609 | sc->xl_xcvr = XL_XCVR_10BT; |
---|
1610 | icfg &= ~XL_ICFG_CONNECTOR_MASK; |
---|
1611 | icfg |= (XL_XCVR_10BT << XL_ICFG_CONNECTOR_BITS); |
---|
1612 | mediastat |= XL_MEDIASTAT_LINKBEAT| |
---|
1613 | XL_MEDIASTAT_JABGUARD; |
---|
1614 | mediastat &= ~XL_MEDIASTAT_SQEENB; |
---|
1615 | } |
---|
1616 | } |
---|
1617 | |
---|
1618 | if (sc->xl_media & XL_MEDIAOPT_BFX) { |
---|
1619 | if (IFM_SUBTYPE(media) == IFM_100_FX) { |
---|
1620 | printk("100baseFX port, "); |
---|
1621 | sc->xl_xcvr = XL_XCVR_100BFX; |
---|
1622 | icfg &= ~XL_ICFG_CONNECTOR_MASK; |
---|
1623 | icfg |= (XL_XCVR_100BFX << XL_ICFG_CONNECTOR_BITS); |
---|
1624 | mediastat |= XL_MEDIASTAT_LINKBEAT; |
---|
1625 | mediastat &= ~XL_MEDIASTAT_SQEENB; |
---|
1626 | } |
---|
1627 | } |
---|
1628 | |
---|
1629 | if (sc->xl_media & (XL_MEDIAOPT_AUI|XL_MEDIAOPT_10FL)) { |
---|
1630 | if (IFM_SUBTYPE(media) == IFM_10_5) { |
---|
1631 | printk("AUI port, "); |
---|
1632 | sc->xl_xcvr = XL_XCVR_AUI; |
---|
1633 | icfg &= ~XL_ICFG_CONNECTOR_MASK; |
---|
1634 | icfg |= (XL_XCVR_AUI << XL_ICFG_CONNECTOR_BITS); |
---|
1635 | mediastat &= ~(XL_MEDIASTAT_LINKBEAT| |
---|
1636 | XL_MEDIASTAT_JABGUARD); |
---|
1637 | mediastat |= ~XL_MEDIASTAT_SQEENB; |
---|
1638 | } |
---|
1639 | if (IFM_SUBTYPE(media) == IFM_10_FL) { |
---|
1640 | printk("10baseFL transceiver, "); |
---|
1641 | sc->xl_xcvr = XL_XCVR_AUI; |
---|
1642 | icfg &= ~XL_ICFG_CONNECTOR_MASK; |
---|
1643 | icfg |= (XL_XCVR_AUI << XL_ICFG_CONNECTOR_BITS); |
---|
1644 | mediastat &= ~(XL_MEDIASTAT_LINKBEAT| |
---|
1645 | XL_MEDIASTAT_JABGUARD); |
---|
1646 | mediastat |= ~XL_MEDIASTAT_SQEENB; |
---|
1647 | } |
---|
1648 | } |
---|
1649 | |
---|
1650 | if (sc->xl_media & XL_MEDIAOPT_BNC) { |
---|
1651 | if (IFM_SUBTYPE(media) == IFM_10_2) { |
---|
1652 | printk("BNC port, "); |
---|
1653 | sc->xl_xcvr = XL_XCVR_COAX; |
---|
1654 | icfg &= ~XL_ICFG_CONNECTOR_MASK; |
---|
1655 | icfg |= (XL_XCVR_COAX << XL_ICFG_CONNECTOR_BITS); |
---|
1656 | mediastat &= ~(XL_MEDIASTAT_LINKBEAT| |
---|
1657 | XL_MEDIASTAT_JABGUARD| |
---|
1658 | XL_MEDIASTAT_SQEENB); |
---|
1659 | } |
---|
1660 | } |
---|
1661 | |
---|
1662 | if ((media & IFM_GMASK) == IFM_FDX || |
---|
1663 | IFM_SUBTYPE(media) == IFM_100_FX) { |
---|
1664 | printk("full duplex\n"); |
---|
1665 | XL_SEL_WIN(3); |
---|
1666 | CSR_WRITE_1(sc, XL_W3_MAC_CTRL, XL_MACCTRL_DUPLEX); |
---|
1667 | } else { |
---|
1668 | printk("half duplex\n"); |
---|
1669 | XL_SEL_WIN(3); |
---|
1670 | CSR_WRITE_1(sc, XL_W3_MAC_CTRL, |
---|
1671 | (CSR_READ_1(sc, XL_W3_MAC_CTRL) & ~XL_MACCTRL_DUPLEX)); |
---|
1672 | } |
---|
1673 | |
---|
1674 | if (IFM_SUBTYPE(media) == IFM_10_2) |
---|
1675 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_START); |
---|
1676 | else |
---|
1677 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP); |
---|
1678 | |
---|
1679 | CSR_WRITE_4(sc, XL_W3_INTERNAL_CFG, icfg); |
---|
1680 | XL_SEL_WIN(4); |
---|
1681 | CSR_WRITE_2(sc, XL_W4_MEDIA_STATUS, mediastat); |
---|
1682 | DELAY(800); |
---|
1683 | XL_SEL_WIN(7); |
---|
1684 | |
---|
1685 | return; |
---|
1686 | } |
---|
1687 | |
---|
1688 | |
---|
1689 | |
---|
1690 | |
---|
1691 | |
---|
1692 | |
---|
1693 | |
---|
1694 | static void |
---|
1695 | xl_choose_xcvr( |
---|
1696 | struct elnk_softc *sc, |
---|
1697 | int verbose) |
---|
1698 | { |
---|
1699 | u_int16_t devid; |
---|
1700 | |
---|
1701 | /* |
---|
1702 | * Read the device ID from the EEPROM. |
---|
1703 | * This is what's loaded into the PCI device ID register, so it has |
---|
1704 | * to be correct otherwise we wouldn't have gotten this far. |
---|
1705 | */ |
---|
1706 | xl_read_eeprom(sc, (caddr_t)&devid, XL_EE_PRODID, 1, 0); |
---|
1707 | |
---|
1708 | switch(devid) { |
---|
1709 | case TC_DEVICEID_BOOMERANG_10BT: /* 3c900-TPO */ |
---|
1710 | case TC_DEVICEID_KRAKATOA_10BT: /* 3c900B-TPO */ |
---|
1711 | sc->xl_media = XL_MEDIAOPT_BT; |
---|
1712 | sc->xl_xcvr = XL_XCVR_10BT; |
---|
1713 | if (verbose) |
---|
1714 | printk("etherlink : unit elnk%d guessing 10BaseT " |
---|
1715 | "transceiver\n", sc->xl_unit); |
---|
1716 | break; |
---|
1717 | case TC_DEVICEID_BOOMERANG_10BT_COMBO: /* 3c900-COMBO */ |
---|
1718 | case TC_DEVICEID_KRAKATOA_10BT_COMBO: /* 3c900B-COMBO */ |
---|
1719 | sc->xl_media = XL_MEDIAOPT_BT|XL_MEDIAOPT_BNC|XL_MEDIAOPT_AUI; |
---|
1720 | sc->xl_xcvr = XL_XCVR_10BT; |
---|
1721 | if (verbose) |
---|
1722 | printk("etherlink : unit elnk%d guessing COMBO " |
---|
1723 | "(AUI/BNC/TP)\n", sc->xl_unit); |
---|
1724 | break; |
---|
1725 | case TC_DEVICEID_KRAKATOA_10BT_TPC: /* 3c900B-TPC */ |
---|
1726 | sc->xl_media = XL_MEDIAOPT_BT|XL_MEDIAOPT_BNC; |
---|
1727 | sc->xl_xcvr = XL_XCVR_10BT; |
---|
1728 | if (verbose) |
---|
1729 | printk("etherlink : unit elnk%d guessing TPC (BNC/TP)\n", sc->xl_unit); |
---|
1730 | break; |
---|
1731 | case TC_DEVICEID_CYCLONE_10FL: /* 3c900B-FL */ |
---|
1732 | sc->xl_media = XL_MEDIAOPT_10FL; |
---|
1733 | sc->xl_xcvr = XL_XCVR_AUI; |
---|
1734 | if (verbose) |
---|
1735 | printk("etherlink : unit elnk%d guessing 10baseFL\n", sc->xl_unit); |
---|
1736 | break; |
---|
1737 | case TC_DEVICEID_BOOMERANG_10_100BT: /* 3c905-TX */ |
---|
1738 | case TC_DEVICEID_HURRICANE_555: /* 3c555 */ |
---|
1739 | case TC_DEVICEID_HURRICANE_556: /* 3c556 */ |
---|
1740 | case TC_DEVICEID_HURRICANE_556B: /* 3c556B */ |
---|
1741 | case TC_DEVICEID_HURRICANE_575A: /* 3c575TX */ |
---|
1742 | case TC_DEVICEID_HURRICANE_575B: /* 3c575B */ |
---|
1743 | case TC_DEVICEID_HURRICANE_575C: /* 3c575C */ |
---|
1744 | case TC_DEVICEID_HURRICANE_656: /* 3c656 */ |
---|
1745 | case TC_DEVICEID_HURRICANE_656B: /* 3c656B */ |
---|
1746 | case TC_DEVICEID_TORNADO_656C: /* 3c656C */ |
---|
1747 | case TC_DEVICEID_TORNADO_10_100BT_920B: /* 3c920B-EMB */ |
---|
1748 | sc->xl_media = XL_MEDIAOPT_MII; |
---|
1749 | sc->xl_xcvr = XL_XCVR_MII; |
---|
1750 | if (verbose) |
---|
1751 | printk("etherlink : unit elnk%d guessing MII\n", sc->xl_unit); |
---|
1752 | break; |
---|
1753 | case TC_DEVICEID_BOOMERANG_100BT4: /* 3c905-T4 */ |
---|
1754 | case TC_DEVICEID_CYCLONE_10_100BT4: /* 3c905B-T4 */ |
---|
1755 | sc->xl_media = XL_MEDIAOPT_BT4; |
---|
1756 | sc->xl_xcvr = XL_XCVR_MII; |
---|
1757 | if (verbose) |
---|
1758 | printk("etherlink : unit elnk%d guessing 100BaseT4/MII\n", sc->xl_unit); |
---|
1759 | break; |
---|
1760 | case TC_DEVICEID_HURRICANE_10_100BT: /* 3c905B-TX */ |
---|
1761 | case TC_DEVICEID_HURRICANE_10_100BT_SERV:/*3c980-TX */ |
---|
1762 | case TC_DEVICEID_TORNADO_10_100BT_SERV: /* 3c980C-TX */ |
---|
1763 | case TC_DEVICEID_HURRICANE_SOHO100TX: /* 3cSOHO100-TX */ |
---|
1764 | case TC_DEVICEID_TORNADO_10_100BT: /* 3c905C-TX */ |
---|
1765 | case TC_DEVICEID_TORNADO_HOMECONNECT: /* 3c450-TX */ |
---|
1766 | sc->xl_media = XL_MEDIAOPT_BTX; |
---|
1767 | sc->xl_xcvr = XL_XCVR_AUTO; |
---|
1768 | if (verbose) |
---|
1769 | printk("etherlink : unit elnk%d guessing 10/100 internal\n", sc->xl_unit); |
---|
1770 | break; |
---|
1771 | case TC_DEVICEID_CYCLONE_10_100_COMBO: /* 3c905B-COMBO */ |
---|
1772 | sc->xl_media = XL_MEDIAOPT_BTX|XL_MEDIAOPT_BNC|XL_MEDIAOPT_AUI; |
---|
1773 | sc->xl_xcvr = XL_XCVR_AUTO; |
---|
1774 | if (verbose) |
---|
1775 | printk("etherlink : unit elnk%d guessing 10/100 " |
---|
1776 | "plus BNC/AUI\n", sc->xl_unit); |
---|
1777 | break; |
---|
1778 | default: |
---|
1779 | printk("etherlink : unit elnk%d unknown device ID: %x -- " |
---|
1780 | "defaulting to 10baseT\n", sc->xl_unit, devid); |
---|
1781 | sc->xl_media = XL_MEDIAOPT_BT; |
---|
1782 | break; |
---|
1783 | } |
---|
1784 | |
---|
1785 | return; |
---|
1786 | } |
---|
1787 | |
---|
1788 | |
---|
1789 | |
---|
1790 | |
---|
1791 | |
---|
1792 | |
---|
1793 | |
---|
1794 | /* |
---|
1795 | * This routine is a kludge to work around possible hardware faults |
---|
1796 | * or manufacturing defects that can cause the media options register |
---|
1797 | * (or reset options register, as it's called for the first generation |
---|
1798 | * 3c90x adapters) to return an incorrect result. I have encountered |
---|
1799 | * one Dell Latitude laptop docking station with an integrated 3c905-TX |
---|
1800 | * which doesn't have any of the 'mediaopt' bits set. This screws up |
---|
1801 | * the attach routine pretty badly because it doesn't know what media |
---|
1802 | * to look for. If we find ourselves in this predicament, this routine |
---|
1803 | * will try to guess the media options values and warn the user of a |
---|
1804 | * possible manufacturing defect with his adapter/system/whatever. |
---|
1805 | */ |
---|
1806 | static void |
---|
1807 | xl_mediacheck(struct elnk_softc *sc) |
---|
1808 | { |
---|
1809 | |
---|
1810 | xl_choose_xcvr(sc, 1); |
---|
1811 | |
---|
1812 | /* |
---|
1813 | * If some of the media options bits are set, assume they are |
---|
1814 | * correct. If not, try to figure it out down below. |
---|
1815 | * XXX I should check for 10baseFL, but I don't have an adapter |
---|
1816 | * to test with. |
---|
1817 | */ |
---|
1818 | if (sc->xl_media & (XL_MEDIAOPT_MASK & ~XL_MEDIAOPT_VCO)) { |
---|
1819 | /* |
---|
1820 | * Check the XCVR value. If it's not in the normal range |
---|
1821 | * of values, we need to fake it up here. |
---|
1822 | */ |
---|
1823 | if (sc->xl_xcvr <= XL_XCVR_AUTO) |
---|
1824 | return; |
---|
1825 | else { |
---|
1826 | printk("etherlink : unit elnk%d bogus xcvr value " |
---|
1827 | "in EEPROM (%x)\n", sc->xl_unit, sc->xl_xcvr); |
---|
1828 | printk("etherlink : unit elnk%d choosing new default based " |
---|
1829 | "on card type\n", sc->xl_unit); |
---|
1830 | } |
---|
1831 | } else { |
---|
1832 | if (sc->xl_type == XL_TYPE_905B && |
---|
1833 | sc->xl_media & XL_MEDIAOPT_10FL) |
---|
1834 | return; |
---|
1835 | printk("etherlink : unit elnk%d WARNING: no media options bits set in " |
---|
1836 | "the media options register!!\n", sc->xl_unit); |
---|
1837 | printk("etherlink : unit elnk%d this could be a manufacturing defect in " |
---|
1838 | "your adapter or system\n", sc->xl_unit); |
---|
1839 | printk("etherlink : unit elnk%d attempting to guess media type; you " |
---|
1840 | "should probably consult your vendor\n", sc->xl_unit); |
---|
1841 | } |
---|
1842 | |
---|
1843 | return; |
---|
1844 | } |
---|
1845 | |
---|
1846 | |
---|
1847 | |
---|
1848 | |
---|
1849 | |
---|
1850 | |
---|
1851 | |
---|
1852 | |
---|
1853 | |
---|
1854 | |
---|
1855 | |
---|
1856 | |
---|
1857 | |
---|
1858 | |
---|
1859 | |
---|
1860 | |
---|
1861 | |
---|
1862 | |
---|
1863 | |
---|
1864 | |
---|
1865 | |
---|
1866 | |
---|
1867 | |
---|
1868 | |
---|
1869 | |
---|
1870 | static void no_op(const rtems_irq_connect_data* irq) |
---|
1871 | { |
---|
1872 | return; |
---|
1873 | } |
---|
1874 | |
---|
1875 | |
---|
1876 | |
---|
1877 | |
---|
1878 | static int elnkIsOn(const rtems_irq_connect_data* irq) |
---|
1879 | { |
---|
1880 | return BSP_irq_enabled_at_i8259s (irq->name); |
---|
1881 | } |
---|
1882 | |
---|
1883 | |
---|
1884 | |
---|
1885 | |
---|
1886 | |
---|
1887 | |
---|
1888 | static void |
---|
1889 | elnk_start_txchain( struct elnk_softc *sc, struct TXMD *chainhead ) |
---|
1890 | { |
---|
1891 | xl_wait(sc); |
---|
1892 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_DOWN_STALL); |
---|
1893 | |
---|
1894 | /* save the address of the TX list */ |
---|
1895 | sc->last_txchain_head = chainhead; |
---|
1896 | sc->tx_idle = 0; |
---|
1897 | |
---|
1898 | xl_wait(sc); |
---|
1899 | |
---|
1900 | CSR_WRITE_4(sc, XL_DOWNLIST_PTR, phys_to_bus( sc->last_txchain_head )); |
---|
1901 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_DOWN_UNSTALL); |
---|
1902 | } |
---|
1903 | |
---|
1904 | |
---|
1905 | |
---|
1906 | |
---|
1907 | |
---|
1908 | /* |
---|
1909 | * ELNK interrupt handler |
---|
1910 | */ |
---|
1911 | static rtems_isr |
---|
1912 | elnk_interrupt_handler ( struct elnk_softc *sc ) |
---|
1913 | { |
---|
1914 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
1915 | u_int16_t status; |
---|
1916 | |
---|
1917 | while( ((status = CSR_READ_2(sc, XL_STATUS)) & XL_INTRS) && status != 0xFFFF) |
---|
1918 | { |
---|
1919 | sc->xl_stats.device_interrupts++; |
---|
1920 | |
---|
1921 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ACK | (status & XL_INTRS)); |
---|
1922 | |
---|
1923 | #if 0 |
---|
1924 | printk("etherlink : unit elnk%d intstatus %04x\n", sc->xl_unit, status ); |
---|
1925 | #endif |
---|
1926 | |
---|
1927 | if (status & XL_STAT_UP_COMPLETE) |
---|
1928 | { |
---|
1929 | #if 0 |
---|
1930 | printk("etherlink : unit elnk%d rx\n", sc->xl_unit ); |
---|
1931 | #endif |
---|
1932 | /* received packets */ |
---|
1933 | rtems_event_send(rxDaemonTid, sc->ioevent); |
---|
1934 | } |
---|
1935 | |
---|
1936 | if( (status & XL_STAT_DOWN_COMPLETE) || (status & XL_STAT_TX_COMPLETE) ) |
---|
1937 | { |
---|
1938 | /* all packets uploaded to the device */ |
---|
1939 | struct TXMD *chaintailmd = NULL; |
---|
1940 | |
---|
1941 | |
---|
1942 | if( status & XL_STAT_TX_COMPLETE ) |
---|
1943 | { |
---|
1944 | /* if we got a tx complete error, count it, then reset the |
---|
1945 | transmitter. Consider the entire chain lost.. */ |
---|
1946 | |
---|
1947 | ifp->if_oerrors++; |
---|
1948 | sc->xl_stats.txcomplete_ints++; |
---|
1949 | |
---|
1950 | printk("etherlink : unit elnk%d transmit error\n", sc->xl_unit ); |
---|
1951 | |
---|
1952 | /* reset, re-enable fifo */ |
---|
1953 | |
---|
1954 | xl_wait(sc); |
---|
1955 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_DISABLE); |
---|
1956 | |
---|
1957 | xl_wait(sc); |
---|
1958 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET | 1 ); |
---|
1959 | |
---|
1960 | xl_wait(sc); |
---|
1961 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_ENABLE); |
---|
1962 | |
---|
1963 | xl_wait(sc); |
---|
1964 | } |
---|
1965 | |
---|
1966 | |
---|
1967 | /* send the chain head to the tx task which will recover the |
---|
1968 | whole chain */ |
---|
1969 | rtems_message_queue_send( chainRecoveryQueue, &sc->last_txchain_head, sizeof(struct TXMD *)); |
---|
1970 | |
---|
1971 | |
---|
1972 | /* set up the next chain */ |
---|
1973 | if( sc->last_txchain_head->chainptr ) |
---|
1974 | { |
---|
1975 | /* check the head of the chain of packets we just finished, |
---|
1976 | * if != 0, either this is a chain of 2 or more packets or |
---|
1977 | * its a single packet chain and another chain is ready to |
---|
1978 | * send. |
---|
1979 | */ |
---|
1980 | if( (int)sc->last_txchain_head->chainptr == -1 ) |
---|
1981 | { |
---|
1982 | /* |
---|
1983 | ** single packet was sent so no indirection to the last |
---|
1984 | ** entry in the chain. since chainptr is != 0, then |
---|
1985 | ** another chain is ready starting from the packet AFTER |
---|
1986 | ** the chain we just finished. - in this case the last |
---|
1987 | ** chain's head == its tail |
---|
1988 | */ |
---|
1989 | chaintailmd = sc->last_txchain_head; |
---|
1990 | } |
---|
1991 | else |
---|
1992 | { |
---|
1993 | /* |
---|
1994 | ** otherwise, this is a pointer to the last packet in the |
---|
1995 | ** chain of 2 or more packets. If the chain's last |
---|
1996 | ** packet's chainptr is != 0, then another chain is ready |
---|
1997 | ** to send. |
---|
1998 | */ |
---|
1999 | chaintailmd = sc->last_txchain_head->chainptr; |
---|
2000 | if( !chaintailmd->chainptr ) chaintailmd = NULL; |
---|
2001 | } |
---|
2002 | } |
---|
2003 | |
---|
2004 | if( chaintailmd ) |
---|
2005 | { |
---|
2006 | /* the next MD is the start of another chain */ |
---|
2007 | elnk_start_txchain(sc, chaintailmd->next_md ); |
---|
2008 | } |
---|
2009 | else |
---|
2010 | { |
---|
2011 | /* otherwise nothing to send, so go idle */ |
---|
2012 | sc->tx_idle = -1; |
---|
2013 | |
---|
2014 | /* wake up the tx daemon once so we're sure this last chain |
---|
2015 | will be freed */ |
---|
2016 | rtems_event_send( txDaemonTid, sc->ioevent ); |
---|
2017 | #if 0 |
---|
2018 | printk("unit elnk%d tx done\n", sc->xl_unit ); |
---|
2019 | #endif |
---|
2020 | } |
---|
2021 | } |
---|
2022 | |
---|
2023 | |
---|
2024 | if (status & XL_STAT_ADFAIL) |
---|
2025 | { |
---|
2026 | printk("etherlink : unit elnk%d Catastrophic bus failure\n", sc->xl_unit ); |
---|
2027 | } |
---|
2028 | if (status & XL_STAT_STATSOFLOW) |
---|
2029 | { |
---|
2030 | sc->xl_stats_no_timeout = 1; |
---|
2031 | xl_stats_update(sc->stat_timer_id,sc); |
---|
2032 | sc->xl_stats_no_timeout = 0; |
---|
2033 | } |
---|
2034 | } |
---|
2035 | |
---|
2036 | |
---|
2037 | #if 0 |
---|
2038 | { |
---|
2039 | uint16_t intstatus, intenable, indenable; |
---|
2040 | |
---|
2041 | intstatus = CSR_READ_2(sc, XL_STATUS ); |
---|
2042 | |
---|
2043 | XL_SEL_WIN(5); |
---|
2044 | intenable = CSR_READ_2(sc, XL_W5_INTR_ENB ); |
---|
2045 | indenable = CSR_READ_2(sc, XL_W5_STAT_ENB ); |
---|
2046 | XL_SEL_WIN(7); |
---|
2047 | printk("etherlink : unit elnk%d istat %04x, ien %04x, ind %04x\n", sc->xl_unit, intstatus, intenable, indenable ); |
---|
2048 | } |
---|
2049 | #endif |
---|
2050 | } |
---|
2051 | |
---|
2052 | |
---|
2053 | |
---|
2054 | |
---|
2055 | |
---|
2056 | static rtems_isr |
---|
2057 | elnk_interrupt_handler_entry(void) |
---|
2058 | { |
---|
2059 | int i; |
---|
2060 | |
---|
2061 | /* |
---|
2062 | ** Check all the initialized units for interrupt service |
---|
2063 | */ |
---|
2064 | |
---|
2065 | for(i=0; i< NUM_UNITS; i++ ) |
---|
2066 | { |
---|
2067 | if( elnk_softc[i].ioaddr ) |
---|
2068 | elnk_interrupt_handler( &elnk_softc[i] ); |
---|
2069 | } |
---|
2070 | } |
---|
2071 | |
---|
2072 | |
---|
2073 | |
---|
2074 | |
---|
2075 | |
---|
2076 | |
---|
2077 | |
---|
2078 | |
---|
2079 | |
---|
2080 | |
---|
2081 | |
---|
2082 | /* |
---|
2083 | * Initialize the ethernet hardware |
---|
2084 | */ |
---|
2085 | static void |
---|
2086 | elnk_initialize_hardware (struct elnk_softc *sc) |
---|
2087 | { |
---|
2088 | unsigned char *cp; |
---|
2089 | int i, j, rxsize, txsize, ringsize; |
---|
2090 | |
---|
2091 | /* |
---|
2092 | * Init RX ring |
---|
2093 | */ |
---|
2094 | cp = (unsigned char *)malloc( (ringsize = ((rxsize = (sc->numRxbuffers * sizeof(struct RXMD))) + |
---|
2095 | (txsize = (sc->numTxbuffers * sizeof(struct TXMD)))) ) + |
---|
2096 | + CPU_CACHE_ALIGNMENT_FOR_BUFFER); |
---|
2097 | sc->bufferBase = cp; |
---|
2098 | cp += (CPU_CACHE_ALIGNMENT_FOR_BUFFER - (int)cp) & (CPU_CACHE_ALIGNMENT_FOR_BUFFER - 1); |
---|
2099 | #if defined(__i386__) |
---|
2100 | #ifdef PCI_BRIDGE_DOES_NOT_ENSURE_CACHE_COHERENCY_FOR_DMA |
---|
2101 | if (_CPU_is_paging_enabled()) |
---|
2102 | _CPU_change_memory_mapping_attribute |
---|
2103 | (NULL, cp, ringsize, PTE_CACHE_DISABLE | PTE_WRITABLE); |
---|
2104 | #endif |
---|
2105 | #endif |
---|
2106 | sc->ringBase = cp; |
---|
2107 | |
---|
2108 | /* build tx and rx rings */ |
---|
2109 | |
---|
2110 | sc->rx_ring = (struct RXMD *)sc->ringBase; |
---|
2111 | sc->tx_ring = (struct TXMD *)&sc->ringBase[ rxsize ]; |
---|
2112 | |
---|
2113 | { |
---|
2114 | struct mbuf *m; |
---|
2115 | struct RXMD *nxtmd; |
---|
2116 | /* |
---|
2117 | * The rx ring is easy as its just an array of RXMD structs. New |
---|
2118 | * mbuf entries are allocated from the stack whenever the rx |
---|
2119 | * daemon forwards an incoming packet into it. Here, we |
---|
2120 | * pre-allocate the rx mbufs for the rx ring entries. |
---|
2121 | */ |
---|
2122 | for(i=0 ; i<sc->numRxbuffers; i++) |
---|
2123 | { |
---|
2124 | if( ((uint32_t)&sc->rx_ring[i] & 0x7) ) |
---|
2125 | { |
---|
2126 | rtems_panic ("etherlink : unit elnk%d rx ring entry %d not aligned to 8 bytes\n", sc->xl_unit, i ); |
---|
2127 | } |
---|
2128 | |
---|
2129 | /* allocate an mbuf for each receive descriptor */ |
---|
2130 | MGETHDR (m, M_WAIT, MT_DATA); |
---|
2131 | MCLGET (m, M_WAIT); |
---|
2132 | m->m_pkthdr.rcvif = &sc->arpcom.ac_if; |
---|
2133 | |
---|
2134 | if( i == sc->numRxbuffers-1 ) |
---|
2135 | nxtmd = &sc->rx_ring[0]; |
---|
2136 | else |
---|
2137 | nxtmd = &sc->rx_ring[i+1]; |
---|
2138 | |
---|
2139 | sc->rx_ring[i].next_md = nxtmd; |
---|
2140 | sc->rx_ring[i].mbuf = m; |
---|
2141 | |
---|
2142 | st_le32( &sc->rx_ring[i].status, 0); |
---|
2143 | st_le32( &sc->rx_ring[i].next, (uint32_t)phys_to_bus( nxtmd )); |
---|
2144 | st_le32( &sc->rx_ring[i].addr, (uint32_t)phys_to_bus( mtod(m, void *) )); |
---|
2145 | st_le32( &sc->rx_ring[i].length, XL_LAST_FRAG | XL_PACKET_SIZE ); |
---|
2146 | } |
---|
2147 | sc->curr_rx_md = &sc->rx_ring[0]; |
---|
2148 | } |
---|
2149 | |
---|
2150 | |
---|
2151 | { |
---|
2152 | struct TXMD *thismd, *nxtmd; |
---|
2153 | /* |
---|
2154 | * The tx ring is more complex. Each MD has an array of fragment |
---|
2155 | * descriptors that are loaded from each packet as they arrive |
---|
2156 | * from the stack. Each packet gets one ring entry, this allows |
---|
2157 | * the lanboard to efficiently assemble the piecemeal packets into |
---|
2158 | * a contiguous unit at transmit time, rather than spending |
---|
2159 | * cputime concatenating them first. Although the next_md fields |
---|
2160 | * form a ring, the DPD next is filled only when packets are added |
---|
2161 | * to the tx chain, thus last entry of a series of packets has the |
---|
2162 | * requisite dpd->next value == 0 to terminate the dma. mbuf |
---|
2163 | * holds the packet info so it can be freed once the packet has |
---|
2164 | * been sent. chainptr is used to link the head & tail of a chain |
---|
2165 | * of 2 or more packets. A chain is formed when the tx daemon |
---|
2166 | * gets 2 or more packets from the stack's queue in a service |
---|
2167 | * period, so higher outgoing loads are handled as efficiently as |
---|
2168 | * possible. |
---|
2169 | */ |
---|
2170 | |
---|
2171 | for(i=0 ; i<sc->numTxbuffers; i++) |
---|
2172 | { |
---|
2173 | if( ((uint32_t)&sc->tx_ring[i] & 0x7) ) |
---|
2174 | { |
---|
2175 | rtems_panic ("etherlink : unit elnk%d tx ring entry %d not aligned to 8 bytes\n", sc->xl_unit, i ); |
---|
2176 | } |
---|
2177 | |
---|
2178 | if( i == sc->numTxbuffers-1 ) |
---|
2179 | nxtmd = &sc->tx_ring[0]; |
---|
2180 | else |
---|
2181 | nxtmd = &sc->tx_ring[i+1]; |
---|
2182 | |
---|
2183 | thismd = &sc->tx_ring[i]; |
---|
2184 | |
---|
2185 | thismd->next_md = nxtmd; |
---|
2186 | thismd->chainptr = NULL; |
---|
2187 | thismd->mbuf = NULL; |
---|
2188 | |
---|
2189 | st_le32( &thismd->status, XL_TXSTAT_DL_COMPLETE ); |
---|
2190 | st_le32( &thismd->next, 0); |
---|
2191 | |
---|
2192 | for(j=0; j< NUM_FRAGS; j++) |
---|
2193 | { |
---|
2194 | st_le32( &thismd->txfrags[j].addr, 0 ); |
---|
2195 | st_le32( &thismd->txfrags[j].length, 0 ); |
---|
2196 | } |
---|
2197 | } |
---|
2198 | sc->last_tx_md = &sc->tx_ring[0]; |
---|
2199 | } |
---|
2200 | |
---|
2201 | |
---|
2202 | |
---|
2203 | |
---|
2204 | #ifdef ELNK_DEBUG |
---|
2205 | printk("etherlink : %02x:%02x:%02x:%02x:%02x:%02x name 'elnk%d', io %x, int %d\n", |
---|
2206 | sc->arpcom.ac_enaddr[0], sc->arpcom.ac_enaddr[1], |
---|
2207 | sc->arpcom.ac_enaddr[2], sc->arpcom.ac_enaddr[3], |
---|
2208 | sc->arpcom.ac_enaddr[4], sc->arpcom.ac_enaddr[5], |
---|
2209 | sc->xl_unit, |
---|
2210 | (unsigned)sc->ioaddr, sc->irqInfo.name ); |
---|
2211 | #endif |
---|
2212 | |
---|
2213 | |
---|
2214 | sc->irqInfo.hdl = (rtems_irq_hdl)elnk_interrupt_handler_entry; |
---|
2215 | sc->irqInfo.on = no_op; |
---|
2216 | sc->irqInfo.off = no_op; |
---|
2217 | sc->irqInfo.isOn = elnkIsOn; |
---|
2218 | |
---|
2219 | if( sc->irqInfo.name != 255 ) |
---|
2220 | { |
---|
2221 | int st; |
---|
2222 | |
---|
2223 | #ifdef BSP_SHARED_HANDLER_SUPPORT |
---|
2224 | st = BSP_install_rtems_shared_irq_handler( &sc->irqInfo ); |
---|
2225 | #else |
---|
2226 | st = BSP_install_rtems_irq_handler( &sc->irqInfo ); |
---|
2227 | #endif |
---|
2228 | if (!st) |
---|
2229 | rtems_panic ("etherlink : unit elnk%d Interrupt name %d already in use\n", sc->xl_unit, sc->irqInfo.name ); |
---|
2230 | } |
---|
2231 | else |
---|
2232 | { |
---|
2233 | printk("etherlink : unit elnk%d Interrupt not specified by device\n", sc->xl_unit ); |
---|
2234 | } |
---|
2235 | } |
---|
2236 | |
---|
2237 | |
---|
2238 | |
---|
2239 | |
---|
2240 | |
---|
2241 | |
---|
2242 | |
---|
2243 | |
---|
2244 | |
---|
2245 | |
---|
2246 | |
---|
2247 | static void |
---|
2248 | elnk_rxDaemon (void *arg) |
---|
2249 | { |
---|
2250 | struct elnk_softc *sc; |
---|
2251 | struct ether_header *eh; |
---|
2252 | struct mbuf *m; |
---|
2253 | struct RXMD *rmd; |
---|
2254 | unsigned int i,len, rxstat; |
---|
2255 | rtems_event_set events; |
---|
2256 | |
---|
2257 | for (;;) |
---|
2258 | { |
---|
2259 | |
---|
2260 | rtems_bsdnet_event_receive( RTEMS_ALL_EVENTS, |
---|
2261 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
---|
2262 | RTEMS_NO_TIMEOUT, |
---|
2263 | &events); |
---|
2264 | |
---|
2265 | for(;;) |
---|
2266 | { |
---|
2267 | for(i=0; i< NUM_UNITS; i++ ) |
---|
2268 | { |
---|
2269 | sc = &elnk_softc[i]; |
---|
2270 | if( sc->ioaddr ) |
---|
2271 | { |
---|
2272 | if( events & sc->ioevent ) |
---|
2273 | { |
---|
2274 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
2275 | |
---|
2276 | rmd = sc->curr_rx_md; |
---|
2277 | |
---|
2278 | /* |
---|
2279 | ** Read off all the packets we've received on this unit |
---|
2280 | */ |
---|
2281 | while( (rxstat = ld_le32(&rmd->status)) ) |
---|
2282 | { |
---|
2283 | if (rxstat & XL_RXSTAT_UP_ERROR) |
---|
2284 | { |
---|
2285 | printk("unit %i up error\n", sc->xl_unit ); |
---|
2286 | ifp->if_ierrors++; |
---|
2287 | } |
---|
2288 | |
---|
2289 | if( (rxstat & XL_RXSTAT_UP_CMPLT) ) |
---|
2290 | { |
---|
2291 | |
---|
2292 | #if 0 |
---|
2293 | { |
---|
2294 | char *pkt, *delim; |
---|
2295 | int i; |
---|
2296 | pkt = mtod(rmd->mbuf, char *); |
---|
2297 | printk("unit %i rx pkt (%08x) ", sc->xl_unit, pkt ); |
---|
2298 | for(delim="", i=0; i < sizeof(struct ether_header)+8; i++, delim=":") |
---|
2299 | printk("%s%02x", delim, (char) pkt[i] ); |
---|
2300 | printk("\n"); |
---|
2301 | } |
---|
2302 | #endif |
---|
2303 | |
---|
2304 | /* pass on the packet in the mbuf */ |
---|
2305 | len = ( ld_le32(&rmd->status) & XL_RXSTAT_LENMASK); |
---|
2306 | m = rmd->mbuf; |
---|
2307 | m->m_len = m->m_pkthdr.len = len - sizeof(struct ether_header); |
---|
2308 | eh = mtod(m, struct ether_header *); |
---|
2309 | m->m_data += sizeof(struct ether_header); |
---|
2310 | |
---|
2311 | ether_input(ifp, eh, m); |
---|
2312 | |
---|
2313 | /* get a new mbuf */ |
---|
2314 | MGETHDR (m, M_WAIT, MT_DATA); |
---|
2315 | MCLGET (m, M_WAIT); |
---|
2316 | m->m_pkthdr.rcvif = ifp; |
---|
2317 | rmd->mbuf = m; |
---|
2318 | st_le32( &rmd->status, 0 ); |
---|
2319 | st_le32( &rmd->addr, (uint32_t)phys_to_bus(mtod(m, void *)) ); |
---|
2320 | } |
---|
2321 | else |
---|
2322 | { |
---|
2323 | /* some kind of packet failure */ |
---|
2324 | printk("etherlink : unit elnk%d bad receive status -- packet dropped\n", sc->xl_unit); |
---|
2325 | ifp->if_ierrors++; |
---|
2326 | } |
---|
2327 | /* clear descriptor status */ |
---|
2328 | rmd->status = 0; |
---|
2329 | |
---|
2330 | rmd = rmd->next_md; |
---|
2331 | } |
---|
2332 | |
---|
2333 | sc->curr_rx_md = rmd; |
---|
2334 | } |
---|
2335 | } |
---|
2336 | } |
---|
2337 | |
---|
2338 | /* |
---|
2339 | ** If more events are pending, service them before we go back to sleep |
---|
2340 | */ |
---|
2341 | if( rtems_event_receive( RTEMS_ALL_EVENTS, |
---|
2342 | RTEMS_NO_WAIT | RTEMS_EVENT_ANY, |
---|
2343 | 0, |
---|
2344 | &events ) == RTEMS_UNSATISFIED ) break; |
---|
2345 | } |
---|
2346 | } |
---|
2347 | } |
---|
2348 | |
---|
2349 | |
---|
2350 | |
---|
2351 | |
---|
2352 | |
---|
2353 | |
---|
2354 | |
---|
2355 | |
---|
2356 | /* |
---|
2357 | * Driver transmit daemon |
---|
2358 | */ |
---|
2359 | void |
---|
2360 | elnk_txDaemon (void *arg) |
---|
2361 | { |
---|
2362 | struct elnk_softc *sc; |
---|
2363 | struct ifnet *ifp; |
---|
2364 | struct mbuf *m; |
---|
2365 | struct TXMD *lastmd, *nextmd, *firstmd; |
---|
2366 | int chainCount,i; |
---|
2367 | rtems_event_set events; |
---|
2368 | |
---|
2369 | for (;;) |
---|
2370 | { |
---|
2371 | /* |
---|
2372 | * Wait for any unit's signal to wake us up |
---|
2373 | */ |
---|
2374 | rtems_bsdnet_event_receive( RTEMS_ALL_EVENTS, |
---|
2375 | RTEMS_EVENT_ANY | RTEMS_WAIT, |
---|
2376 | RTEMS_NO_TIMEOUT, &events); |
---|
2377 | |
---|
2378 | for(i=0; i< NUM_UNITS; i++ ) |
---|
2379 | { |
---|
2380 | sc = &elnk_softc[i]; |
---|
2381 | if( sc->ioaddr ) |
---|
2382 | { |
---|
2383 | if( events & sc->ioevent ) |
---|
2384 | { |
---|
2385 | ifp = &sc->arpcom.ac_if; |
---|
2386 | |
---|
2387 | /* |
---|
2388 | * Send packets till queue is empty or tx ring is full |
---|
2389 | */ |
---|
2390 | |
---|
2391 | chainCount = 0; |
---|
2392 | firstmd = NULL; |
---|
2393 | |
---|
2394 | lastmd = sc->last_tx_md; |
---|
2395 | |
---|
2396 | for(;;) |
---|
2397 | { |
---|
2398 | /* |
---|
2399 | ** Check the chain recovery queue whenever the tx |
---|
2400 | ** daemon services the stack. Note this routine does |
---|
2401 | ** not assume the context of one of the lanboard units |
---|
2402 | ** because used tx mbufs are no longer associated with |
---|
2403 | ** any unit. |
---|
2404 | */ |
---|
2405 | { |
---|
2406 | struct TXMD *chainhead, *chaintail; |
---|
2407 | size_t esize; |
---|
2408 | |
---|
2409 | if( rtems_message_queue_receive( chainRecoveryQueue, &chainhead, &esize, |
---|
2410 | RTEMS_NO_WAIT, 0) == RTEMS_SUCCESSFUL ) |
---|
2411 | { |
---|
2412 | /* get a pointer to the tail */ |
---|
2413 | chaintail = chainhead->chainptr; |
---|
2414 | |
---|
2415 | /* if the tail points somewhere, free the entire |
---|
2416 | chain */ |
---|
2417 | if( chaintail && (int)chaintail != -1 ) |
---|
2418 | { |
---|
2419 | for(;;) |
---|
2420 | { |
---|
2421 | m_freem( chainhead->mbuf ); |
---|
2422 | st_le32( &chainhead->status, XL_TXSTAT_DL_COMPLETE ); |
---|
2423 | chainhead->mbuf = NULL; |
---|
2424 | |
---|
2425 | if( chainhead == chaintail ) break; |
---|
2426 | chainhead = chainhead->next_md; |
---|
2427 | } |
---|
2428 | } |
---|
2429 | else |
---|
2430 | { |
---|
2431 | /* a single packet chain */ |
---|
2432 | m_freem( chainhead->mbuf ); |
---|
2433 | st_le32( &chainhead->status, XL_TXSTAT_DL_COMPLETE ); |
---|
2434 | chainhead->mbuf = NULL; |
---|
2435 | } |
---|
2436 | } |
---|
2437 | } |
---|
2438 | |
---|
2439 | nextmd = lastmd->next_md; |
---|
2440 | |
---|
2441 | /* stop when ring is full */ |
---|
2442 | if( ! (ld_le32(&nextmd->status) & XL_TXSTAT_DL_COMPLETE) ) |
---|
2443 | { |
---|
2444 | printk("etherlink : unit elnk%d tx ring full!\n", sc->xl_unit); |
---|
2445 | break; |
---|
2446 | } |
---|
2447 | /* sanity check the next packet descriptor */ |
---|
2448 | if( nextmd->mbuf ) |
---|
2449 | { |
---|
2450 | printk("etherlink : unit elnk%d tx ring corrupt!\n", sc->xl_unit); |
---|
2451 | break; |
---|
2452 | } |
---|
2453 | |
---|
2454 | |
---|
2455 | |
---|
2456 | IF_DEQUEUE(&ifp->if_snd, m); |
---|
2457 | if( !m ) break; |
---|
2458 | |
---|
2459 | { |
---|
2460 | int i; |
---|
2461 | |
---|
2462 | nextmd->mbuf = m; |
---|
2463 | |
---|
2464 | for(i=0; i< NUM_FRAGS; i++) |
---|
2465 | { |
---|
2466 | st_le32( &nextmd->txfrags[i].length, ((m->m_next)?0:XL_LAST_FRAG) | ( m->m_len & XL_TXSTAT_LENMASK) ); |
---|
2467 | st_le32( &nextmd->txfrags[i].addr, (uint32_t)phys_to_bus( m->m_data ) ); |
---|
2468 | if ((m = m->m_next) == NULL) |
---|
2469 | break; |
---|
2470 | } |
---|
2471 | if( m ) |
---|
2472 | { |
---|
2473 | printk("etherlink : unit elnk%d tx fragments exhausted, truncating packet!\n", sc->xl_unit); |
---|
2474 | st_le32( &nextmd->txfrags[NUM_FRAGS-1].length, XL_LAST_FRAG | |
---|
2475 | ld_le32( &nextmd->txfrags[NUM_FRAGS-1].length) ); |
---|
2476 | } |
---|
2477 | } |
---|
2478 | |
---|
2479 | #if 0 |
---|
2480 | { |
---|
2481 | char *pkt = bus_to_phys( ld_le32( &nextmd->txfrags[i].addr )), *delim; |
---|
2482 | int i; |
---|
2483 | printk("unit %d queued pkt (%08x) ", sc->xl_unit, (uint32_t)pkt ); |
---|
2484 | for(delim="", i=0; i < sizeof(struct ether_header); i++, delim=":") |
---|
2485 | printk("%s%02x", delim, (char) pkt[i] ); |
---|
2486 | printk("\n"); |
---|
2487 | } |
---|
2488 | #endif |
---|
2489 | |
---|
2490 | |
---|
2491 | /* this packet will be the new end of the list */ |
---|
2492 | st_le32( &nextmd->next, 0); |
---|
2493 | st_le32( &nextmd->status, 0); |
---|
2494 | |
---|
2495 | if( !firstmd ) |
---|
2496 | { |
---|
2497 | /* keep track of the first packet we add to the chain */ |
---|
2498 | firstmd = nextmd; |
---|
2499 | |
---|
2500 | /* |
---|
2501 | ** use the chainbuf pointer of the last packet of |
---|
2502 | ** the previous chain as a flag so when a |
---|
2503 | ** dnComplete interrupt indicates the card is |
---|
2504 | ** finished downloading the chain, the isr can |
---|
2505 | ** immediately start the next which always begins |
---|
2506 | ** with the next packet in the ring. Note several |
---|
2507 | ** chains of packets may be assembled this way. |
---|
2508 | */ |
---|
2509 | lastmd->chainptr = (struct TXMD *)-1; |
---|
2510 | } |
---|
2511 | else |
---|
2512 | { |
---|
2513 | /* hook this packet to the previous one */ |
---|
2514 | st_le32( &lastmd->next, (uint32_t)phys_to_bus( nextmd )); |
---|
2515 | } |
---|
2516 | |
---|
2517 | ++chainCount; |
---|
2518 | lastmd = nextmd; |
---|
2519 | } |
---|
2520 | |
---|
2521 | |
---|
2522 | |
---|
2523 | |
---|
2524 | |
---|
2525 | if( firstmd ) |
---|
2526 | { |
---|
2527 | /* only enter if we've queued one or more packets */ |
---|
2528 | |
---|
2529 | /* save the last descriptor we set up in the chain */ |
---|
2530 | sc->last_tx_md = lastmd; |
---|
2531 | |
---|
2532 | /* |
---|
2533 | * We've added one or more packets to a chain, flag |
---|
2534 | * the last packet so we get an dnComplete interrupt |
---|
2535 | * when the card finishes accepting the chain |
---|
2536 | */ |
---|
2537 | st_le32( &lastmd->status, XL_TXSTAT_DL_INTR ); |
---|
2538 | |
---|
2539 | /* |
---|
2540 | * point the chain head's chainptr to the tail so we |
---|
2541 | * can jump to the next chain to send inside the isr. |
---|
2542 | * If we're only sending one packet, then don't bother |
---|
2543 | * with the link, as the chainptr value will either be |
---|
2544 | * 0 if theres no next chain or -1 if there is. |
---|
2545 | */ |
---|
2546 | if( chainCount > 1 ) |
---|
2547 | { |
---|
2548 | firstmd->chainptr = lastmd; |
---|
2549 | |
---|
2550 | sc->chain_lengths[sc->chlenIndex]= (short)chainCount; |
---|
2551 | if( ++sc->chlenIndex == NUM_CHAIN_LENGTHS ) sc->chlenIndex = 0; |
---|
2552 | } |
---|
2553 | |
---|
2554 | /* |
---|
2555 | ** clear the last packet's chainptr flag. If another |
---|
2556 | ** chain is added later but before this chain is |
---|
2557 | ** finished being sent, this flag on this packet will |
---|
2558 | ** be re-set to -1 |
---|
2559 | */ |
---|
2560 | lastmd->chainptr = NULL; |
---|
2561 | |
---|
2562 | #if 0 |
---|
2563 | printk("unit %d queued %d pkts, lastpkt status %08X\n", |
---|
2564 | sc->xl_unit, |
---|
2565 | chainCount, |
---|
2566 | (uint32_t)ld_le32( &lastmd->status) ); |
---|
2567 | #endif |
---|
2568 | |
---|
2569 | if( sc->tx_idle == 0 && CSR_READ_4(sc, XL_DOWNLIST_PTR) == 0 ) |
---|
2570 | { |
---|
2571 | printk("etherlink : unit elnk%d tx forced!\n", sc->xl_unit); |
---|
2572 | sc->tx_idle = -1; |
---|
2573 | } |
---|
2574 | |
---|
2575 | /* |
---|
2576 | ** start sending this chain of packets if tx isn't |
---|
2577 | ** busy, else the dnComplete interrupt will see there |
---|
2578 | ** is another chain waiting and begin it immediately. |
---|
2579 | */ |
---|
2580 | if( sc->tx_idle ) |
---|
2581 | { |
---|
2582 | #if 0 |
---|
2583 | printk("etherlink : unit elnk%d tx started %d packets\n", sc->xl_unit, chainCount ); |
---|
2584 | #endif |
---|
2585 | elnk_start_txchain(sc, firstmd); |
---|
2586 | } |
---|
2587 | } |
---|
2588 | |
---|
2589 | |
---|
2590 | ifp->if_flags &= ~IFF_OACTIVE; |
---|
2591 | } |
---|
2592 | } |
---|
2593 | } |
---|
2594 | } |
---|
2595 | } |
---|
2596 | |
---|
2597 | |
---|
2598 | |
---|
2599 | |
---|
2600 | |
---|
2601 | |
---|
2602 | |
---|
2603 | |
---|
2604 | |
---|
2605 | |
---|
2606 | |
---|
2607 | static void |
---|
2608 | elnk_start (struct ifnet *ifp) |
---|
2609 | { |
---|
2610 | struct elnk_softc *sc = ifp->if_softc; |
---|
2611 | #if 0 |
---|
2612 | printk("unit %i tx signaled\n", sc->xl_unit ); |
---|
2613 | #endif |
---|
2614 | ifp->if_flags |= IFF_OACTIVE; |
---|
2615 | rtems_event_send( txDaemonTid, sc->ioevent ); |
---|
2616 | } |
---|
2617 | |
---|
2618 | |
---|
2619 | |
---|
2620 | |
---|
2621 | |
---|
2622 | |
---|
2623 | |
---|
2624 | |
---|
2625 | |
---|
2626 | |
---|
2627 | |
---|
2628 | |
---|
2629 | |
---|
2630 | |
---|
2631 | |
---|
2632 | /* |
---|
2633 | * Initialize and start the device |
---|
2634 | */ |
---|
2635 | static void |
---|
2636 | elnk_init (void *arg) |
---|
2637 | { |
---|
2638 | int i; |
---|
2639 | struct elnk_softc *sc = arg; |
---|
2640 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
2641 | |
---|
2642 | if( !(ifp->if_flags & IFF_RUNNING) ) |
---|
2643 | { |
---|
2644 | xl_stop(sc); |
---|
2645 | xl_reset(sc); |
---|
2646 | sc->tx_idle = -1; |
---|
2647 | |
---|
2648 | { |
---|
2649 | uint32_t cr,sr; |
---|
2650 | |
---|
2651 | xl_miibus_writereg(sc, 0x18, MII_BMCR, BMCR_RESET ); |
---|
2652 | |
---|
2653 | while( (cr = xl_miibus_readreg(sc, 0x18, MII_BMCR )) & BMCR_RESET ) |
---|
2654 | { |
---|
2655 | DELAY(100000); |
---|
2656 | } |
---|
2657 | |
---|
2658 | xl_miibus_writereg(sc, 0x18, MII_ANAR, ANAR_10 | ANAR_TX | ANAR_10_FD | ANAR_TX_FD ); /* ANAR_T4 */ |
---|
2659 | xl_miibus_writereg(sc, 0x18, MII_BMCR, BMCR_STARTNEG | BMCR_AUTOEN ); |
---|
2660 | |
---|
2661 | for (i=0; ((sr = xl_miibus_readreg(sc, 0x18, MII_BMSR)) & BMSR_ACOMP) == 0 && i < 20; i++) |
---|
2662 | DELAY(10000); |
---|
2663 | } |
---|
2664 | |
---|
2665 | |
---|
2666 | /* |
---|
2667 | * Set up hardware if its not already been done |
---|
2668 | */ |
---|
2669 | if( !sc->irqInfo.hdl ) |
---|
2670 | { |
---|
2671 | elnk_initialize_hardware(sc); |
---|
2672 | } |
---|
2673 | |
---|
2674 | /* |
---|
2675 | * Enable the card |
---|
2676 | */ |
---|
2677 | { |
---|
2678 | u_int8_t rxfilt; |
---|
2679 | |
---|
2680 | /* Init our MAC address */ |
---|
2681 | XL_SEL_WIN(2); |
---|
2682 | for (i = 0; i < ETHER_ADDR_LEN; i++) |
---|
2683 | { |
---|
2684 | CSR_WRITE_1(sc, XL_W2_STATION_ADDR_LO + i, sc->arpcom.ac_enaddr[i]); |
---|
2685 | } |
---|
2686 | |
---|
2687 | { |
---|
2688 | int media = IFM_ETHER|IFM_100_TX|IFM_FDX; |
---|
2689 | |
---|
2690 | xl_mediacheck(sc); |
---|
2691 | |
---|
2692 | /* Choose a default media. */ |
---|
2693 | switch(sc->xl_xcvr) { |
---|
2694 | case XL_XCVR_10BT: |
---|
2695 | media = IFM_ETHER|IFM_10_T; |
---|
2696 | xl_setmode(sc, media); |
---|
2697 | break; |
---|
2698 | case XL_XCVR_AUI: |
---|
2699 | if (sc->xl_type == XL_TYPE_905B && |
---|
2700 | sc->xl_media == XL_MEDIAOPT_10FL) { |
---|
2701 | media = IFM_ETHER|IFM_10_FL; |
---|
2702 | xl_setmode(sc, media); |
---|
2703 | } else { |
---|
2704 | media = IFM_ETHER|IFM_10_5; |
---|
2705 | xl_setmode(sc, media); |
---|
2706 | } |
---|
2707 | break; |
---|
2708 | case XL_XCVR_COAX: |
---|
2709 | media = IFM_ETHER|IFM_10_2; |
---|
2710 | xl_setmode(sc, media); |
---|
2711 | break; |
---|
2712 | case XL_XCVR_AUTO: |
---|
2713 | case XL_XCVR_100BTX: |
---|
2714 | xl_setcfg(sc); |
---|
2715 | break; |
---|
2716 | case XL_XCVR_MII: |
---|
2717 | printk("etherlink : unit elnk%d MII media not supported!\n", sc->xl_unit); |
---|
2718 | break; |
---|
2719 | case XL_XCVR_100BFX: |
---|
2720 | media = IFM_ETHER|IFM_100_FX; |
---|
2721 | break; |
---|
2722 | default: |
---|
2723 | printk("etherlink : unit elnk%d unknown XCVR type: %d\n", sc->xl_unit, sc->xl_xcvr); |
---|
2724 | /* |
---|
2725 | * This will probably be wrong, but it prevents |
---|
2726 | * the ifmedia code from panicking. |
---|
2727 | */ |
---|
2728 | media = IFM_ETHER|IFM_10_T; |
---|
2729 | break; |
---|
2730 | } |
---|
2731 | |
---|
2732 | |
---|
2733 | if (sc->xl_flags & XL_FLAG_NO_XCVR_PWR) { |
---|
2734 | XL_SEL_WIN(0); |
---|
2735 | CSR_WRITE_2(sc, XL_W0_MFG_ID, XL_NO_XCVR_PWR_MAGICBITS); |
---|
2736 | } |
---|
2737 | } |
---|
2738 | |
---|
2739 | |
---|
2740 | |
---|
2741 | XL_SEL_WIN(2); |
---|
2742 | /* Clear the station mask. */ |
---|
2743 | for (i = 0; i < 3; i++) |
---|
2744 | CSR_WRITE_2(sc, XL_W2_STATION_MASK_LO + (i * 2), 0); |
---|
2745 | |
---|
2746 | /* |
---|
2747 | * Set the TX freethresh value. |
---|
2748 | * Note that this has no effect on 3c905B "cyclone" |
---|
2749 | * cards but is required for 3c900/3c905 "boomerang" |
---|
2750 | * cards in order to enable the download engine. |
---|
2751 | */ |
---|
2752 | CSR_WRITE_1(sc, XL_TX_FREETHRESH, XL_PACKET_SIZE >> 8); |
---|
2753 | |
---|
2754 | /* Set the TX start threshold for best performance. */ |
---|
2755 | sc->xl_tx_thresh = XL_MIN_FRAMELEN; |
---|
2756 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_SET_START|sc->xl_tx_thresh); |
---|
2757 | |
---|
2758 | /* |
---|
2759 | * If this is a 3c905B, also set the tx reclaim threshold. |
---|
2760 | * This helps cut down on the number of tx reclaim errors |
---|
2761 | * that could happen on a busy network. The chip multiplies |
---|
2762 | * the register value by 16 to obtain the actual threshold |
---|
2763 | * in bytes, so we divide by 16 when setting the value here. |
---|
2764 | * The existing threshold value can be examined by reading |
---|
2765 | * the register at offset 9 in window 5. |
---|
2766 | */ |
---|
2767 | if (sc->xl_type == XL_TYPE_905B) { |
---|
2768 | CSR_WRITE_2(sc, XL_COMMAND, |
---|
2769 | XL_CMD_SET_TX_RECLAIM|(XL_PACKET_SIZE >> 4)); |
---|
2770 | } |
---|
2771 | |
---|
2772 | /* Set RX filter bits. */ |
---|
2773 | XL_SEL_WIN(5); |
---|
2774 | rxfilt = CSR_READ_1(sc, XL_W5_RX_FILTER); |
---|
2775 | |
---|
2776 | /* Set the individual bit to receive frames for this host only. */ |
---|
2777 | rxfilt |= XL_RXFILTER_INDIVIDUAL; |
---|
2778 | |
---|
2779 | /* If we want promiscuous mode, set the allframes bit. */ |
---|
2780 | if (ifp->if_flags & IFF_PROMISC) { |
---|
2781 | rxfilt |= XL_RXFILTER_ALLFRAMES; |
---|
2782 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt); |
---|
2783 | } else { |
---|
2784 | rxfilt &= ~XL_RXFILTER_ALLFRAMES; |
---|
2785 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt); |
---|
2786 | } |
---|
2787 | |
---|
2788 | /* |
---|
2789 | * Set capture broadcast bit to capture broadcast frames. |
---|
2790 | */ |
---|
2791 | if (ifp->if_flags & IFF_BROADCAST) { |
---|
2792 | rxfilt |= XL_RXFILTER_BROADCAST; |
---|
2793 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt); |
---|
2794 | } else { |
---|
2795 | rxfilt &= ~XL_RXFILTER_BROADCAST; |
---|
2796 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt); |
---|
2797 | } |
---|
2798 | |
---|
2799 | #if 0 |
---|
2800 | /* |
---|
2801 | * Program the multicast filter, if necessary. |
---|
2802 | */ |
---|
2803 | if (sc->xl_type == XL_TYPE_905B) |
---|
2804 | xl_setmulti_hash(sc); |
---|
2805 | else |
---|
2806 | xl_setmulti(sc); |
---|
2807 | #endif |
---|
2808 | /* |
---|
2809 | * Load the address of the RX list. We have to |
---|
2810 | * stall the upload engine before we can manipulate |
---|
2811 | * the uplist pointer register, then unstall it when |
---|
2812 | * we're finished. We also have to wait for the |
---|
2813 | * stall command to complete before proceeding. |
---|
2814 | * Note that we have to do this after any RX resets |
---|
2815 | * have completed since the uplist register is cleared |
---|
2816 | * by a reset. |
---|
2817 | */ |
---|
2818 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_UP_STALL); |
---|
2819 | xl_wait(sc); |
---|
2820 | CSR_WRITE_4(sc, XL_UPLIST_PTR, phys_to_bus( sc->curr_rx_md )); |
---|
2821 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_UP_UNSTALL); |
---|
2822 | xl_wait(sc); |
---|
2823 | |
---|
2824 | |
---|
2825 | #if 0 |
---|
2826 | if (sc->xl_type == XL_TYPE_905B) { |
---|
2827 | /* Set polling interval */ |
---|
2828 | CSR_WRITE_1(sc, XL_DOWN_POLL, 64); |
---|
2829 | xl_wait(sc); |
---|
2830 | printk("etherlink : unit elnk%d tx polling enabled\n", sc->xl_unit ); |
---|
2831 | } |
---|
2832 | #endif |
---|
2833 | |
---|
2834 | /* |
---|
2835 | * If the coax transceiver is on, make sure to enable |
---|
2836 | * the DC-DC converter. |
---|
2837 | */ |
---|
2838 | XL_SEL_WIN(3); |
---|
2839 | if (sc->xl_xcvr == XL_XCVR_COAX) |
---|
2840 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_START); |
---|
2841 | else |
---|
2842 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP); |
---|
2843 | |
---|
2844 | /* increase packet size to allow reception of 802.1q or ISL packets */ |
---|
2845 | if (sc->xl_type == XL_TYPE_905B) |
---|
2846 | CSR_WRITE_2(sc, XL_W3_MAXPKTSIZE, XL_PACKET_SIZE); |
---|
2847 | /* Clear out the stats counters. */ |
---|
2848 | |
---|
2849 | memset( &sc->xl_stats, 0, sizeof(struct xl_stats)); |
---|
2850 | |
---|
2851 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STATS_DISABLE); |
---|
2852 | sc->xl_stats_no_timeout = 1; |
---|
2853 | xl_stats_update(sc->stat_timer_id,sc); |
---|
2854 | sc->xl_stats_no_timeout = 0; |
---|
2855 | XL_SEL_WIN(4); |
---|
2856 | CSR_WRITE_2(sc, XL_W4_NET_DIAG, XL_NETDIAG_UPPER_BYTES_ENABLE); |
---|
2857 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STATS_ENABLE); |
---|
2858 | |
---|
2859 | |
---|
2860 | /* |
---|
2861 | * Enable interrupts. |
---|
2862 | */ |
---|
2863 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ACK|0xFF); |
---|
2864 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STAT_ENB|XL_INTRS); |
---|
2865 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ENB|XL_INTRS); |
---|
2866 | |
---|
2867 | /* Set the RX early threshold */ |
---|
2868 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_THRESH|(XL_PACKET_SIZE >>2)); |
---|
2869 | CSR_WRITE_4(sc, XL_DMACTL, XL_DMACTL_UP_RX_EARLY ); |
---|
2870 | |
---|
2871 | /* Enable receiver and transmitter. */ |
---|
2872 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_ENABLE); |
---|
2873 | xl_wait(sc); |
---|
2874 | CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_ENABLE); |
---|
2875 | xl_wait(sc); |
---|
2876 | |
---|
2877 | /* Select window 7 for normal operations. */ |
---|
2878 | XL_SEL_WIN(7); |
---|
2879 | |
---|
2880 | /* schedule the stats update timer */ |
---|
2881 | rtems_timer_fire_after( sc->stat_timer_id, sc->stats_update_ticks, xl_stats_update, (void *)sc ); |
---|
2882 | } |
---|
2883 | |
---|
2884 | /* |
---|
2885 | * Tell the world that we're running. |
---|
2886 | */ |
---|
2887 | ifp->if_flags |= IFF_RUNNING; |
---|
2888 | } |
---|
2889 | } |
---|
2890 | |
---|
2891 | |
---|
2892 | |
---|
2893 | |
---|
2894 | |
---|
2895 | |
---|
2896 | |
---|
2897 | /* |
---|
2898 | * Stop the device |
---|
2899 | */ |
---|
2900 | static void |
---|
2901 | elnk_stop (struct elnk_softc *sc) |
---|
2902 | { |
---|
2903 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
2904 | int i; |
---|
2905 | |
---|
2906 | /* |
---|
2907 | * Stop the transmitter |
---|
2908 | */ |
---|
2909 | xl_stop(sc); |
---|
2910 | xl_reset(sc); |
---|
2911 | sc->tx_idle = -1; |
---|
2912 | |
---|
2913 | ifp->if_flags &= ~IFF_RUNNING; |
---|
2914 | |
---|
2915 | /* |
---|
2916 | ** Clear out the rx & tx rings |
---|
2917 | */ |
---|
2918 | { |
---|
2919 | struct TXMD *chainhead; |
---|
2920 | size_t esize; |
---|
2921 | |
---|
2922 | while( rtems_message_queue_receive( chainRecoveryQueue, &chainhead, &esize, |
---|
2923 | RTEMS_NO_WAIT, 0) == RTEMS_SUCCESSFUL ); |
---|
2924 | } |
---|
2925 | |
---|
2926 | for(i=0 ; i<sc->numRxbuffers; i++) |
---|
2927 | { |
---|
2928 | st_le32( &sc->rx_ring[i].status, 0); |
---|
2929 | st_le32( &sc->rx_ring[i].length, XL_LAST_FRAG | XL_PACKET_SIZE ); |
---|
2930 | } |
---|
2931 | |
---|
2932 | for(i=0 ; i<sc->numTxbuffers; i++) |
---|
2933 | { |
---|
2934 | st_le32( &sc->tx_ring[i].status, XL_TXSTAT_DL_COMPLETE ); |
---|
2935 | st_le32( &sc->tx_ring[i].next, 0); |
---|
2936 | if( sc->tx_ring[i].mbuf ) |
---|
2937 | { |
---|
2938 | m_free( sc->tx_ring[i].mbuf ); |
---|
2939 | sc->tx_ring[i].mbuf = NULL; |
---|
2940 | } |
---|
2941 | } |
---|
2942 | } |
---|
2943 | |
---|
2944 | |
---|
2945 | |
---|
2946 | |
---|
2947 | /* |
---|
2948 | * Show interface statistics |
---|
2949 | */ |
---|
2950 | static void |
---|
2951 | elnk_stats (struct elnk_softc *sc) |
---|
2952 | { |
---|
2953 | printf(" MII PHY data { anr:%04x lpar:%04x stat:%04x ctl:%04x }\n", |
---|
2954 | sc->xl_stats.miianr, |
---|
2955 | sc->xl_stats.miipar, |
---|
2956 | sc->xl_stats.miistatus, |
---|
2957 | sc->xl_stats.miicmd); |
---|
2958 | |
---|
2959 | printf(" internalcfg:%08" PRIx32 " macctl:%04x dmactl:%08" PRIx32 "\n", |
---|
2960 | sc->xl_stats.internalconfig, |
---|
2961 | sc->xl_stats.mac_control, |
---|
2962 | sc->xl_stats.dmactl); |
---|
2963 | |
---|
2964 | printf(" rxstatus:%04x txstatus:%02x smbstat:%04x\n", |
---|
2965 | sc->xl_stats.rxstatus, |
---|
2966 | sc->xl_stats.txstatus, |
---|
2967 | sc->xl_stats.smbstatus); |
---|
2968 | |
---|
2969 | printf(" txfree:%04X intstatus:%04x mediastat:%04x\n", |
---|
2970 | sc->xl_stats.txfree, |
---|
2971 | sc->xl_stats.intstatus, |
---|
2972 | sc->xl_stats.mediastatus); |
---|
2973 | |
---|
2974 | |
---|
2975 | { |
---|
2976 | int i, totalLengths= 0, numLengths= 0; |
---|
2977 | |
---|
2978 | for(i=0; i< NUM_CHAIN_LENGTHS; i++) |
---|
2979 | { |
---|
2980 | if( sc->chain_lengths[i] > -1 ) |
---|
2981 | { |
---|
2982 | totalLengths += sc->chain_lengths[i]; |
---|
2983 | ++numLengths; |
---|
2984 | } |
---|
2985 | } |
---|
2986 | |
---|
2987 | printf(" interrupts:%-9" PRIu32 " txcmp_ints:%-5" PRIu32 " avg_chain_len:%-4d\n", |
---|
2988 | sc->xl_stats.device_interrupts, |
---|
2989 | sc->xl_stats.txcomplete_ints, |
---|
2990 | numLengths ? (totalLengths / numLengths) : -1 ); |
---|
2991 | } |
---|
2992 | |
---|
2993 | printf(" carrier_lost:%-5d sqe_errs:%-5d\n", |
---|
2994 | sc->xl_stats.xl_carrier_lost, |
---|
2995 | sc->xl_stats.xl_sqe_errs); |
---|
2996 | |
---|
2997 | printf(" tx_multi_collision:%-5d tx_single_collision:%-5d\n", |
---|
2998 | sc->xl_stats.xl_tx_multi_collision, |
---|
2999 | sc->xl_stats.xl_tx_single_collision); |
---|
3000 | |
---|
3001 | printf(" tx_late_collision:%-5d rx_overrun:%-5d\n", |
---|
3002 | sc->xl_stats.xl_tx_late_collision, |
---|
3003 | sc->xl_stats.xl_rx_overrun); |
---|
3004 | |
---|
3005 | printf(" tx_deferred:%-5d badssd:%-5d\n", |
---|
3006 | sc->xl_stats.xl_tx_deferred, |
---|
3007 | sc->xl_stats.xl_badssd); |
---|
3008 | |
---|
3009 | printf(" rx_frames_ok:%-9" PRIu32 " tx_frames_ok:%-9" PRIu32 "\n", |
---|
3010 | sc->xl_stats.xl_rx_frames_ok, |
---|
3011 | sc->xl_stats.xl_tx_frames_ok); |
---|
3012 | |
---|
3013 | printf(" rx_bytes_ok:%-9" PRIu32 " tx_bytes_ok:%-9" PRIu32 "\n", |
---|
3014 | sc->xl_stats.xl_rx_bytes_ok, |
---|
3015 | sc->xl_stats.xl_tx_bytes_ok ); |
---|
3016 | } |
---|
3017 | |
---|
3018 | |
---|
3019 | |
---|
3020 | |
---|
3021 | |
---|
3022 | |
---|
3023 | |
---|
3024 | /* |
---|
3025 | * Driver ioctl handler |
---|
3026 | */ |
---|
3027 | static int |
---|
3028 | elnk_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data) |
---|
3029 | { |
---|
3030 | struct elnk_softc *sc = ifp->if_softc; |
---|
3031 | int error = 0; |
---|
3032 | |
---|
3033 | switch (command) { |
---|
3034 | case SIOCGIFADDR: |
---|
3035 | case SIOCSIFADDR: |
---|
3036 | ether_ioctl (ifp, command, data); |
---|
3037 | break; |
---|
3038 | |
---|
3039 | case SIOCSIFFLAGS: |
---|
3040 | switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { |
---|
3041 | case IFF_RUNNING: |
---|
3042 | elnk_stop (sc); |
---|
3043 | break; |
---|
3044 | |
---|
3045 | case IFF_UP: |
---|
3046 | elnk_init (sc); |
---|
3047 | break; |
---|
3048 | |
---|
3049 | case IFF_UP | IFF_RUNNING: |
---|
3050 | elnk_stop (sc); |
---|
3051 | elnk_init (sc); |
---|
3052 | break; |
---|
3053 | |
---|
3054 | default: |
---|
3055 | break; |
---|
3056 | } |
---|
3057 | break; |
---|
3058 | |
---|
3059 | case SIO_RTEMS_SHOW_STATS: |
---|
3060 | elnk_stats (sc); |
---|
3061 | break; |
---|
3062 | |
---|
3063 | /* |
---|
3064 | * FIXME: All sorts of multicast commands need to be added here! |
---|
3065 | */ |
---|
3066 | default: |
---|
3067 | error = EINVAL; |
---|
3068 | break; |
---|
3069 | } |
---|
3070 | |
---|
3071 | return error; |
---|
3072 | } |
---|
3073 | |
---|
3074 | |
---|
3075 | |
---|
3076 | |
---|
3077 | |
---|
3078 | |
---|
3079 | |
---|
3080 | |
---|
3081 | #if 0 |
---|
3082 | static int iftap(struct ifnet *ifp, struct ether_header *eh, struct mbuf *m ) |
---|
3083 | { |
---|
3084 | int i; |
---|
3085 | char *delim, *pkt; |
---|
3086 | |
---|
3087 | printk("unit %i, src ", ifp->if_unit ); |
---|
3088 | for(delim= "", i=0; i< ETHER_ADDR_LEN; i++, delim=":") |
---|
3089 | printk("%s%02x", delim, (char) eh->ether_shost[i] ); |
---|
3090 | |
---|
3091 | printk(" dest "); |
---|
3092 | |
---|
3093 | for(delim= "", i=0; i< ETHER_ADDR_LEN; i++, delim=":") |
---|
3094 | printk("%s%02x", delim, (char) eh->ether_dhost[i] ); |
---|
3095 | printk(" pkt "); |
---|
3096 | |
---|
3097 | pkt = (char *)eh; |
---|
3098 | for(delim="", i=0; i < sizeof(struct ether_header); i++, delim=":") |
---|
3099 | printk("%s%02x", delim, (char) pkt[i] ); |
---|
3100 | |
---|
3101 | printk("\n"); |
---|
3102 | return 0; |
---|
3103 | } |
---|
3104 | #endif |
---|
3105 | |
---|
3106 | |
---|
3107 | |
---|
3108 | struct el_boards |
---|
3109 | { |
---|
3110 | int pbus,pdev,pfun, vid, did, tindex; |
---|
3111 | }; |
---|
3112 | |
---|
3113 | /* |
---|
3114 | * Attach an ELNK driver to the system |
---|
3115 | */ |
---|
3116 | int |
---|
3117 | rtems_elnk_driver_attach (struct rtems_bsdnet_ifconfig *config, int attach) |
---|
3118 | { |
---|
3119 | struct elnk_softc *sc; |
---|
3120 | struct ifnet *ifp; |
---|
3121 | char *unitName; |
---|
3122 | int unitNumber; |
---|
3123 | int mtu, i; |
---|
3124 | unsigned char cvalue; |
---|
3125 | struct el_boards sysboards[NUM_UNITS]; |
---|
3126 | int numFound = 0; |
---|
3127 | int pbus, pdev, pfun; |
---|
3128 | #if defined(__i386__) |
---|
3129 | uint32_t value; |
---|
3130 | uint8_t interrupt; |
---|
3131 | #endif |
---|
3132 | #if defined(__PPC__) |
---|
3133 | uint32_t lvalue; |
---|
3134 | #endif |
---|
3135 | |
---|
3136 | |
---|
3137 | /* |
---|
3138 | * Get the instance number for the board we're going to configure |
---|
3139 | * from the user. |
---|
3140 | */ |
---|
3141 | if( (unitNumber = rtems_bsdnet_parse_driver_name( config, &unitName)) == -1 ) |
---|
3142 | { |
---|
3143 | return 0; |
---|
3144 | } |
---|
3145 | |
---|
3146 | if( strcmp(unitName, DRIVER_PREFIX) ) |
---|
3147 | { |
---|
3148 | printk("etherlink : invalid unit name '%s'\n", unitName ); |
---|
3149 | return 0; |
---|
3150 | } |
---|
3151 | |
---|
3152 | if ((unitNumber < 1) || (unitNumber > NUM_UNITS)) |
---|
3153 | { |
---|
3154 | printk("etherlink : unit %i is invalid, must be (1 <= n <= %d)\n", unitNumber, NUM_UNITS); |
---|
3155 | return 0; |
---|
3156 | } |
---|
3157 | |
---|
3158 | |
---|
3159 | { |
---|
3160 | int done= 0, unum; |
---|
3161 | |
---|
3162 | /* |
---|
3163 | * Run thru the list of boards, finding all that are present in |
---|
3164 | * the system. Sort by slot,dev - and then use the unitNumber-1 |
---|
3165 | * to index the list and select the device. Yucky. |
---|
3166 | */ |
---|
3167 | for( i=0; !done && xl_devs[i].xl_vid; i++) |
---|
3168 | { |
---|
3169 | for(unum= 1; !done && |
---|
3170 | pci_find_device( xl_devs[i].xl_vid, xl_devs[i].xl_did, unum-1, |
---|
3171 | &sysboards[numFound].pbus, |
---|
3172 | &sysboards[numFound].pdev, |
---|
3173 | &sysboards[numFound].pfun)==0; unum++) |
---|
3174 | { |
---|
3175 | if( numFound == NUM_UNITS ) |
---|
3176 | { |
---|
3177 | printk("etherlink : Maximum of %d units found, extra devices ignored.\n", NUM_UNITS ); |
---|
3178 | done=-1; |
---|
3179 | } |
---|
3180 | else |
---|
3181 | { |
---|
3182 | sysboards[numFound].vid = xl_devs[i].xl_vid; |
---|
3183 | sysboards[numFound].did = xl_devs[i].xl_did; |
---|
3184 | sysboards[numFound].tindex = i; |
---|
3185 | ++numFound; |
---|
3186 | } |
---|
3187 | } |
---|
3188 | } |
---|
3189 | |
---|
3190 | if( ! numFound ) |
---|
3191 | { |
---|
3192 | printk("etherlink : No Etherlink devices found\n"); |
---|
3193 | return 0; |
---|
3194 | } |
---|
3195 | |
---|
3196 | if( unitNumber-1 >= numFound ) |
---|
3197 | { |
---|
3198 | printk("etherlink : device '%s' not found\n", config->name ); |
---|
3199 | return 0; |
---|
3200 | } |
---|
3201 | |
---|
3202 | /* |
---|
3203 | * Got the list of etherlink boards in the system, now sort by |
---|
3204 | * slot,device. bubble sorts aren't all that wonderful, but this |
---|
3205 | * is a short & infrequently sorted list. |
---|
3206 | */ |
---|
3207 | if( numFound > 1 ) |
---|
3208 | { |
---|
3209 | struct el_boards tboard; |
---|
3210 | int didsort; |
---|
3211 | |
---|
3212 | do |
---|
3213 | { |
---|
3214 | didsort = 0; |
---|
3215 | |
---|
3216 | for(i=1; i<numFound; i++) |
---|
3217 | { |
---|
3218 | if( sysboards[i-1].pbus > sysboards[i].pbus || |
---|
3219 | (sysboards[i-1].pbus == sysboards[i].pbus && sysboards[i-1].pdev > sysboards[i].pdev) ) |
---|
3220 | { |
---|
3221 | memcpy(&tboard, &sysboards[i-1], sizeof(struct el_boards)); |
---|
3222 | memcpy(&sysboards[i-1], &sysboards[i], sizeof(struct el_boards)); |
---|
3223 | memcpy(&sysboards[i], &tboard, sizeof(struct el_boards)); |
---|
3224 | didsort++; |
---|
3225 | } |
---|
3226 | } |
---|
3227 | } |
---|
3228 | while( didsort ); |
---|
3229 | } |
---|
3230 | |
---|
3231 | /* |
---|
3232 | ** board list is sorted, now select the unit |
---|
3233 | */ |
---|
3234 | |
---|
3235 | pbus = sysboards[unitNumber-1].pbus; |
---|
3236 | pdev = sysboards[unitNumber-1].pdev; |
---|
3237 | pfun = sysboards[unitNumber-1].pfun; |
---|
3238 | } |
---|
3239 | |
---|
3240 | sc = &elnk_softc[unitNumber - 1]; |
---|
3241 | ifp = &sc->arpcom.ac_if; |
---|
3242 | if (ifp->if_softc != NULL) |
---|
3243 | { |
---|
3244 | printk("etherlink : unit %i already in use.\n", unitNumber ); |
---|
3245 | return 0; |
---|
3246 | } |
---|
3247 | |
---|
3248 | /* |
---|
3249 | ** Save various things |
---|
3250 | */ |
---|
3251 | sc->xl_unit = unitNumber; |
---|
3252 | sc->xl_type = sysboards[ unitNumber-1 ].tindex; |
---|
3253 | |
---|
3254 | sc->vendorID = sysboards[numFound].vid; |
---|
3255 | sc->deviceID = sysboards[numFound].did; |
---|
3256 | |
---|
3257 | sc->numRxbuffers = (config->rbuf_count) ? config->rbuf_count : RX_RING_SIZE; |
---|
3258 | sc->numTxbuffers = (config->xbuf_count) ? config->xbuf_count : TX_RING_SIZE; |
---|
3259 | |
---|
3260 | |
---|
3261 | for(i=0; i< NUM_CHAIN_LENGTHS; i++) sc->chain_lengths[i]= -1; |
---|
3262 | sc->chlenIndex = 0; |
---|
3263 | |
---|
3264 | |
---|
3265 | if (config->mtu) |
---|
3266 | mtu = config->mtu; |
---|
3267 | else |
---|
3268 | mtu = ETHERMTU; |
---|
3269 | |
---|
3270 | sc->acceptBroadcast = !config->ignore_broadcast; |
---|
3271 | |
---|
3272 | |
---|
3273 | |
---|
3274 | #ifdef ELNK_DEBUG |
---|
3275 | printk("etherlink : device '%s', name 'elnk%d', pci %02x:%02x.%02x, %d rx/%d tx buffers\n", |
---|
3276 | xl_devs[sc->xl_type].xl_name, sc->xl_unit, |
---|
3277 | pbus, pdev, pfun, |
---|
3278 | sc->numRxbuffers, sc->numTxbuffers); |
---|
3279 | #endif |
---|
3280 | |
---|
3281 | |
---|
3282 | /* |
---|
3283 | ** Create this unit's stats timer |
---|
3284 | */ |
---|
3285 | if( rtems_timer_create( rtems_build_name( 'X', 'L', 't', (char)(sc->xl_unit & 255)), |
---|
3286 | &sc->stat_timer_id ) != RTEMS_SUCCESSFUL ) |
---|
3287 | { |
---|
3288 | printk("etherlink : unit elnk%d unable to create stats timer\n", sc->xl_unit ); |
---|
3289 | return 0; |
---|
3290 | } |
---|
3291 | |
---|
3292 | /* update stats 1 times/second if things aren't incrementing fast |
---|
3293 | * enough to trigger stats interrupts |
---|
3294 | */ |
---|
3295 | sc->stats_update_ticks = rtems_clock_get_ticks_per_second(); |
---|
3296 | |
---|
3297 | /* |
---|
3298 | ** Get this unit's rx/tx event |
---|
3299 | */ |
---|
3300 | sc->ioevent = unit_signals[unitNumber-1]; |
---|
3301 | |
---|
3302 | |
---|
3303 | #if defined(__i386__) |
---|
3304 | pci_read_config_dword(pbus, pdev, pfun, 16, &value); |
---|
3305 | sc->ioaddr = value & ~IO_MASK; |
---|
3306 | |
---|
3307 | pci_read_config_byte(pbus, pdev, pfun, 60, &interrupt); |
---|
3308 | cvalue = interrupt; |
---|
3309 | #endif |
---|
3310 | #if defined(__PPC__) |
---|
3311 | /* |
---|
3312 | ** Prep the board |
---|
3313 | */ |
---|
3314 | pci_write_config_word(pbus, pdev, pfun, |
---|
3315 | PCI_COMMAND, |
---|
3316 | (uint16_t)( PCI_COMMAND_IO | |
---|
3317 | PCI_COMMAND_MASTER | |
---|
3318 | PCI_COMMAND_INVALIDATE | |
---|
3319 | PCI_COMMAND_WAIT ) ); |
---|
3320 | /* |
---|
3321 | * Get the device's base address |
---|
3322 | */ |
---|
3323 | pci_read_config_dword(pbus, pdev, pfun, |
---|
3324 | PCI_BASE_ADDRESS_0, |
---|
3325 | &lvalue); |
---|
3326 | |
---|
3327 | sc->ioaddr = (uint32_t)lvalue & PCI_BASE_ADDRESS_IO_MASK; |
---|
3328 | /* |
---|
3329 | ** Store the interrupt name, we'll use it later when we initialize |
---|
3330 | ** the board. |
---|
3331 | */ |
---|
3332 | pci_read_config_byte(pbus, pdev, pfun, |
---|
3333 | PCI_INTERRUPT_LINE, |
---|
3334 | &cvalue); |
---|
3335 | #endif |
---|
3336 | |
---|
3337 | memset(&sc->irqInfo,0,sizeof(rtems_irq_connect_data)); |
---|
3338 | sc->irqInfo.name = cvalue; |
---|
3339 | |
---|
3340 | |
---|
3341 | /* |
---|
3342 | ** Establish basic board config, set node address from config or |
---|
3343 | ** board eeprom, do stuff with additional device properties |
---|
3344 | */ |
---|
3345 | |
---|
3346 | { |
---|
3347 | uint8_t pci_latency; |
---|
3348 | uint8_t new_latency = 248; |
---|
3349 | |
---|
3350 | /* Check the PCI latency value. On the 3c590 series the latency timer |
---|
3351 | must be set to the maximum value to avoid data corruption that occurs |
---|
3352 | when the timer expires during a transfer. This bug exists the Vortex |
---|
3353 | chip only. */ |
---|
3354 | #if defined(__i386__) |
---|
3355 | pci_read_config_byte(pbus, pdev, pfun, 0x0d, &pci_latency); |
---|
3356 | #endif |
---|
3357 | #if defined(__PPC__) |
---|
3358 | pci_read_config_byte(pbus,pdev,pfun, PCI_LATENCY_TIMER, &pci_latency); |
---|
3359 | #endif |
---|
3360 | if (pci_latency < new_latency) |
---|
3361 | { |
---|
3362 | printk("etherlink : unit elnk%d Overriding PCI latency, timer (CFLT) setting of %d, new value is %d.\n", sc->xl_unit, pci_latency, new_latency ); |
---|
3363 | #if defined(__i386__) |
---|
3364 | pci_write_config_byte(pbus, pdev, pfun, 0x0d, new_latency); |
---|
3365 | #endif |
---|
3366 | #if defined(__PPC__) |
---|
3367 | pci_write_config_byte(pbus,pdev,pfun, PCI_LATENCY_TIMER, new_latency); |
---|
3368 | #endif |
---|
3369 | } |
---|
3370 | } |
---|
3371 | |
---|
3372 | /* Reset the adapter. */ |
---|
3373 | xl_reset(sc); |
---|
3374 | |
---|
3375 | |
---|
3376 | { |
---|
3377 | u_int16_t xcvr[2]; |
---|
3378 | u_char eaddr[ETHER_ADDR_LEN]; |
---|
3379 | |
---|
3380 | sc->xl_flags = 0; |
---|
3381 | if (sc->deviceID == TC_DEVICEID_HURRICANE_555) |
---|
3382 | sc->xl_flags |= XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_PHYOK; |
---|
3383 | if (sc->deviceID == TC_DEVICEID_HURRICANE_556 || |
---|
3384 | sc->deviceID == TC_DEVICEID_HURRICANE_556B) |
---|
3385 | sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | |
---|
3386 | XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET | |
---|
3387 | XL_FLAG_INVERT_LED_PWR | XL_FLAG_INVERT_MII_PWR; |
---|
3388 | if (sc->deviceID == TC_DEVICEID_HURRICANE_555 || |
---|
3389 | sc->deviceID == TC_DEVICEID_HURRICANE_556) |
---|
3390 | sc->xl_flags |= XL_FLAG_8BITROM; |
---|
3391 | if (sc->deviceID == TC_DEVICEID_HURRICANE_556B) |
---|
3392 | sc->xl_flags |= XL_FLAG_NO_XCVR_PWR; |
---|
3393 | |
---|
3394 | if (sc->deviceID == TC_DEVICEID_HURRICANE_575A || |
---|
3395 | sc->deviceID == TC_DEVICEID_HURRICANE_575B || |
---|
3396 | sc->deviceID == TC_DEVICEID_HURRICANE_575C || |
---|
3397 | sc->deviceID == TC_DEVICEID_HURRICANE_656B || |
---|
3398 | sc->deviceID == TC_DEVICEID_TORNADO_656C) |
---|
3399 | sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | |
---|
3400 | XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM; |
---|
3401 | if (sc->deviceID == TC_DEVICEID_HURRICANE_656) |
---|
3402 | sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK; |
---|
3403 | if (sc->deviceID == TC_DEVICEID_HURRICANE_575B) |
---|
3404 | sc->xl_flags |= XL_FLAG_INVERT_LED_PWR; |
---|
3405 | if (sc->deviceID == TC_DEVICEID_HURRICANE_575C) |
---|
3406 | sc->xl_flags |= XL_FLAG_INVERT_MII_PWR; |
---|
3407 | if (sc->deviceID == TC_DEVICEID_TORNADO_656C) |
---|
3408 | sc->xl_flags |= XL_FLAG_INVERT_MII_PWR; |
---|
3409 | if (sc->deviceID == TC_DEVICEID_HURRICANE_656 || |
---|
3410 | sc->deviceID == TC_DEVICEID_HURRICANE_656B) |
---|
3411 | sc->xl_flags |= XL_FLAG_INVERT_MII_PWR | |
---|
3412 | XL_FLAG_INVERT_LED_PWR; |
---|
3413 | if (sc->deviceID == TC_DEVICEID_TORNADO_10_100BT_920B) |
---|
3414 | sc->xl_flags |= XL_FLAG_PHYOK; |
---|
3415 | |
---|
3416 | |
---|
3417 | if (config->hardware_address) |
---|
3418 | { |
---|
3419 | memcpy(sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN); |
---|
3420 | } |
---|
3421 | else |
---|
3422 | { |
---|
3423 | if (xl_read_eeprom(sc, (caddr_t)&eaddr, XL_EE_OEM_ADR0, 3, 1)) |
---|
3424 | { |
---|
3425 | printk("etherlink : unit elnk%d Failed to read station address\n", sc->xl_unit ); |
---|
3426 | return 0; |
---|
3427 | } |
---|
3428 | memcpy((char *)&sc->arpcom.ac_enaddr, eaddr, ETHER_ADDR_LEN); |
---|
3429 | } |
---|
3430 | |
---|
3431 | /* |
---|
3432 | * Figure out the card type. 3c905B adapters have the |
---|
3433 | * 'supportsNoTxLength' bit set in the capabilities |
---|
3434 | * word in the EEPROM. |
---|
3435 | */ |
---|
3436 | xl_read_eeprom(sc, (caddr_t)&sc->xl_caps, XL_EE_CAPS, 1, 0); |
---|
3437 | if (sc->xl_caps & XL_CAPS_NO_TXLENGTH) |
---|
3438 | sc->xl_type = XL_TYPE_905B; |
---|
3439 | else |
---|
3440 | sc->xl_type = XL_TYPE_90X; |
---|
3441 | |
---|
3442 | |
---|
3443 | /* |
---|
3444 | * Now we have to see what sort of media we have. |
---|
3445 | * This includes probing for an MII interace and a |
---|
3446 | * possible PHY. |
---|
3447 | */ |
---|
3448 | XL_SEL_WIN(3); |
---|
3449 | sc->xl_media = CSR_READ_2(sc, XL_W3_MEDIA_OPT); |
---|
3450 | |
---|
3451 | xl_read_eeprom(sc, (char *)&xcvr, XL_EE_ICFG_0, 2, 0); |
---|
3452 | sc->xl_xcvr = xcvr[0] | xcvr[1] << 16; |
---|
3453 | sc->xl_xcvr &= XL_ICFG_CONNECTOR_MASK; |
---|
3454 | sc->xl_xcvr >>= XL_ICFG_CONNECTOR_BITS; |
---|
3455 | |
---|
3456 | #if 0 |
---|
3457 | printk("etherlink : unit elnk%d EEPROM set xcvr to 0x%x\n", sc->xl_unit, sc->xl_xcvr); |
---|
3458 | #endif |
---|
3459 | |
---|
3460 | { |
---|
3461 | char msg[255]; |
---|
3462 | int i; |
---|
3463 | |
---|
3464 | struct _availmedia |
---|
3465 | { |
---|
3466 | int bit; |
---|
3467 | char *name; |
---|
3468 | } _am[]= {{ XL_MEDIAOPT_BT4, "100BaseT4" }, |
---|
3469 | { XL_MEDIAOPT_BTX, "100BaseTX" }, |
---|
3470 | { XL_MEDIAOPT_BFX, "100BaseFX" }, |
---|
3471 | { XL_MEDIAOPT_BT, "10BaseT" }, |
---|
3472 | { XL_MEDIAOPT_BNC, "10Base2" }, |
---|
3473 | { XL_MEDIAOPT_AUI, "10mbps AUI"}, |
---|
3474 | { XL_MEDIAOPT_MII, "MII"}, |
---|
3475 | { 0, NULL }}; |
---|
3476 | |
---|
3477 | msg[0]= 0; |
---|
3478 | for( i=0; _am[i].bit; i++) |
---|
3479 | { |
---|
3480 | if( sc->xl_media & _am[i].bit ) |
---|
3481 | sprintf( &msg[strlen(msg)], ",%s", _am[i].name ); |
---|
3482 | } |
---|
3483 | if( !strlen(msg) ) strcpy( &msg[1], "<no media bits>"); |
---|
3484 | |
---|
3485 | printk("etherlink : unit elnk%d available media : %s\n", sc->xl_unit, &msg[1]); |
---|
3486 | } |
---|
3487 | |
---|
3488 | XL_SEL_WIN(7); |
---|
3489 | } |
---|
3490 | |
---|
3491 | |
---|
3492 | |
---|
3493 | /* |
---|
3494 | * Set up network interface |
---|
3495 | */ |
---|
3496 | ifp->if_softc = sc; |
---|
3497 | ifp->if_name = unitName; |
---|
3498 | ifp->if_unit = sc->xl_unit; |
---|
3499 | ifp->if_mtu = mtu; |
---|
3500 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; |
---|
3501 | if (ifp->if_snd.ifq_maxlen == 0) |
---|
3502 | ifp->if_snd.ifq_maxlen = ifqmaxlen; |
---|
3503 | ifp->if_init = elnk_init; |
---|
3504 | ifp->if_start = elnk_start; |
---|
3505 | ifp->if_ioctl = elnk_ioctl; |
---|
3506 | ifp->if_output = ether_output; |
---|
3507 | |
---|
3508 | #if 0 |
---|
3509 | ifp->if_tap = iftap; |
---|
3510 | #endif |
---|
3511 | |
---|
3512 | /* |
---|
3513 | * Attach the interface |
---|
3514 | */ |
---|
3515 | if_attach (ifp); |
---|
3516 | ether_ifattach (ifp); |
---|
3517 | |
---|
3518 | #ifdef ELNK_DEBUG |
---|
3519 | printk( "etherlink : unit elnk%d driver attached\n", sc->xl_unit ); |
---|
3520 | #endif |
---|
3521 | |
---|
3522 | /* |
---|
3523 | * Start driver tasks if this is the first unit initialized |
---|
3524 | */ |
---|
3525 | if (txDaemonTid == 0) |
---|
3526 | { |
---|
3527 | if( rtems_message_queue_create( rtems_build_name('X','L','c','r'), |
---|
3528 | sc->numTxbuffers+1, |
---|
3529 | sizeof(struct TXMD *), |
---|
3530 | RTEMS_FIFO | RTEMS_LOCAL, |
---|
3531 | &chainRecoveryQueue ) != RTEMS_SUCCESSFUL ) |
---|
3532 | { |
---|
3533 | rtems_panic( "etherlink : Unable to create TX buffer recovery queue\n" ); |
---|
3534 | } |
---|
3535 | |
---|
3536 | |
---|
3537 | rxDaemonTid = rtems_bsdnet_newproc( "XLrx", 4096, |
---|
3538 | elnk_rxDaemon, NULL); |
---|
3539 | |
---|
3540 | txDaemonTid = rtems_bsdnet_newproc( "XLtx", 4096, |
---|
3541 | elnk_txDaemon, NULL); |
---|
3542 | #ifdef ELNK_DEBUG |
---|
3543 | printk( "etherlink : driver tasks created\n" ); |
---|
3544 | #endif |
---|
3545 | } |
---|
3546 | |
---|
3547 | return 1; |
---|
3548 | }; |
---|
3549 | |
---|
3550 | #endif /* ELNK_SUPPORTED */ |
---|
3551 | |
---|
3552 | /* eof */ |
---|