1 | /* |
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2 | ------------------------------------------------------------------------ |
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3 | cs8900.h,v 1.3 2002/09/07 23:09:47 joel Exp |
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4 | ------------------------------------------------------------------------ |
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5 | |
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6 | Copyright Cybertec Pty Ltd, 2000 |
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7 | All rights reserved Cybertec Pty Ltd, 2000 |
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8 | |
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9 | Port to the DIMM PC copyright (c) 2004 Angelo Fraietta |
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10 | This project has been assisted by the Commonwealth Government |
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11 | through the Australia Council, its arts funding and advisory body. |
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12 | |
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13 | COPYRIGHT (c) 1989-1998. |
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14 | On-Line Applications Research Corporation (OAR). |
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15 | |
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16 | The license and distribution terms for this file may be |
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17 | found in the file LICENSE in this distribution or at |
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18 | http://www.rtems.com/license/LICENSE. |
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19 | |
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20 | ------------------------------------------------------------------------ |
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21 | |
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22 | CS8900 RTEMS driver. |
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23 | |
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24 | This is a generic driver that requires a BSP backend. The BSP backend |
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25 | provides the glue to the specific bus for the target hardware. It has |
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26 | been tested with Coldfire processors, and the PC. These targets have |
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27 | completely different bus, byte order and interrupt structures. |
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28 | |
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29 | An example BSP backend is provided in the pci386 BSP. |
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30 | |
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31 | The BSP provides the following functions: |
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32 | |
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33 | cs8900_io_set_reg |
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34 | cs8900_io_get_reg |
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35 | cs8900_mem_set_reg |
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36 | cs8900_mem_get_reg |
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37 | cs8900_put_data_block |
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38 | cs8900_get_data_block |
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39 | cs8900_tx_load |
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40 | cs8900_attach_interrupt |
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41 | cs8900_detach_interrupt |
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42 | |
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43 | The header file provides documentation for these functions. There |
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44 | are four types of functions. |
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45 | |
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46 | The I/O set/get functions access the CS8900 I/O registers via the |
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47 | I/O Mode. For example on a PC with an ISA bus you would use the |
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48 | IA32 in/out port instructions. The cs8900_device structure passed |
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49 | to these functions provide these functions with the I/O base |
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50 | address. The BSP must provide these functions. |
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51 | |
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52 | The Memory set/get functions access the CS8900 internal registers |
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53 | and frame buffers directly from a 4K byte block of host memory. |
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54 | Memory mode provides a faster access to the CS8900. The cs8900_device |
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55 | structure passed to these functions provides the memory base |
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56 | address. The BSP needs to provide these functions but they do not |
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57 | need to be implemented if the mem_base field is set to 0. The |
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58 | driver will use I/O mode only. |
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59 | |
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60 | The Block transfer functions are used to read or write a block |
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61 | of memory from the CS8900. This saves the driver making a number |
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62 | of small calls. The BSP driver must know if I/O or Memory mode |
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63 | can be used. |
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64 | |
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65 | The final group of functions is to handle interrupts. The BSP |
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66 | must take care of save and restoring any interrupt state |
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67 | information. |
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68 | |
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69 | The BSP declares a 'cs8900_device' structure for each device being |
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70 | attached to the networking stack. It also creates a |
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71 | 'struct rtems_bsdnet_ifconfig' which is used to attach the interface |
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72 | to the networking stack. The following code declares the BSD config: |
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73 | |
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74 | static cs8900_device cs8900; |
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75 | |
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76 | static struct rtems_bsdnet_ifconfig cs8900_ifconfig = |
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77 | { |
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78 | "cs0", |
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79 | cs8900_driver_attach, |
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80 | NULL, |
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81 | NULL, |
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82 | NULL, |
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83 | NULL, |
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84 | 0, |
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85 | 0, |
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86 | 0, |
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87 | 0, |
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88 | 0, |
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89 | 0, |
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90 | 0, |
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91 | 0 |
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92 | }; |
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93 | |
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94 | The device linked to the BSD config structure with: |
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95 | |
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96 | cs8900_ifconfig.drv_ctrl = &cs8900; |
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97 | |
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98 | If you have a specific hardware address you should point the BSD |
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99 | config structure to that address. If you do not the driver will read |
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100 | the MAC address from the CS8900. This assumes the CS8900 has read |
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101 | the address from an external EEPROM or has been setup by a BIOS or |
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102 | boot monitor. For EEPROM less you need to supply the MAC address. |
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103 | |
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104 | Set the I/O and Memory base addresses. If the Memory base address |
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105 | is 0 the driver will use I/O mode only. A typical initialisation |
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106 | looks like: |
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107 | |
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108 | printf ("RTEMS BSD Network initialisation.\n"); |
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109 | rtems_bsdnet_initialize_network (); |
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110 | |
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111 | #define ETHERNET_IO_BASE 0x300 |
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112 | #define ETHERNET_MEM_BASE 0 |
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113 | #define ETHERNET_IRQ_LEVEL 0 |
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114 | |
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115 | cs8900_device *cs = &cs8900; |
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116 | |
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117 | memset (cs, 0, sizeof (cs8900_device)); |
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118 | |
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119 | cs->dev = 0; |
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120 | cs->io_base = ETHERNET_IO_BASE; |
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121 | cs->mem_base = ETHERNET_MEM_BASE; |
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122 | cs->irq_level = ETHERNET_IRQ_LEVEL; |
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123 | cs->rx_queue_size = 30; |
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124 | |
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125 | cs8900_ifconfig.drv_ctrl = &cs8900; |
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126 | |
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127 | printf ("CS8900 initialisation\n"); |
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128 | |
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129 | rtems_bsdnet_attach (&cs8900_ifconfig); |
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130 | |
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131 | flags = IFF_UP; |
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132 | if (rtems_bsdnet_ifconfig (cs8900_ifconfig.name, |
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133 | SIOCSIFFLAGS, |
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134 | &flags) < 0) |
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135 | { |
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136 | printf ("error: can't bring up %s: %s\n", |
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137 | cs8900_ifconfig.name, strerror (errno)); |
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138 | return; |
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139 | } |
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140 | |
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141 | rtems_bsdnet_do_bootp_and_rootfs (); |
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142 | |
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143 | The IRQ level is the one documented in the CS8900 datasheet and below |
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144 | in the CS8900 device structure. You need to map your target IRQ to the |
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145 | CS8900 in the BSP driver. |
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146 | |
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147 | */ |
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148 | |
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149 | #if !defined(_CS8900_H_) |
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150 | #define _CS8900_H_ |
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151 | |
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152 | #include <rtems.h> |
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153 | #include <rtems/error.h> |
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154 | #include <rtems/rtems_bsdnet.h> |
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155 | |
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156 | #include <sys/param.h> |
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157 | #include <sys/mbuf.h> |
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158 | #include <sys/socket.h> |
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159 | #include <sys/sockio.h> |
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160 | |
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161 | #include <net/if.h> |
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162 | |
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163 | #include <netinet/in.h> |
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164 | #include <netinet/if_ether.h> |
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165 | |
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166 | /* #include <target.h> what does this provide? joel to chris */ |
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167 | |
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168 | #define ET_MINLEN 60 |
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169 | |
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170 | /* |
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171 | * CS8900 device register definitions |
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172 | */ |
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173 | |
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174 | /* |
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175 | * Crystal ESIA product id. |
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176 | */ |
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177 | |
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178 | #define CS8900_ESIA_ID (0x630e) |
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179 | |
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180 | /* |
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181 | * IO Registers. |
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182 | */ |
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183 | |
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184 | #define CS8900_IO_RX_TX_DATA_PORT0 (0x0000) |
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185 | #define CS8900_IO_TX_TX_DATA_PORT1 (0x0002) |
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186 | #define CS8900_IO_TxCMD (0x0004) |
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187 | #define CS8900_IO_TxLength (0x0006) |
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188 | #define CS8900_IO_ISQ (0x0008) |
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189 | #define CS8900_IO_PACKET_PAGE_PTR (0x000a) |
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190 | #define CS8900_IO_PP_DATA_PORT0 (0x000c) |
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191 | #define CS8900_IO_PP_DATA_PORT1 (0x000e) |
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192 | |
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193 | /* |
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194 | * Packet Page Registers. |
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195 | */ |
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196 | |
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197 | /* |
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198 | * Bus Interface Registers. |
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199 | */ |
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200 | |
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201 | #define CS8900_PP_PROD_ID (0x0000) |
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202 | #define CS8900_PP_IO_BASE (0x0020) |
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203 | #define CS8900_PP_INT (0x0022) |
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204 | #define CS8900_PP_DMA_CHANNEL (0x0024) |
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205 | #define CS8900_PP_DMA_SOF (0x0026) |
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206 | #define CS8900_PP_DMA_FRM_CNT (0x0028) |
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207 | #define CS8900_PP_DMA_RX_BCNT (0x002a) |
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208 | #define CS8900_PP_MEM_BASE (0x002c) |
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209 | #define CS8900_PP_BPROM_BASE (0x0030) |
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210 | #define CS8900_PP_BPROM_AMASK (0x0034) |
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211 | #define CS8900_PP_EEPROM_CMD (0x0040) |
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212 | #define CS8900_PP_EEPROM_DATA (0x0042) |
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213 | #define CS8900_PP_RX_FRAME_BCNT (0x0050) |
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214 | |
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215 | /* |
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216 | * Configuration and Control Registers. |
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217 | */ |
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218 | |
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219 | #define CS8900_PP_RxCFG (0x0102) |
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220 | #define CS8900_PP_RxCTL (0x0104) |
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221 | #define CS8900_PP_TxCFG (0x0106) |
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222 | #define CS8900_PP_TxCMD_READ (0x0108) |
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223 | #define CS8900_PP_BufCFG (0x010a) |
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224 | #define CS8900_PP_LineCFG (0x0112) |
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225 | #define CS8900_PP_SelfCTL (0x0114) |
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226 | #define CS8900_PP_BusCTL (0x0116) |
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227 | #define CS8900_PP_TestCTL (0x0118) |
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228 | |
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229 | /* |
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230 | * Status and Event Registers. |
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231 | */ |
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232 | |
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233 | #define CS8900_PP_ISQ (0x0120) |
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234 | #define CS8900_PP_RxEvent (0x0124) |
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235 | #define CS8900_PP_TxEvent (0x0128) |
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236 | #define CS8900_PP_BufEvent (0x012c) |
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237 | #define CS8900_PP_RxMISS (0x0130) |
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238 | #define CS8900_PP_TxCol (0x0132) |
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239 | #define CS8900_PP_LineST (0x0134) |
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240 | #define CS8900_PP_SelfST (0x0136) |
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241 | #define CS8900_PP_BusST (0x0138) |
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242 | #define CS8900_PP_TDR (0x013c) |
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243 | |
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244 | /* |
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245 | * Initiate Transmit Registers. |
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246 | */ |
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247 | |
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248 | #define CS8900_PP_TxCMD (0x0144) |
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249 | #define CS8900_PP_TxLength (0x0146) |
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250 | |
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251 | /* |
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252 | * Address Filter Registers. |
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253 | */ |
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254 | |
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255 | #define CS8900_PP_LAF (0x0150) |
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256 | #define CS8900_PP_IA (0x0158) |
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257 | |
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258 | /* |
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259 | * Frame Location. |
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260 | */ |
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261 | |
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262 | #define CS8900_PP_RxStatus (0x0400) |
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263 | #define CS8900_PP_RxLength (0x0402) |
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264 | #define CS8900_PP_RxFrameLoc (0x0404) |
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265 | #define CS8900_PP_TxFrameLoc (0x0a00) |
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266 | |
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267 | /* |
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268 | * Bit Definitions of Registers. |
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269 | */ |
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270 | |
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271 | /* |
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272 | * IO Packet Page Pointer. |
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273 | */ |
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274 | |
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275 | #define CS8900_PPP_AUTO_INCREMENT (0x8000) |
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276 | |
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277 | /* |
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278 | * Reg 3. Receiver Configuration. |
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279 | */ |
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280 | |
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281 | #define CS8900_RX_CONFIG_SKIP_1 (1 << 6) |
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282 | #define CS8900_RX_CONFIG_STREAM_ENABLE (1 << 7) |
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283 | #define CS8900_RX_CONFIG_RX_OK (1 << 8) |
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284 | #define CS8900_RX_CONFIG_RX_DMA (1 << 9) |
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285 | #define CS8900_RX_CONFIG_RX_AUTO_DMA (1 << 10) |
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286 | #define CS8900_RX_CONFIG_BUFFER_CRC (1 << 11) |
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287 | #define CS8900_RX_CONFIG_CRC_ERROR (1 << 12) |
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288 | #define CS8900_RX_CONFIG_RUNT (1 << 13) |
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289 | #define CS8900_RX_CONFIG_EXTRA_DATA (1 << 14) |
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290 | |
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291 | /* |
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292 | * Reg 4. Receiver Event. |
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293 | */ |
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294 | |
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295 | #define CS8900_RX_EVENT_HASH_IA_MATCH (1 << 6) |
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296 | #define CS8900_RX_EVENT_DRIBBLE_BITS (1 << 7) |
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297 | #define CS8900_RX_EVENT_RX_OK (1 << 8) |
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298 | #define CS8900_RX_EVENT_HASHED (1 << 9) |
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299 | #define CS8900_RX_EVENT_IA (1 << 10) |
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300 | #define CS8900_RX_EVENT_BROADCAST (1 << 11) |
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301 | #define CS8900_RX_EVENT_CRC_ERROR (1 << 12) |
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302 | #define CS8900_RX_EVENT_RUNT (1 << 13) |
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303 | #define CS8900_RX_EVENT_EXTRA_DATA (1 << 14) |
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304 | |
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305 | /* |
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306 | * Reg 5. Receiver Control. |
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307 | */ |
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308 | |
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309 | #define CS8900_RX_CTRL_HASH_IA_MATCH (1 << 6) |
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310 | #define CS8900_RX_CTRL_PROMISCUOUS (1 << 7) |
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311 | #define CS8900_RX_CTRL_RX_OK (1 << 8) |
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312 | #define CS8900_RX_CTRL_MULTICAST (1 << 9) |
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313 | #define CS8900_RX_CTRL_INDIVIDUAL (1 << 10) |
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314 | #define CS8900_RX_CTRL_BROADCAST (1 << 11) |
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315 | #define CS8900_RX_CTRL_CRC_ERROR (1 << 12) |
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316 | #define CS8900_RX_CTRL_RUNT (1 << 13) |
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317 | #define CS8900_RX_CTRL_EXTRA_DATA (1 << 14) |
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318 | |
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319 | /* |
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320 | * Reg 7. Transmit Configuration. |
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321 | */ |
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322 | |
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323 | #define CS8900_TX_CONFIG_LOSS_OF_CARRIER (1 << 6) |
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324 | #define CS8900_TX_CONFIG_SQ_ERROR (1 << 7) |
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325 | #define CS8900_TX_CONFIG_TX_OK (1 << 8) |
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326 | #define CS8900_TX_CONFIG_OUT_OF_WINDOW (1 << 9) |
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327 | #define CS8900_TX_CONFIG_JABBER (1 << 10) |
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328 | #define CS8900_TX_CONFIG_ANY_COLLISION (1 << 11) |
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329 | #define CS8900_TX_CONFIG_16_COLLISION (1 << 15) |
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330 | |
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331 | /* |
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332 | * Reg 8. Transmit Event. |
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333 | */ |
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334 | |
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335 | #define CS8900_TX_EVENT_LOSS_OF_CARRIER (1 << 6) |
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336 | #define CS8900_TX_EVENT_SQ_ERROR (1 << 7) |
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337 | #define CS8900_TX_EVENT_TX_OK (1 << 8) |
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338 | #define CS8900_TX_EVENT_OUT_OF_WINDOW (1 << 9) |
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339 | #define CS8900_TX_EVENT_JABBER (1 << 10) |
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340 | #define CS8900_TX_EVENT_16_COLLISIONS (1 << 15) |
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341 | |
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342 | /* |
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343 | * Reg 9. Transmit Command Status. |
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344 | */ |
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345 | |
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346 | #define CS8900_TX_CMD_STATUS_TX_START_5 (0 << 6) |
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347 | #define CS8900_TX_CMD_STATUS_TX_START_381 (1 << 6) |
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348 | #define CS8900_TX_CMD_STATUS_TX_START_1021 (2 << 6) |
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349 | #define CS8900_TX_CMD_STATUS_TX_START_ENTIRE (3 << 6) |
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350 | #define CS8900_TX_CMD_STATUS_FORCE (1 << 8) |
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351 | #define CS8900_TX_CMD_STATUS_ONE_COLLISION (1 << 9) |
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352 | #define CS8900_TX_CMD_STATUS_INHIBIT_CRC (1 << 12) |
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353 | #define CS8900_TX_CMD_STATUS_TX_PAD_DISABLED (1 << 13) |
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354 | |
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355 | /* |
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356 | * Reg B. Buffer Configuration. |
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357 | */ |
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358 | |
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359 | #define CS8900_BUFFER_CONFIG_SW_INT (1 << 6) |
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360 | #define CS8900_BUFFER_CONFIG_RX_DMA_DONE (1 << 7) |
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361 | #define CS8900_BUFFER_CONFIG_RDY_FOR_TX (1 << 8) |
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362 | #define CS8900_BUFFER_CONFIG_TX_UNDERRUN (1 << 9) |
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363 | #define CS8900_BUFFER_CONFIG_RX_MISSED (1 << 10) |
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364 | #define CS8900_BUFFER_CONFIG_RX_128_BYTES (1 << 11) |
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365 | #define CS8900_BUFFER_CONFIG_TX_COL_OVF (1 << 12) |
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366 | #define CS8900_BUFFER_CONFIG_RX_MISSED_OVF (1 << 13) |
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367 | #define CS8900_BUFFER_CONFIG_RX_DEST_MATCH (1 << 15) |
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368 | |
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369 | /* |
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370 | * Reg C. Buffer Event. |
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371 | */ |
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372 | |
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373 | #define CS8900_BUFFER_EVENT_SW_INT (1 << 6) |
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374 | #define CS8900_BUFFER_EVENT_RX_DMA_DONE (1 << 7) |
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375 | #define CS8900_BUFFER_EVENT_RDY_FOR_TX (1 << 8) |
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376 | #define CS8900_BUFFER_EVENT_TX_UNDERRUN (1 << 9) |
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377 | #define CS8900_BUFFER_EVENT_RX_MISSED (1 << 10) |
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378 | #define CS8900_BUFFER_EVENT_RX_128_BYTES (1 << 11) |
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379 | #define CS8900_BUFFER_EVENT_RX_DEST_MATCH (1 << 15) |
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380 | |
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381 | /* |
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382 | * Reg 13. Line Control. |
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383 | */ |
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384 | |
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385 | #define CS8900_LINE_CTRL_RX_ON (1 << 6) |
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386 | #define CS8900_LINE_CTRL_TX_ON (1 << 7) |
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387 | #define CS8900_LINE_CTRL_AUI (1 << 8) |
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388 | #define CS8900_LINE_CTRL_10BASET (0 << 9) |
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389 | #define CS8900_LINE_CTRL_AUTO_AUI_10BASET (1 << 9) |
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390 | #define CS8900_LINE_CTRL_MOD_BACKOFF (1 << 11) |
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391 | #define CS8900_LINE_CTRL_POLARITY_DISABLED (1 << 12) |
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392 | #define CS8900_LINE_CTRL_2_PART_DEF_DISABLED (1 << 13) |
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393 | #define CS8900_LINE_CTRL_LO_RX_SQUELCH (1 << 14) |
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394 | |
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395 | /* |
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396 | * Reg 14. Line Status. |
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397 | */ |
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398 | |
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399 | #define CS8900_LINE_STATUS_LINK_OK (1 << 7) |
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400 | #define CS8900_LINE_STATUS_AUI (1 << 8) |
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401 | #define CS8900_LINE_STATUS_10_BASE_T (1 << 9) |
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402 | #define CS8900_LINE_STATUS_POLARITY_OK (1 << 12) |
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403 | #define CS8900_LINE_STATUS_CRS (1 << 14) |
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404 | |
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405 | /* |
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406 | * Reg 15. Self Control. |
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407 | */ |
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408 | |
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409 | #define CS8900_SELF_CTRL_RESET (1 << 6) |
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410 | #define CS8900_SELF_CTRL_SW_SUSPEND (1 << 8) |
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411 | #define CS8900_SELF_CTRL_HW_SLEEP (1 << 9) |
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412 | #define CS8900_SELF_CTRL_HW_STANDBY (1 << 10) |
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413 | #define CS8900_SELF_CTRL_HC0E (1 << 12) |
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414 | #define CS8900_SELF_CTRL_HC1E (1 << 13) |
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415 | #define CS8900_SELF_CTRL_HCB0 (1 << 14) |
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416 | #define CS8900_SELF_CTRL_HCB1 (1 << 15) |
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417 | |
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418 | /* |
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419 | * Reg 16. Self Status. |
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420 | */ |
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421 | |
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422 | #define CS8900_SELF_STATUS_3_3_V (1 << 6) |
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423 | #define CS8900_SELF_STATUS_INITD (1 << 7) |
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424 | #define CS8900_SELF_STATUS_SIBUST (1 << 8) |
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425 | #define CS8900_SELF_STATUS_EEPROM_PRESENT (1 << 9) |
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426 | #define CS8900_SELF_STATUS_EEPROM_OK (1 << 10) |
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427 | #define CS8900_SELF_STATUS_EL_PRESENT (1 << 11) |
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428 | #define CS8900_SELF_STATUS_EE_SIZE (1 << 12) |
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429 | |
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430 | /* |
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431 | * Reg 17. Bus Control. |
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432 | */ |
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433 | |
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434 | #define CS8900_BUS_CTRL_RESET_RX_DMA (1 << 6) |
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435 | #define CS8900_BUS_CTRL_USE_SA (1 << 9) |
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436 | #define CS8900_BUS_CTRL_MEMORY_ENABLE (1 << 10) |
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437 | #define CS8900_BUS_CTRL_DMA_BURST (1 << 11) |
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438 | #define CS8900_BUS_CTRL_IOCHRDYE (1 << 12) |
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439 | #define CS8900_BUS_CTRL_RX_DMA_SIZE (1 << 13) |
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440 | #define CS8900_BUS_CTRL_ENABLE_INT (1 << 15) |
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441 | |
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442 | /* |
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443 | * Reg 18. Bus Status. |
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444 | */ |
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445 | |
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446 | #define CS8900_BUS_STATUS_TX_BID_ERROR (1 << 7) |
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447 | #define CS8900_BUS_STATUS_RDY_FOR_TX_NOW (1 << 8) |
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448 | |
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449 | /* |
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450 | * Trace for debugging the isq processing. Define to 1 to enable. |
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451 | */ |
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452 | #define CS8900_TRACE 0 |
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453 | #define CS8900_TRACE_SIZE (400) |
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454 | |
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455 | /* |
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456 | * The default receive queue size. If the BSP sets this field to |
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457 | * 0 this default is used. |
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458 | */ |
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459 | #define CS8900_RX_QUEUE_SIZE (30) |
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460 | |
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461 | /* |
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462 | * Stats, more for debugging than anything else. |
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463 | */ |
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464 | |
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465 | typedef struct |
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466 | { |
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467 | unsigned long rx_packets; /* total packets received */ |
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468 | unsigned long tx_packets; /* total packets transmitted */ |
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469 | unsigned long rx_bytes; /* total bytes received */ |
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470 | unsigned long tx_bytes; /* total bytes transmitted */ |
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471 | unsigned long rx_interrupts; /* total number of rx interrupts */ |
---|
472 | unsigned long tx_interrupts; /* total number of tx interrupts */ |
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473 | |
---|
474 | /* detailed rx errors: */ |
---|
475 | unsigned long rx_dropped; /* no mbufs in queue */ |
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476 | unsigned long rx_no_mbufs; /* no mbufs */ |
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477 | unsigned long rx_no_clusters; /* no clusters */ |
---|
478 | unsigned long rx_oversize_errors; |
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479 | unsigned long rx_crc_errors; /* recved pkt with crc error */ |
---|
480 | unsigned long rx_runt_errors; |
---|
481 | unsigned long rx_missed_errors; /* receiver missed packet */ |
---|
482 | |
---|
483 | /* detailed tx errors */ |
---|
484 | unsigned long tx_ok; |
---|
485 | unsigned long tx_collisions; |
---|
486 | unsigned long tx_bid_errors; |
---|
487 | unsigned long tx_wait_for_rdy4tx; |
---|
488 | unsigned long tx_rdy4tx; |
---|
489 | unsigned long tx_underrun_errors; |
---|
490 | unsigned long tx_dropped; |
---|
491 | unsigned long tx_resends; |
---|
492 | |
---|
493 | /* interrupt watch dog */ |
---|
494 | unsigned long int_swint_req; |
---|
495 | unsigned long int_swint_res; |
---|
496 | unsigned long int_lockup; |
---|
497 | |
---|
498 | unsigned long interrupts; |
---|
499 | |
---|
500 | } eth_statistics; |
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501 | |
---|
502 | /* |
---|
503 | * CS8900 device structure |
---|
504 | */ |
---|
505 | |
---|
506 | typedef struct |
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507 | { |
---|
508 | /* |
---|
509 | * Device number. |
---|
510 | */ |
---|
511 | |
---|
512 | int dev; |
---|
513 | |
---|
514 | /* |
---|
515 | * Memory base addresses. Making mem_base 0 forces the |
---|
516 | * driver to perform only I/O space accesses. |
---|
517 | */ |
---|
518 | |
---|
519 | unsigned long io_base; |
---|
520 | unsigned long mem_base; |
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521 | |
---|
522 | /* |
---|
523 | * The IRQ level as defined in the datasheet for the CS8900. |
---|
524 | * |
---|
525 | * ISA BUS Pin Value |
---|
526 | * IRQ10 INTRQ0 0 |
---|
527 | * IRQ11 INTRQ1 1 |
---|
528 | * IRQ12 INTRQ2 2 |
---|
529 | * IRQ5 INTRQ3 3 |
---|
530 | */ |
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531 | |
---|
532 | int irq_level; |
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533 | |
---|
534 | /* |
---|
535 | * The MAC address. |
---|
536 | */ |
---|
537 | |
---|
538 | unsigned char mac_address[6]; |
---|
539 | |
---|
540 | /* |
---|
541 | * The bsdnet information structure. |
---|
542 | */ |
---|
543 | |
---|
544 | struct arpcom arpcom; |
---|
545 | |
---|
546 | /* |
---|
547 | * Driver state and resources. |
---|
548 | */ |
---|
549 | |
---|
550 | int accept_bcast; |
---|
551 | int tx_active; |
---|
552 | |
---|
553 | rtems_id rx_task; |
---|
554 | rtems_id tx_task; |
---|
555 | |
---|
556 | /* |
---|
557 | * The queues. FIXME : these should be changed to be mbuf lists. |
---|
558 | */ |
---|
559 | |
---|
560 | struct mbuf *rx_ready_head; |
---|
561 | struct mbuf *rx_ready_tail; |
---|
562 | int rx_ready_len; |
---|
563 | |
---|
564 | struct mbuf *rx_loaded_head; |
---|
565 | struct mbuf *rx_loaded_tail; |
---|
566 | int rx_loaded_len; |
---|
567 | |
---|
568 | /* |
---|
569 | * Number of mbufs queued for the interrupt handler to |
---|
570 | * loop reading. |
---|
571 | */ |
---|
572 | |
---|
573 | int rx_queue_size; |
---|
574 | |
---|
575 | #if CS8900_TRACE |
---|
576 | unsigned short trace_key[CS8900_TRACE_SIZE]; |
---|
577 | unsigned long trace_var[CS8900_TRACE_SIZE]; |
---|
578 | unsigned long trace_time[CS8900_TRACE_SIZE]; |
---|
579 | int trace_in; |
---|
580 | #endif |
---|
581 | |
---|
582 | /** |
---|
583 | * Standard(!) ethernet statistics |
---|
584 | */ |
---|
585 | |
---|
586 | eth_statistics eth_stats; |
---|
587 | |
---|
588 | } cs8900_device; |
---|
589 | |
---|
590 | /* |
---|
591 | * Link active returns the state of the PHY. |
---|
592 | * |
---|
593 | * @param cs Pointer to the device structure. |
---|
594 | */ |
---|
595 | |
---|
596 | int cs8900_link_active (cs8900_device *cs); |
---|
597 | |
---|
598 | /** |
---|
599 | * The RTEMS network stack driver attach function that is loaded into the |
---|
600 | * the rtems_bsdnet_ifconfig struct. The network stack will call this |
---|
601 | * function when attaching the driver. The BSP must load the 'drv_ctrl' |
---|
602 | * field of the structure before calling the 'rtems_bsdnet_attach' |
---|
603 | * function. |
---|
604 | * |
---|
605 | * @param config The RTEMS BSD config structure. |
---|
606 | * |
---|
607 | * @param attaching True is the stack is attaching the interface. |
---|
608 | * |
---|
609 | * @retval int Set to 1 if the device has attached. |
---|
610 | */ |
---|
611 | |
---|
612 | int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config, |
---|
613 | int attaching); |
---|
614 | |
---|
615 | /** |
---|
616 | * The BSP specific interrupt wrapper calls this function when a device |
---|
617 | * interrupt occurs. |
---|
618 | * |
---|
619 | * @param v The RTEMS vector number that generated the interrupt. |
---|
620 | * |
---|
621 | * @param cs Pointer to the device structure passed to the interrupt |
---|
622 | * catch function provided by the BSP. |
---|
623 | * |
---|
624 | * @retval rtems_isr The standard ISR return type. |
---|
625 | */ |
---|
626 | |
---|
627 | rtems_isr cs8900_interrupt (rtems_vector_number v, void *cs); |
---|
628 | |
---|
629 | /** |
---|
630 | * Get the MAC address for the interface. |
---|
631 | * |
---|
632 | * @param cs Pointer to the device structure. |
---|
633 | * |
---|
634 | * @param mac_address Pointer to the memory to load the MAC address. This |
---|
635 | * is a 6 byte buffer so do not exceeed the bounds. |
---|
636 | */ |
---|
637 | |
---|
638 | void cs8900_get_mac_addr (cs8900_device *cs, unsigned char *mac_address); |
---|
639 | |
---|
640 | /** |
---|
641 | * Catch the device interrupt. When the interrupt is called call the |
---|
642 | * function 'cs8900_interrupt'. |
---|
643 | * |
---|
644 | * BSP to provide this function. |
---|
645 | * |
---|
646 | * @param cs Pointer to the device structure. |
---|
647 | */ |
---|
648 | |
---|
649 | void cs8900_attach_interrupt (cs8900_device *cs); |
---|
650 | |
---|
651 | /** |
---|
652 | * Detach the device interrupt. |
---|
653 | * |
---|
654 | * BSP to provide this function. |
---|
655 | * |
---|
656 | * @param cs Pointer to the device structure. |
---|
657 | */ |
---|
658 | |
---|
659 | void cs8900_detach_interrupt (cs8900_device *cs); |
---|
660 | |
---|
661 | /** |
---|
662 | * Write to an IO space register. |
---|
663 | * |
---|
664 | * BSP to provide this function. |
---|
665 | * |
---|
666 | * @param cs Pointer to the device structure. |
---|
667 | * |
---|
668 | * @param reg Register offset from the IO base. |
---|
669 | * |
---|
670 | * @param data The data to be written to the register. |
---|
671 | */ |
---|
672 | |
---|
673 | void cs8900_io_set_reg (cs8900_device *cs, |
---|
674 | unsigned short reg, unsigned short data); |
---|
675 | |
---|
676 | /** |
---|
677 | * Read an IO space register. |
---|
678 | * |
---|
679 | * BSP to provide this function. |
---|
680 | * |
---|
681 | * @param cs Pointer to the device structure. |
---|
682 | * |
---|
683 | * @param reg Register offset from the IO base. |
---|
684 | * |
---|
685 | * @retval unsigned short The register data. |
---|
686 | */ |
---|
687 | |
---|
688 | unsigned short cs8900_io_get_reg (cs8900_device *cs, unsigned short reg); |
---|
689 | |
---|
690 | /** |
---|
691 | * Write to a memory space register. Will only be called is the mem_base |
---|
692 | * field of the 'cs' struct is not 0. |
---|
693 | * |
---|
694 | * BSP to provide this function. |
---|
695 | * |
---|
696 | * @param cs Pointer to the device structure. |
---|
697 | * |
---|
698 | * @param reg Register offset from the memory base. |
---|
699 | * |
---|
700 | * @param data The data to be written to the register. |
---|
701 | */ |
---|
702 | |
---|
703 | void cs8900_mem_set_reg (cs8900_device *cs, |
---|
704 | unsigned long reg, unsigned short data); |
---|
705 | |
---|
706 | /** |
---|
707 | * Read a memory space register. Will only be called is the mem_base |
---|
708 | * field of the 'cs' struct is not 0. |
---|
709 | * |
---|
710 | * BSP to provide this function. |
---|
711 | * |
---|
712 | * @param cs Pointer to the device structure. |
---|
713 | * |
---|
714 | * @param reg Register offset from the IO base. |
---|
715 | * |
---|
716 | * @retval unsigned short The register data. |
---|
717 | */ |
---|
718 | |
---|
719 | unsigned short cs8900_mem_get_reg (cs8900_device *cs, unsigned long reg); |
---|
720 | |
---|
721 | /** |
---|
722 | * Write a block of data to the interface. The BSP codes if this is an IO or |
---|
723 | * memory space write. |
---|
724 | * |
---|
725 | * BSP to provide this function. |
---|
726 | * |
---|
727 | * @param cs Pointer to the device structure. |
---|
728 | * |
---|
729 | * @param len The length of data to write. |
---|
730 | * |
---|
731 | * @param data Pointer to the data to be written. |
---|
732 | */ |
---|
733 | |
---|
734 | void cs8900_put_data_block (cs8900_device *cs, int len, unsigned char *data); |
---|
735 | |
---|
736 | /** |
---|
737 | * Read a block of data from the interface. The BSP codes if this is an IO or |
---|
738 | * memory space write. The read must not be longer than the MTU size. |
---|
739 | * |
---|
740 | * BSP to provide this function. |
---|
741 | * |
---|
742 | * @param cs Pointer to the device structure. |
---|
743 | * |
---|
744 | * @param data Pointer to the buffer where the data is to be written. |
---|
745 | * |
---|
746 | * @retval unsigned short The number of bytes read from the device. |
---|
747 | */ |
---|
748 | |
---|
749 | unsigned short cs8900_get_data_block (cs8900_device *cs, unsigned char *data); |
---|
750 | |
---|
751 | /** |
---|
752 | * Load a mbuf chain to the device ready for tranmission. |
---|
753 | * |
---|
754 | * BSP to provide this function. |
---|
755 | * |
---|
756 | * @param cs Pointer to the device structure. |
---|
757 | * |
---|
758 | * @param m Pointer to the head of an mbuf chain. |
---|
759 | */ |
---|
760 | |
---|
761 | void cs8900_tx_load (cs8900_device *cs, struct mbuf *m); |
---|
762 | |
---|
763 | #endif |
---|