source: rtems/c/src/libchip/network/cs8900.h @ 74172b7d

5
Last change on this file since 74172b7d was c499856, checked in by Chris Johns <chrisj@…>, on 03/20/14 at 21:10:47

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1/*
2  ------------------------------------------------------------------------
3
4  Copyright Cybertec Pty Ltd, 2000
5  All rights reserved Cybertec Pty Ltd, 2000
6
7  Port to the DIMM PC copyright (c) 2004 Angelo Fraietta
8    This project has been assisted by the Commonwealth Government
9    through the Australia Council, its arts funding and advisory body.
10
11  COPYRIGHT (c) 1989-1998.
12  On-Line Applications Research Corporation (OAR).
13
14  The license and distribution terms for this file may be
15  found in the file LICENSE in this distribution or at
16  http://www.rtems.org/license/LICENSE.
17
18  ------------------------------------------------------------------------
19
20  CS8900 RTEMS driver.
21
22  This is a generic driver that requires a BSP backend. The BSP backend
23  provides the glue to the specific bus for the target hardware. It has
24  been tested with Coldfire processors, and the PC. These targets have
25  completely different bus, byte order and interrupt structures.
26
27  An example BSP backend is provided in the pci386 BSP.
28
29  The BSP provides the following functions:
30
31    cs8900_io_set_reg
32    cs8900_io_get_reg
33    cs8900_mem_set_reg
34    cs8900_mem_get_reg
35    cs8900_put_data_block
36    cs8900_get_data_block
37    cs8900_tx_load
38    cs8900_attach_interrupt
39    cs8900_detach_interrupt
40
41  The header file provides documentation for these functions. There
42  are four types of functions.
43
44  The I/O set/get functions access the CS8900 I/O registers via the
45  I/O Mode. For example on a PC with an ISA bus you would use the
46  IA32 in/out port instructions. The cs8900_device structure passed
47  to these functions provide these functions with the I/O base
48  address. The BSP must provide these functions.
49
50  The Memory set/get functions access the CS8900 internal registers
51  and frame buffers directly from a 4K byte block of host memory.
52  Memory mode provides a faster access to the CS8900. The cs8900_device
53  structure passed to these functions provides the memory base
54  address. The BSP needs to provide these functions but they do not
55  need to be implemented if the mem_base field is set to 0. The
56  driver will use I/O mode only.
57
58  The Block transfer functions are used to read or write a block
59  of memory from the CS8900. This saves the driver making a number
60  of small calls. The BSP driver must know if I/O or Memory mode
61  can be used.
62
63  The final group of functions is to handle interrupts. The BSP
64  must take care of save and restoring any interrupt state
65  information.
66
67  The BSP declares a 'cs8900_device' structure for each device being
68  attached to the networking stack. It also creates a
69  'struct rtems_bsdnet_ifconfig' which is used to attach the interface
70  to the networking stack. The following code declares the BSD config:
71
72    static cs8900_device cs8900;
73
74    static struct rtems_bsdnet_ifconfig cs8900_ifconfig =
75     {
76       "cs0",
77       cs8900_driver_attach,
78       NULL,
79       NULL,
80       NULL,
81       NULL,
82       0,
83       0,
84       0,
85       0,
86       0,
87       0,
88       0,
89       0
90     };
91
92   The device linked to the BSD config structure with:
93
94     cs8900_ifconfig.drv_ctrl = &cs8900;
95
96   If you have a specific hardware address you should point the BSD
97   config structure to that address. If you do not the driver will read
98   the MAC address from the CS8900. This assumes the CS8900 has read
99   the address from an external EEPROM or has been setup by a BIOS or
100   boot monitor. For EEPROM less you need to supply the MAC address.
101
102   Set the I/O and Memory base addresses. If the Memory base address
103   is 0 the driver will use I/O mode only. A typical initialisation
104   looks like:
105
106     printf ("RTEMS BSD Network initialisation.\n");
107     rtems_bsdnet_initialize_network ();
108
109     #define ETHERNET_IO_BASE   0x300
110     #define ETHERNET_MEM_BASE  0
111     #define ETHERNET_IRQ_LEVEL 0
112
113     cs8900_device *cs = &cs8900;
114
115     memset (cs, 0, sizeof (cs8900_device));
116
117     cs->dev = 0;
118     cs->io_base = ETHERNET_IO_BASE;
119     cs->mem_base = ETHERNET_MEM_BASE;
120     cs->irq_level = ETHERNET_IRQ_LEVEL;
121     cs->rx_queue_size = 30;
122
123     cs8900_ifconfig.drv_ctrl = &cs8900;
124
125     printf ("CS8900 initialisation\n");
126
127     rtems_bsdnet_attach (&cs8900_ifconfig);
128
129     flags = IFF_UP;
130     if (rtems_bsdnet_ifconfig (cs8900_ifconfig.name,
131                                SIOCSIFFLAGS,
132                                &flags) < 0)
133     {
134       printf ("error: can't bring up %s: %s\n",
135               cs8900_ifconfig.name, strerror (errno));
136       return;
137     }
138
139     rtems_bsdnet_do_bootp_and_rootfs ();
140
141   The IRQ level is the one documented in the CS8900 datasheet and below
142   in the CS8900 device structure. You need to map your target IRQ to the
143   CS8900 in the BSP driver.
144
145 */
146
147#if !defined(_CS8900_H_)
148#define _CS8900_H_
149
150#include <rtems.h>
151#include <rtems/error.h>
152#include <rtems/rtems_bsdnet.h>
153
154#include <sys/param.h>
155#include <sys/mbuf.h>
156#include <sys/socket.h>
157#include <sys/sockio.h>
158
159#include <net/if.h>
160
161#include <netinet/in.h>
162#include <netinet/if_ether.h>
163
164/* #include <target.h> what does this provide? joel to chris */
165
166#define ET_MINLEN 60
167
168/*
169 * CS8900 device register definitions
170 */
171
172/*
173 * Crystal ESIA product id.
174 */
175
176#define CS8900_ESIA_ID             (0x630e)
177
178/*
179 * IO Registers.
180 */
181
182#define CS8900_IO_RX_TX_DATA_PORT0 (0x0000)
183#define CS8900_IO_TX_TX_DATA_PORT1 (0x0002)
184#define CS8900_IO_TxCMD            (0x0004)
185#define CS8900_IO_TxLength         (0x0006)
186#define CS8900_IO_ISQ              (0x0008)
187#define CS8900_IO_PACKET_PAGE_PTR  (0x000a)
188#define CS8900_IO_PP_DATA_PORT0    (0x000c)
189#define CS8900_IO_PP_DATA_PORT1    (0x000e)
190
191/*
192 * Packet Page Registers.
193 */
194
195/*
196 * Bus Interface Registers.
197 */
198
199#define CS8900_PP_PROD_ID          (0x0000)
200#define CS8900_PP_IO_BASE          (0x0020)
201#define CS8900_PP_INT              (0x0022)
202#define CS8900_PP_DMA_CHANNEL      (0x0024)
203#define CS8900_PP_DMA_SOF          (0x0026)
204#define CS8900_PP_DMA_FRM_CNT      (0x0028)
205#define CS8900_PP_DMA_RX_BCNT      (0x002a)
206#define CS8900_PP_MEM_BASE         (0x002c)
207#define CS8900_PP_BPROM_BASE       (0x0030)
208#define CS8900_PP_BPROM_AMASK      (0x0034)
209#define CS8900_PP_EEPROM_CMD       (0x0040)
210#define CS8900_PP_EEPROM_DATA      (0x0042)
211#define CS8900_PP_RX_FRAME_BCNT    (0x0050)
212
213/*
214 * Configuration and Control Registers.
215 */
216
217#define CS8900_PP_RxCFG            (0x0102)
218#define CS8900_PP_RxCTL            (0x0104)
219#define CS8900_PP_TxCFG            (0x0106)
220#define CS8900_PP_TxCMD_READ       (0x0108)
221#define CS8900_PP_BufCFG           (0x010a)
222#define CS8900_PP_LineCFG          (0x0112)
223#define CS8900_PP_SelfCTL          (0x0114)
224#define CS8900_PP_BusCTL           (0x0116)
225#define CS8900_PP_TestCTL          (0x0118)
226
227/*
228 * Status and Event Registers.
229 */
230
231#define CS8900_PP_ISQ              (0x0120)
232#define CS8900_PP_RxEvent          (0x0124)
233#define CS8900_PP_TxEvent          (0x0128)
234#define CS8900_PP_BufEvent         (0x012c)
235#define CS8900_PP_RxMISS           (0x0130)
236#define CS8900_PP_TxCol            (0x0132)
237#define CS8900_PP_LineST           (0x0134)
238#define CS8900_PP_SelfST           (0x0136)
239#define CS8900_PP_BusST            (0x0138)
240#define CS8900_PP_TDR              (0x013c)
241
242/*
243 * Initiate Transmit Registers.
244 */
245
246#define CS8900_PP_TxCMD            (0x0144)
247#define CS8900_PP_TxLength         (0x0146)
248
249/*
250 * Address Filter Registers.
251 */
252
253#define CS8900_PP_LAF              (0x0150)
254#define CS8900_PP_IA               (0x0158)
255
256/*
257 * Frame Location.
258 */
259
260#define CS8900_PP_RxStatus         (0x0400)
261#define CS8900_PP_RxLength         (0x0402)
262#define CS8900_PP_RxFrameLoc       (0x0404)
263#define CS8900_PP_TxFrameLoc       (0x0a00)
264
265/*
266 * Bit Definitions of Registers.
267 */
268
269/*
270 * IO Packet Page Pointer.
271 */
272
273#define CS8900_PPP_AUTO_INCREMENT             (0x8000)
274
275/*
276 * Reg 3. Receiver Configuration.
277 */
278
279#define CS8900_RX_CONFIG_SKIP_1               (1 << 6)
280#define CS8900_RX_CONFIG_STREAM_ENABLE        (1 << 7)
281#define CS8900_RX_CONFIG_RX_OK                (1 << 8)
282#define CS8900_RX_CONFIG_RX_DMA               (1 << 9)
283#define CS8900_RX_CONFIG_RX_AUTO_DMA          (1 << 10)
284#define CS8900_RX_CONFIG_BUFFER_CRC           (1 << 11)
285#define CS8900_RX_CONFIG_CRC_ERROR            (1 << 12)
286#define CS8900_RX_CONFIG_RUNT                 (1 << 13)
287#define CS8900_RX_CONFIG_EXTRA_DATA           (1 << 14)
288
289/*
290 * Reg 4. Receiver Event.
291 */
292
293#define CS8900_RX_EVENT_HASH_IA_MATCH         (1 << 6)
294#define CS8900_RX_EVENT_DRIBBLE_BITS          (1 << 7)
295#define CS8900_RX_EVENT_RX_OK                 (1 << 8)
296#define CS8900_RX_EVENT_HASHED                (1 << 9)
297#define CS8900_RX_EVENT_IA                    (1 << 10)
298#define CS8900_RX_EVENT_BROADCAST             (1 << 11)
299#define CS8900_RX_EVENT_CRC_ERROR             (1 << 12)
300#define CS8900_RX_EVENT_RUNT                  (1 << 13)
301#define CS8900_RX_EVENT_EXTRA_DATA            (1 << 14)
302
303/*
304 * Reg 5. Receiver Control.
305 */
306
307#define CS8900_RX_CTRL_HASH_IA_MATCH          (1 << 6)
308#define CS8900_RX_CTRL_PROMISCUOUS            (1 << 7)
309#define CS8900_RX_CTRL_RX_OK                  (1 << 8)
310#define CS8900_RX_CTRL_MULTICAST              (1 << 9)
311#define CS8900_RX_CTRL_INDIVIDUAL             (1 << 10)
312#define CS8900_RX_CTRL_BROADCAST              (1 << 11)
313#define CS8900_RX_CTRL_CRC_ERROR              (1 << 12)
314#define CS8900_RX_CTRL_RUNT                   (1 << 13)
315#define CS8900_RX_CTRL_EXTRA_DATA             (1 << 14)
316
317/*
318 * Reg 7. Transmit Configuration.
319 */
320
321#define CS8900_TX_CONFIG_LOSS_OF_CARRIER      (1 << 6)
322#define CS8900_TX_CONFIG_SQ_ERROR             (1 << 7)
323#define CS8900_TX_CONFIG_TX_OK                (1 << 8)
324#define CS8900_TX_CONFIG_OUT_OF_WINDOW        (1 << 9)
325#define CS8900_TX_CONFIG_JABBER               (1 << 10)
326#define CS8900_TX_CONFIG_ANY_COLLISION        (1 << 11)
327#define CS8900_TX_CONFIG_16_COLLISION         (1 << 15)
328
329/*
330 * Reg 8. Transmit Event.
331 */
332
333#define CS8900_TX_EVENT_LOSS_OF_CARRIER       (1 << 6)
334#define CS8900_TX_EVENT_SQ_ERROR              (1 << 7)
335#define CS8900_TX_EVENT_TX_OK                 (1 << 8)
336#define CS8900_TX_EVENT_OUT_OF_WINDOW         (1 << 9)
337#define CS8900_TX_EVENT_JABBER                (1 << 10)
338#define CS8900_TX_EVENT_16_COLLISIONS         (1 << 15)
339
340/*
341 * Reg 9. Transmit Command Status.
342 */
343
344#define CS8900_TX_CMD_STATUS_TX_START_5       (0 << 6)
345#define CS8900_TX_CMD_STATUS_TX_START_381     (1 << 6)
346#define CS8900_TX_CMD_STATUS_TX_START_1021    (2 << 6)
347#define CS8900_TX_CMD_STATUS_TX_START_ENTIRE  (3 << 6)
348#define CS8900_TX_CMD_STATUS_FORCE            (1 << 8)
349#define CS8900_TX_CMD_STATUS_ONE_COLLISION    (1 << 9)
350#define CS8900_TX_CMD_STATUS_INHIBIT_CRC      (1 << 12)
351#define CS8900_TX_CMD_STATUS_TX_PAD_DISABLED  (1 << 13)
352
353/*
354 * Reg B. Buffer Configuration.
355 */
356
357#define CS8900_BUFFER_CONFIG_SW_INT           (1 << 6)
358#define CS8900_BUFFER_CONFIG_RX_DMA_DONE      (1 << 7)
359#define CS8900_BUFFER_CONFIG_RDY_FOR_TX       (1 << 8)
360#define CS8900_BUFFER_CONFIG_TX_UNDERRUN      (1 << 9)
361#define CS8900_BUFFER_CONFIG_RX_MISSED        (1 << 10)
362#define CS8900_BUFFER_CONFIG_RX_128_BYTES     (1 << 11)
363#define CS8900_BUFFER_CONFIG_TX_COL_OVF       (1 << 12)
364#define CS8900_BUFFER_CONFIG_RX_MISSED_OVF    (1 << 13)
365#define CS8900_BUFFER_CONFIG_RX_DEST_MATCH    (1 << 15)
366
367/*
368 * Reg C. Buffer Event.
369 */
370
371#define CS8900_BUFFER_EVENT_SW_INT            (1 << 6)
372#define CS8900_BUFFER_EVENT_RX_DMA_DONE       (1 << 7)
373#define CS8900_BUFFER_EVENT_RDY_FOR_TX        (1 << 8)
374#define CS8900_BUFFER_EVENT_TX_UNDERRUN       (1 << 9)
375#define CS8900_BUFFER_EVENT_RX_MISSED         (1 << 10)
376#define CS8900_BUFFER_EVENT_RX_128_BYTES      (1 << 11)
377#define CS8900_BUFFER_EVENT_RX_DEST_MATCH     (1 << 15)
378
379/*
380 * Reg 13. Line Control.
381 */
382
383#define CS8900_LINE_CTRL_RX_ON               (1 << 6)
384#define CS8900_LINE_CTRL_TX_ON               (1 << 7)
385#define CS8900_LINE_CTRL_AUI                 (1 << 8)
386#define CS8900_LINE_CTRL_10BASET             (0 << 9)
387#define CS8900_LINE_CTRL_AUTO_AUI_10BASET    (1 << 9)
388#define CS8900_LINE_CTRL_MOD_BACKOFF         (1 << 11)
389#define CS8900_LINE_CTRL_POLARITY_DISABLED   (1 << 12)
390#define CS8900_LINE_CTRL_2_PART_DEF_DISABLED (1 << 13)
391#define CS8900_LINE_CTRL_LO_RX_SQUELCH       (1 << 14)
392
393/*
394 * Reg 14. Line Status.
395 */
396
397#define CS8900_LINE_STATUS_LINK_OK           (1 << 7)
398#define CS8900_LINE_STATUS_AUI               (1 << 8)
399#define CS8900_LINE_STATUS_10_BASE_T         (1 << 9)
400#define CS8900_LINE_STATUS_POLARITY_OK       (1 << 12)
401#define CS8900_LINE_STATUS_CRS               (1 << 14)
402
403/*
404 * Reg 15. Self Control.
405 */
406
407#define CS8900_SELF_CTRL_RESET              (1 << 6)
408#define CS8900_SELF_CTRL_SW_SUSPEND         (1 << 8)
409#define CS8900_SELF_CTRL_HW_SLEEP           (1 << 9)
410#define CS8900_SELF_CTRL_HW_STANDBY         (1 << 10)
411#define CS8900_SELF_CTRL_HC0E               (1 << 12)
412#define CS8900_SELF_CTRL_HC1E               (1 << 13)
413#define CS8900_SELF_CTRL_HCB0               (1 << 14)
414#define CS8900_SELF_CTRL_HCB1               (1 << 15)
415
416/*
417 * Reg 16. Self Status.
418 */
419
420#define CS8900_SELF_STATUS_3_3_V            (1 << 6)
421#define CS8900_SELF_STATUS_INITD            (1 << 7)
422#define CS8900_SELF_STATUS_SIBUST           (1 << 8)
423#define CS8900_SELF_STATUS_EEPROM_PRESENT   (1 << 9)
424#define CS8900_SELF_STATUS_EEPROM_OK        (1 << 10)
425#define CS8900_SELF_STATUS_EL_PRESENT       (1 << 11)
426#define CS8900_SELF_STATUS_EE_SIZE          (1 << 12)
427
428/*
429 * Reg 17. Bus Control.
430 */
431
432#define CS8900_BUS_CTRL_RESET_RX_DMA        (1 << 6)
433#define CS8900_BUS_CTRL_USE_SA              (1 << 9)
434#define CS8900_BUS_CTRL_MEMORY_ENABLE       (1 << 10)
435#define CS8900_BUS_CTRL_DMA_BURST           (1 << 11)
436#define CS8900_BUS_CTRL_IOCHRDYE            (1 << 12)
437#define CS8900_BUS_CTRL_RX_DMA_SIZE         (1 << 13)
438#define CS8900_BUS_CTRL_ENABLE_INT          (1 << 15)
439
440/*
441 * Reg 18. Bus Status.
442 */
443
444#define CS8900_BUS_STATUS_TX_BID_ERROR      (1 << 7)
445#define CS8900_BUS_STATUS_RDY_FOR_TX_NOW    (1 << 8)
446
447/*
448 * Trace for debugging the isq processing. Define to 1 to enable.
449 */
450#define CS8900_TRACE      0
451#define CS8900_TRACE_SIZE (400)
452
453/*
454 * The default receive queue size. If the BSP sets this field to
455 * 0 this default is used.
456 */
457#define CS8900_RX_QUEUE_SIZE (30)
458
459/*
460 * Stats, more for debugging than anything else.
461 */
462
463typedef struct
464{
465  unsigned long rx_packets;     /* total packets received         */
466  unsigned long tx_packets;     /* total packets transmitted      */
467  unsigned long rx_bytes;       /* total bytes received           */
468  unsigned long tx_bytes;       /* total bytes transmitted        */
469  unsigned long rx_interrupts;  /* total number of rx interrupts  */
470  unsigned long tx_interrupts;  /* total number of tx interrupts  */
471
472  /* detailed rx errors: */
473  unsigned long rx_dropped;     /* no mbufs in queue              */
474  unsigned long rx_no_mbufs;    /* no mbufs                       */
475  unsigned long rx_no_clusters; /* no clusters                    */
476  unsigned long rx_oversize_errors;
477  unsigned long rx_crc_errors;    /* recved pkt with crc error    */
478  unsigned long rx_runt_errors;
479  unsigned long rx_missed_errors; /* receiver missed packet       */
480
481  /* detailed tx errors */
482  unsigned long tx_ok;
483  unsigned long tx_collisions;
484  unsigned long tx_bid_errors;
485  unsigned long tx_wait_for_rdy4tx;
486  unsigned long tx_rdy4tx;
487  unsigned long tx_underrun_errors;
488  unsigned long tx_dropped;
489  unsigned long tx_resends;
490
491  /* interrupt watch dog */
492  unsigned long int_swint_req;
493  unsigned long int_swint_res;
494  unsigned long int_lockup;
495
496  unsigned long interrupts;
497
498} eth_statistics;
499
500/*
501 * CS8900 device structure
502 */
503
504typedef struct
505{
506  /*
507   * Device number.
508   */
509
510  int dev;
511
512  /*
513   * Memory base addresses. Making mem_base 0 forces the
514   * driver to perform only I/O space accesses.
515   */
516
517  unsigned long  io_base;
518  unsigned long  mem_base;
519
520  /*
521   * The IRQ level as defined in the datasheet for the CS8900.
522   *
523   *      ISA BUS   Pin    Value
524   *       IRQ10   INTRQ0    0
525   *       IRQ11   INTRQ1    1
526   *       IRQ12   INTRQ2    2
527   *       IRQ5    INTRQ3    3
528   */
529
530  int            irq_level;
531
532  /*
533   * The MAC address.
534   */
535
536  unsigned char mac_address[6];
537
538  /*
539   * The bsdnet information structure.
540   */
541
542  struct arpcom  arpcom;
543
544  /*
545   * Driver state and resources.
546   */
547
548  int            accept_bcast;
549  int            tx_active;
550
551  rtems_id       rx_task;
552  rtems_id       tx_task;
553
554  /*
555   * The queues. FIXME : these should be changed to be mbuf lists.
556   */
557
558  struct mbuf    *rx_ready_head;
559  struct mbuf    *rx_ready_tail;
560  int            rx_ready_len;
561
562  struct mbuf    *rx_loaded_head;
563  struct mbuf    *rx_loaded_tail;
564  int            rx_loaded_len;
565
566  /*
567   * Number of mbufs queued for the interrupt handler to
568   * loop reading.
569   */
570
571  int            rx_queue_size;
572
573#if CS8900_TRACE
574  unsigned short trace_key[CS8900_TRACE_SIZE];
575  unsigned long  trace_var[CS8900_TRACE_SIZE];
576  unsigned long  trace_time[CS8900_TRACE_SIZE];
577  int            trace_in;
578#endif
579
580  /**
581   * Standard(!) ethernet statistics
582   */
583
584  eth_statistics eth_stats;
585
586} cs8900_device;
587
588/*
589 * Link active returns the state of the PHY.
590 *
591 * @param cs Pointer to the device structure.
592 */
593
594int cs8900_link_active (cs8900_device *cs);
595
596/**
597 * The RTEMS network stack driver attach function that is loaded into the
598 * the rtems_bsdnet_ifconfig struct. The network stack will call this
599 * function when attaching the driver. The BSP must load the 'drv_ctrl'
600 * field of the structure before calling the 'rtems_bsdnet_attach'
601 * function.
602 *
603 * @param config The RTEMS BSD config structure.
604 *
605 * @param attaching True is the stack is attaching the interface.
606 *
607 * @retval int Set to 1 if the device has attached.
608 */
609
610int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config,
611                          int                          attaching);
612
613/**
614 * The BSP specific interrupt wrapper calls this function when a device
615 * interrupt occurs.
616 *
617 * @param v The RTEMS vector number that generated the interrupt.
618 *
619 * @param cs Pointer to the device structure passed to the interrupt
620 *           catch function provided by the BSP.
621 *
622 * @retval rtems_isr The standard ISR return type.
623 */
624
625rtems_isr cs8900_interrupt (rtems_vector_number v, void *cs);
626
627/**
628 * Get the MAC address for the interface.
629 *
630 * @param cs Pointer to the device structure.
631 *
632 * @param mac_address Pointer to the memory to load the MAC address. This
633 *                    is a 6 byte buffer so do not exceeed the bounds.
634 */
635
636void cs8900_get_mac_addr (cs8900_device *cs, unsigned char *mac_address);
637
638/**
639 * Catch the device interrupt. When the interrupt is called call the
640 * function 'cs8900_interrupt'.
641 *
642 * BSP to provide this function.
643 *
644 * @param cs Pointer to the device structure.
645 */
646
647void cs8900_attach_interrupt (cs8900_device *cs);
648
649/**
650 * Detach the device interrupt.
651 *
652 * BSP to provide this function.
653 *
654 * @param cs Pointer to the device structure.
655 */
656
657void cs8900_detach_interrupt (cs8900_device *cs);
658
659/**
660 * Write to an IO space register.
661 *
662 * BSP to provide this function.
663 *
664 * @param cs Pointer to the device structure.
665 *
666 * @param reg Register offset from the IO base.
667 *
668 * @param data The data to be written to the register.
669 */
670
671void cs8900_io_set_reg (cs8900_device *cs,
672                        unsigned short reg, unsigned short data);
673
674/**
675 * Read an IO space register.
676 *
677 * BSP to provide this function.
678 *
679 * @param cs Pointer to the device structure.
680 *
681 * @param reg Register offset from the IO base.
682 *
683 * @retval unsigned short The register data.
684 */
685
686unsigned short cs8900_io_get_reg (cs8900_device *cs, unsigned short reg);
687
688/**
689 * Write to a memory space register. Will only be called is the mem_base
690 * field of the 'cs' struct is not 0.
691 *
692 * BSP to provide this function.
693 *
694 * @param cs Pointer to the device structure.
695 *
696 * @param reg Register offset from the memory base.
697 *
698 * @param data The data to be written to the register.
699 */
700
701void cs8900_mem_set_reg (cs8900_device *cs,
702                         unsigned long reg, unsigned short data);
703
704/**
705 * Read a memory space register. Will only be called is the mem_base
706 * field of the 'cs' struct is not 0.
707 *
708 * BSP to provide this function.
709 *
710 * @param cs Pointer to the device structure.
711 *
712 * @param reg Register offset from the IO base.
713 *
714 * @retval unsigned short The register data.
715 */
716
717unsigned short cs8900_mem_get_reg (cs8900_device *cs, unsigned long reg);
718
719/**
720 * Write a block of data to the interface. The BSP codes if this is an IO or
721 * memory space write.
722 *
723 * BSP to provide this function.
724 *
725 * @param cs Pointer to the device structure.
726 *
727 * @param len The length of data to write.
728 *
729 * @param data Pointer to the data to be written.
730 */
731
732void cs8900_put_data_block (cs8900_device *cs, int len, unsigned char *data);
733
734/**
735 * Read a block of data from the interface. The BSP codes if this is an IO or
736 * memory space write. The read must not be longer than the MTU size.
737 *
738 * BSP to provide this function.
739 *
740 * @param cs Pointer to the device structure.
741 *
742 * @param data Pointer to the buffer where the data is to be written.
743 *
744 * @retval unsigned short The number of bytes read from the device.
745 */
746
747unsigned short cs8900_get_data_block (cs8900_device *cs, unsigned char *data);
748
749/**
750 * Load a mbuf chain to the device ready for tranmission.
751 *
752 * BSP to provide this function.
753 *
754 * @param cs Pointer to the device structure.
755 *
756 * @param m Pointer to the head of an mbuf chain.
757 */
758
759void cs8900_tx_load (cs8900_device *cs, struct mbuf *m);
760
761#endif
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