1 | /* |
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2 | ------------------------------------------------------------------------ |
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3 | $Id$ |
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4 | ------------------------------------------------------------------------ |
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5 | |
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6 | My Right Boot, a boot ROM for embedded hardware. |
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7 | |
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8 | Copyright Cybertec Pty Ltd, 2000 |
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9 | All rights reserved Cybertec Pty Ltd, 2000 |
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10 | |
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11 | COPYRIGHT (c) 1989-1998. |
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12 | On-Line Applications Research Corporation (OAR). |
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13 | |
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14 | The license and distribution terms for this file may be |
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15 | found in the file LICENSE in this distribution or at |
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16 | http://www.OARcorp.com/rtems/license.html. |
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17 | |
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18 | ------------------------------------------------------------------------ |
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19 | |
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20 | CS8900 net boot driver. |
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21 | |
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22 | */ |
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23 | |
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24 | #if !defined(_CS8900_H_) |
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25 | #define _CS8900_H_ |
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26 | |
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27 | #include <rtems.h> |
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28 | #include <rtems/error.h> |
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29 | #include <rtems/rtems_bsdnet.h> |
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30 | |
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31 | #include <sys/param.h> |
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32 | #include <sys/mbuf.h> |
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33 | #include <sys/socket.h> |
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34 | #include <sys/sockio.h> |
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35 | |
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36 | #include <net/if.h> |
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37 | |
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38 | #include <netinet/in.h> |
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39 | #include <netinet/if_ether.h> |
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40 | |
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41 | #define ET_MINLEN 60 |
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42 | |
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43 | /* |
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44 | * CS8900 device register definitions |
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45 | */ |
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46 | |
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47 | /* |
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48 | * Crystal ESIA product id. |
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49 | */ |
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50 | |
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51 | #define CS8900_ESIA_ID (0x630e) |
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52 | |
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53 | /* |
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54 | * IO Registers. |
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55 | */ |
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56 | |
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57 | #define CS8900_IO_RX_TX_DATA_PORT0 (0x0000) |
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58 | #define CS8900_IO_TX_TX_DATA_PORT1 (0x0002) |
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59 | #define CS8900_IO_TxCMD (0x0004) |
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60 | #define CS8900_IO_TxLength (0x0006) |
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61 | #define CS8900_IO_ISQ (0x0008) |
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62 | #define CS8900_IO_PACKET_PAGE_PTR (0x000a) |
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63 | #define CS8900_IO_PP_DATA_PORT0 (0x000c) |
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64 | #define CS8900_IO_PP_DATA_PORT1 (0x000e) |
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65 | |
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66 | /* |
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67 | * Packet Page Registers. |
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68 | */ |
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69 | |
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70 | /* |
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71 | * Bus Interface Registers. |
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72 | */ |
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73 | |
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74 | #define CS8900_PP_PROD_ID (0x0000) |
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75 | #define CS8900_PP_IO_BASE (0x0020) |
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76 | #define CS8900_PP_INT (0x0022) |
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77 | #define CS8900_PP_DMA_CHANNEL (0x0024) |
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78 | #define CS8900_PP_DMA_SOF (0x0026) |
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79 | #define CS8900_PP_DMA_FRM_CNT (0x0028) |
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80 | #define CS8900_PP_DMA_RX_BCNT (0x002a) |
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81 | #define CS8900_PP_MEM_BASE (0x002c) |
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82 | #define CS8900_PP_BPROM_BASE (0x0030) |
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83 | #define CS8900_PP_BPROM_AMASK (0x0034) |
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84 | #define CS8900_PP_EEPROM_CMD (0x0040) |
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85 | #define CS8900_PP_EEPROM_DATA (0x0042) |
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86 | #define CS8900_PP_RX_FRAME_BCNT (0x0050) |
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87 | |
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88 | /* |
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89 | * Configuration and Control Registers. |
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90 | */ |
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91 | |
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92 | #define CS8900_PP_RxCFG (0x0102) |
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93 | #define CS8900_PP_RxCTL (0x0104) |
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94 | #define CS8900_PP_TxCFG (0x0106) |
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95 | #define CS8900_PP_TxCMD_READ (0x0108) |
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96 | #define CS8900_PP_BufCFG (0x010a) |
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97 | #define CS8900_PP_LineCFG (0x0112) |
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98 | #define CS8900_PP_SelfCTL (0x0114) |
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99 | #define CS8900_PP_BusCTL (0x0116) |
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100 | #define CS8900_PP_TestCTL (0x0118) |
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101 | |
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102 | /* |
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103 | * Status and Event Registers. |
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104 | */ |
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105 | |
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106 | #define CS8900_PP_ISQ (0x0120) |
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107 | #define CS8900_PP_RxEvent (0x0124) |
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108 | #define CS8900_PP_TxEvent (0x0128) |
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109 | #define CS8900_PP_BufEvent (0x012c) |
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110 | #define CS8900_PP_RxMISS (0x0130) |
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111 | #define CS8900_PP_TxCol (0x0132) |
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112 | #define CS8900_PP_LineST (0x0134) |
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113 | #define CS8900_PP_SelfST (0x0136) |
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114 | #define CS8900_PP_BusST (0x0138) |
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115 | #define CS8900_PP_TDR (0x013c) |
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116 | |
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117 | /* |
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118 | * Initiate Transmit Registers. |
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119 | */ |
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120 | |
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121 | #define CS8900_PP_TxCMD (0x0144) |
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122 | #define CS8900_PP_TxLength (0x0146) |
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123 | |
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124 | /* |
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125 | * Address Filter Registers. |
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126 | */ |
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127 | |
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128 | #define CS8900_PP_LAF (0x0150) |
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129 | #define CS8900_PP_IA (0x0158) |
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130 | |
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131 | /* |
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132 | * Frame Location. |
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133 | */ |
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134 | |
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135 | #define CS8900_PP_RxStatus (0x0400) |
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136 | #define CS8900_PP_RxLength (0x0402) |
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137 | #define CS8900_PP_RxFrameLoc (0x0404) |
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138 | #define CS8900_PP_TxFrameLoc (0x0a00) |
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139 | |
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140 | /* |
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141 | * Bit Definitions of Registers. |
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142 | */ |
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143 | |
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144 | /* |
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145 | * IO Packet Page Pointer. |
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146 | */ |
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147 | |
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148 | #define CS8900_PPP_AUTO_INCREMENT (0x8000) |
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149 | |
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150 | /* |
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151 | * Reg 3. Receiver Configuration. |
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152 | */ |
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153 | |
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154 | #define CS8900_RX_CONFIG_SKIP_1 (1 << 6) |
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155 | #define CS8900_RX_CONFIG_STREAM_ENABLE (1 << 7) |
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156 | #define CS8900_RX_CONFIG_RX_OK (1 << 8) |
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157 | #define CS8900_RX_CONFIG_RX_DMA (1 << 9) |
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158 | #define CS8900_RX_CONFIG_RX_AUTO_DMA (1 << 10) |
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159 | #define CS8900_RX_CONFIG_BUFFER_CRC (1 << 11) |
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160 | #define CS8900_RX_CONFIG_CRC_ERROR (1 << 12) |
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161 | #define CS8900_RX_CONFIG_RUNT (1 << 13) |
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162 | #define CS8900_RX_CONFIG_EXTRA_DATA (1 << 14) |
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163 | |
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164 | /* |
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165 | * Reg 4. Receiver Event. |
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166 | */ |
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167 | |
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168 | #define CS8900_RX_EVENT_HASH_IA_MATCH (1 << 6) |
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169 | #define CS8900_RX_EVENT_DRIBBLE_BITS (1 << 7) |
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170 | #define CS8900_RX_EVENT_RX_OK (1 << 8) |
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171 | #define CS8900_RX_EVENT_HASHED (1 << 9) |
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172 | #define CS8900_RX_EVENT_IA (1 << 10) |
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173 | #define CS8900_RX_EVENT_BROADCAST (1 << 11) |
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174 | #define CS8900_RX_EVENT_CRC_ERROR (1 << 12) |
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175 | #define CS8900_RX_EVENT_RUNT (1 << 13) |
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176 | #define CS8900_RX_EVENT_EXTRA_DATA (1 << 14) |
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177 | |
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178 | /* |
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179 | * Reg 5. Receiver Control. |
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180 | */ |
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181 | |
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182 | #define CS8900_RX_CTRL_HASH_IA_MATCH (1 << 6) |
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183 | #define CS8900_RX_CTRL_PROMISCUOUS (1 << 7) |
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184 | #define CS8900_RX_CTRL_RX_OK (1 << 8) |
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185 | #define CS8900_RX_CTRL_MULTICAST (1 << 9) |
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186 | #define CS8900_RX_CTRL_INDIVIDUAL (1 << 10) |
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187 | #define CS8900_RX_CTRL_BROADCAST (1 << 11) |
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188 | #define CS8900_RX_CTRL_CRC_ERROR (1 << 12) |
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189 | #define CS8900_RX_CTRL_RUNT (1 << 13) |
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190 | #define CS8900_RX_CTRL_EXTRA_DATA (1 << 14) |
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191 | |
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192 | /* |
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193 | * Reg 7. Transmit Configuration. |
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194 | */ |
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195 | |
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196 | #define CS8900_TX_CONFIG_LOSS_OF_CARRIER (1 << 6) |
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197 | #define CS8900_TX_CONFIG_SQ_ERROR (1 << 7) |
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198 | #define CS8900_TX_CONFIG_TX_OK (1 << 8) |
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199 | #define CS8900_TX_CONFIG_OUT_OF_WINDOW (1 << 9) |
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200 | #define CS8900_TX_CONFIG_JABBER (1 << 10) |
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201 | #define CS8900_TX_CONFIG_ANY_COLLISION (1 << 11) |
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202 | #define CS8900_TX_CONFIG_16_COLLISION (1 << 15) |
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203 | |
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204 | /* |
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205 | * Reg 8. Transmit Event. |
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206 | */ |
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207 | |
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208 | #define CS8900_TX_EVENT_LOSS_OF_CARRIER (1 << 6) |
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209 | #define CS8900_TX_EVENT_SQ_ERROR (1 << 7) |
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210 | #define CS8900_TX_EVENT_TX_OK (1 << 8) |
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211 | #define CS8900_TX_EVENT_OUT_OF_WINDOW (1 << 9) |
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212 | #define CS8900_TX_EVENT_JABBER (1 << 10) |
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213 | #define CS8900_TX_EVENT_16_COLLISIONS (1 << 15) |
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214 | |
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215 | /* |
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216 | * Reg 9. Transmit Command Status. |
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217 | */ |
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218 | |
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219 | #define CS8900_TX_CMD_STATUS_TX_START_5 (0 << 6) |
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220 | #define CS8900_TX_CMD_STATUS_TX_START_381 (1 << 6) |
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221 | #define CS8900_TX_CMD_STATUS_TX_START_1021 (2 << 6) |
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222 | #define CS8900_TX_CMD_STATUS_TX_START_ENTIRE (3 << 6) |
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223 | #define CS8900_TX_CMD_STATUS_FORCE (1 << 8) |
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224 | #define CS8900_TX_CMD_STATUS_ONE_COLLISION (1 << 9) |
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225 | #define CS8900_TX_CMD_STATUS_INHIBIT_CRC (1 << 12) |
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226 | #define CS8900_TX_CMD_STATUS_TX_PAD_DISABLED (1 << 13) |
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227 | |
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228 | /* |
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229 | * Reg B. Buffer Configuration. |
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230 | */ |
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231 | |
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232 | #define CS8900_BUFFER_CONFIG_SW_INT (1 << 6) |
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233 | #define CS8900_BUFFER_CONFIG_RX_DMA_DONE (1 << 7) |
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234 | #define CS8900_BUFFER_CONFIG_RDY_FOR_TX (1 << 8) |
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235 | #define CS8900_BUFFER_CONFIG_TX_UNDERRUN (1 << 9) |
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236 | #define CS8900_BUFFER_CONFIG_RX_MISSED (1 << 10) |
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237 | #define CS8900_BUFFER_CONFIG_RX_128_BYTES (1 << 11) |
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238 | #define CS8900_BUFFER_CONFIG_TX_COL_OVF (1 << 12) |
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239 | #define CS8900_BUFFER_CONFIG_RX_MISSED_OVF (1 << 13) |
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240 | #define CS8900_BUFFER_CONFIG_RX_DEST_MATCH (1 << 15) |
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241 | |
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242 | /* |
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243 | * Reg C. Buffer Event. |
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244 | */ |
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245 | |
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246 | #define CS8900_BUFFER_EVENT_SW_INT (1 << 6) |
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247 | #define CS8900_BUFFER_EVENT_RX_DMA_DONE (1 << 7) |
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248 | #define CS8900_BUFFER_EVENT_RDY_FOR_TX (1 << 8) |
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249 | #define CS8900_BUFFER_EVENT_TX_UNDERRUN (1 << 9) |
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250 | #define CS8900_BUFFER_EVENT_RX_MISSED (1 << 10) |
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251 | #define CS8900_BUFFER_EVENT_RX_128_BYTES (1 << 11) |
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252 | #define CS8900_BUFFER_EVENT_RX_DEST_MATCH (1 << 15) |
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253 | |
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254 | /* |
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255 | * Reg 13. Line Control. |
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256 | */ |
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257 | |
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258 | #define CS8900_LINE_CTRL_RX_ON (1 << 6) |
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259 | #define CS8900_LINE_CTRL_TX_ON (1 << 7) |
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260 | #define CS8900_LINE_CTRL_AUI (1 << 8) |
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261 | #define CS8900_LINE_CTRL_10BASET (0 << 9) |
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262 | #define CS8900_LINE_CTRL_AUTO_AUI_10BASET (1 << 9) |
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263 | #define CS8900_LINE_CTRL_MOD_BACKOFF (1 << 11) |
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264 | #define CS8900_LINE_CTRL_POLARITY_DISABLED (1 << 12) |
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265 | #define CS8900_LINE_CTRL_2_PART_DEF_DISABLED (1 << 13) |
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266 | #define CS8900_LINE_CTRL_LO_RX_SQUELCH (1 << 14) |
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267 | |
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268 | /* |
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269 | * Reg 14. Line Status. |
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270 | */ |
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271 | |
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272 | #define CS8900_LINE_STATUS_LINK_OK (1 << 7) |
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273 | #define CS8900_LINE_STATUS_AUI (1 << 8) |
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274 | #define CS8900_LINE_STATUS_10_BASE_T (1 << 9) |
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275 | #define CS8900_LINE_STATUS_POLARITY_OK (1 << 12) |
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276 | #define CS8900_LINE_STATUS_CRS (1 << 14) |
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277 | |
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278 | /* |
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279 | * Reg 15. Self Control. |
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280 | */ |
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281 | |
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282 | #define CS8900_SELF_CTRL_RESET (1 << 6) |
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283 | #define CS8900_SELF_CTRL_SW_SUSPEND (1 << 8) |
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284 | #define CS8900_SELF_CTRL_HW_SLEEP (1 << 9) |
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285 | #define CS8900_SELF_CTRL_HW_STANDBY (1 << 10) |
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286 | #define CS8900_SELF_CTRL_HC0E (1 << 12) |
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287 | #define CS8900_SELF_CTRL_HC1E (1 << 13) |
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288 | #define CS8900_SELF_CTRL_HCB0 (1 << 14) |
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289 | #define CS8900_SELF_CTRL_HCB1 (1 << 15) |
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290 | |
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291 | /* |
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292 | * Reg 16. Self Status. |
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293 | */ |
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294 | |
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295 | #define CS8900_SELF_STATUS_3_3_V (1 << 6) |
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296 | #define CS8900_SELF_STATUS_INITD (1 << 7) |
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297 | #define CS8900_SELF_STATUS_SIBUST (1 << 8) |
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298 | #define CS8900_SELF_STATUS_EEPROM_PRESENT (1 << 9) |
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299 | #define CS8900_SELF_STATUS_EEPROM_OK (1 << 10) |
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300 | #define CS8900_SELF_STATUS_EL_PRESENT (1 << 11) |
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301 | #define CS8900_SELF_STATUS_EE_SIZE (1 << 12) |
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302 | |
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303 | /* |
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304 | * Reg 17. Bus Control. |
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305 | */ |
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306 | |
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307 | #define CS8900_BUS_CTRL_RESET_RX_DMA (1 << 6) |
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308 | #define CS8900_BUS_CTRL_USE_SA (1 << 9) |
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309 | #define CS8900_BUS_CTRL_MEMORY_ENABLE (1 << 10) |
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310 | #define CS8900_BUS_CTRL_DMA_BURST (1 << 11) |
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311 | #define CS8900_BUS_CTRL_IOCHRDYE (1 << 12) |
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312 | #define CS8900_BUS_CTRL_RX_DMA_SIZE (1 << 13) |
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313 | #define CS8900_BUS_CTRL_ENABLE_INT (1 << 15) |
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314 | |
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315 | /* |
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316 | * Reg 18. Bus Status. |
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317 | */ |
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318 | |
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319 | #define CS8900_BUS_STATUS_TX_BID_ERROR (1 << 7) |
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320 | #define CS8900_BUS_STATUS_RDY_FOR_TX_NOW (1 << 8) |
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321 | |
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322 | /* |
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323 | * Trace for debugging the isq processing. Define to 1 to enable. |
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324 | */ |
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325 | #define CS8900_TRACE 0 |
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326 | #define CS8900_TRACE_SIZE (400) |
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327 | |
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328 | /* |
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329 | * Stats, more for debugging than anything else. |
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330 | */ |
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331 | |
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332 | typedef struct |
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333 | { |
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334 | unsigned long rx_packets; /* total packets received */ |
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335 | unsigned long tx_packets; /* total packets transmitted */ |
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336 | unsigned long rx_bytes; /* total bytes received */ |
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337 | unsigned long tx_bytes; /* total bytes transmitted */ |
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338 | unsigned long rx_interrupts; /* total number of rx interrupts */ |
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339 | unsigned long tx_interrupts; /* total number of tx interrupts */ |
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340 | |
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341 | /* detailed rx errors: */ |
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342 | unsigned long rx_dropped; /* no mbufs in queue */ |
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343 | unsigned long rx_no_mbufs; /* no mbufs */ |
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344 | unsigned long rx_no_clusters; /* no clusters */ |
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345 | unsigned long rx_oversize_errors; |
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346 | unsigned long rx_crc_errors; /* recved pkt with crc error */ |
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347 | unsigned long rx_runt_errors; |
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348 | unsigned long rx_missed_errors; /* receiver missed packet */ |
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349 | |
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350 | /* detailed tx errors */ |
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351 | unsigned long tx_ok; |
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352 | unsigned long tx_collisions; |
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353 | unsigned long tx_bid_errors; |
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354 | unsigned long tx_wait_for_rdy4tx; |
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355 | unsigned long tx_rdy4tx; |
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356 | unsigned long tx_underrun_errors; |
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357 | unsigned long tx_dropped; |
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358 | unsigned long tx_resends; |
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359 | |
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360 | /* interrupt watch dog */ |
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361 | unsigned long int_swint_req; |
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362 | unsigned long int_swint_res; |
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363 | unsigned long int_lockup; |
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364 | |
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365 | unsigned long interrupts; |
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366 | |
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367 | } eth_statistics; |
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368 | |
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369 | /* |
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370 | * CS8900 device structure |
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371 | */ |
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372 | |
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373 | typedef struct |
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374 | { |
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375 | /* |
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376 | * Device number. |
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377 | */ |
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378 | |
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379 | int dev; |
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380 | |
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381 | /* |
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382 | * The bsdnet information structure. |
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383 | */ |
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384 | |
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385 | struct arpcom arpcom; |
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386 | |
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387 | /* |
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388 | * Driver state and resources. |
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389 | */ |
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390 | |
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391 | int accept_bcast; |
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392 | int tx_active; |
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393 | |
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394 | rtems_id rx_task; |
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395 | rtems_id tx_task; |
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396 | |
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397 | /* |
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398 | * The queues. FIXME : these should be changed to be mbuf lists. |
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399 | */ |
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400 | struct mbuf *rx_ready_head; |
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401 | struct mbuf *rx_ready_tail; |
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402 | int rx_ready_len; |
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403 | |
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404 | struct mbuf *rx_loaded_head; |
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405 | struct mbuf *rx_loaded_tail; |
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406 | int rx_loaded_len; |
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407 | |
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408 | #if CS8900_TRACE |
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409 | unsigned short trace_key[CS8900_TRACE_SIZE]; |
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410 | unsigned long trace_var[CS8900_TRACE_SIZE]; |
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411 | unsigned long trace_time[CS8900_TRACE_SIZE]; |
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412 | int trace_in; |
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413 | #endif |
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414 | |
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415 | /* |
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416 | * Standard(!) ethernet statistics |
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417 | */ |
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418 | |
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419 | eth_statistics eth_stats; |
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420 | |
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421 | } cs8900_device; |
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422 | |
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423 | /* |
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424 | * Link is active, and RX count. |
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425 | */ |
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426 | |
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427 | int cs8900_link_active (int dev); |
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428 | int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config, |
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429 | int attaching); |
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430 | rtems_isr cs8900_interrupt (rtems_vector_number v, void *cs); |
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431 | |
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432 | /* |
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433 | * Functions Users Provide to implement the driver. |
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434 | */ |
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435 | |
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436 | void cs8900_attach_interrupt (int dev, cs8900_device *cs); |
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437 | void cs8900_detach_interrupt (int dev); |
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438 | void cs8900_get_mac_addr (int dev, unsigned char *mac_address); |
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439 | void cs8900_io_set_reg (int dev, unsigned short reg, unsigned short data); |
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440 | unsigned short cs8900_io_get_reg (int dev, unsigned short reg); |
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441 | void cs8900_mem_set_reg (int dev, unsigned long reg, unsigned short data); |
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442 | unsigned short cs8900_mem_get_reg (int dev, unsigned long reg); |
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443 | void cs8900_put_data_block (int dev, int len, unsigned char *data); |
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444 | unsigned short cs8900_get_data_block (int dev, unsigned char *data); |
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445 | void cs8900_tx_load (int dev, struct mbuf *m); |
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446 | |
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447 | #endif |
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