source: rtems/c/src/libchip/network/cs8900.h @ 2697be56

4.104.114.84.95
Last change on this file since 2697be56 was 2697be56, checked in by Joel Sherrill <joel.sherrill@…>, on 03/12/07 at 11:19:21

2007-03-12 Joel Sherrill <joel@…>

  • libchip/network/cs8900.c, libchip/network/cs8900.h, libchip/network/greth.c, libchip/network/greth.h: Correct license URL and/or fix mistake in copyright notice. Both of these mistakes appear to be from code submitted after these changes were made previously.
  • Property mode set to 100644
File size: 21.1 KB
Line 
1/*
2  ------------------------------------------------------------------------
3  cs8900.h,v 1.3 2002/09/07 23:09:47 joel Exp
4  ------------------------------------------------------------------------
5
6  Copyright Cybertec Pty Ltd, 2000
7  All rights reserved Cybertec Pty Ltd, 2000
8
9  Port to the DIMM PC copyright (c) 2004 Angelo Fraietta
10    This project has been assisted by the Commonwealth Government
11    through the Australia Council, its arts funding and advisory body.
12
13  COPYRIGHT (c) 1989-1998.
14  On-Line Applications Research Corporation (OAR).
15
16  The license and distribution terms for this file may be
17  found in the file LICENSE in this distribution or at
18  http://www.rtems.com/license/LICENSE.
19
20  ------------------------------------------------------------------------
21
22  CS8900 RTEMS driver.
23
24  This is a generic driver that requires a BSP backend. The BSP backend
25  provides the glue to the specific bus for the target hardware. It has
26  been tested with Coldfire processors, and the PC. These targets have
27  completely different bus, byte order and interrupt structures.
28
29  An example BSP backend is provided in the pci386 BSP.
30
31  The BSP provides the following functions:
32
33    cs8900_io_set_reg
34    cs8900_io_get_reg
35    cs8900_mem_set_reg
36    cs8900_mem_get_reg
37    cs8900_put_data_block
38    cs8900_get_data_block
39    cs8900_tx_load
40    cs8900_attach_interrupt
41    cs8900_detach_interrupt
42
43  The header file provides documentation for these functions. There
44  are four types of functions.
45
46  The I/O set/get functions access the CS8900 I/O registers via the
47  I/O Mode. For example on a PC with an ISA bus you would use the
48  IA32 in/out port instructions. The cs8900_device structure passed
49  to these functions provide these functions with the I/O base
50  address. The BSP must provide these functions.
51
52  The Memory set/get functions access the CS8900 internal registers
53  and frame buffers directly from a 4K byte block of host memory.
54  Memory mode provides a faster access to the CS8900. The cs8900_device
55  structure passed to these functions provides the memory base
56  address. The BSP needs to provide these functions but they do not
57  need to be implemented if the mem_base field is set to 0. The
58  driver will use I/O mode only.
59
60  The Block transfer functions are used to read or write a block
61  of memory from the CS8900. This saves the driver making a number
62  of small calls. The BSP driver must know if I/O or Memory mode
63  can be used.
64
65  The final group of functions is to handle interrupts. The BSP
66  must take care of save and restoring any interrupt state
67  information.
68
69  The BSP declares a 'cs8900_device' structure for each device being
70  attached to the networking stack. It also creates a
71  'struct rtems_bsdnet_ifconfig' which is used to attach the interface
72  to the networking stack. The following code declares the BSD config:
73
74    static cs8900_device cs8900;
75
76    static struct rtems_bsdnet_ifconfig cs8900_ifconfig =
77     {
78       "cs0",
79       cs8900_driver_attach,
80       NULL,
81       NULL,
82       NULL,
83       NULL,
84       0,
85       0,
86       0,
87       0,
88       0,
89       0,
90       0,
91       0
92     };
93
94   The device linked to the BSD config structure with:
95
96     cs8900_ifconfig.drv_ctrl = &cs8900;
97
98   If you have a specific hardware address you should point the BSD
99   config structure to that address. If you do not the driver will read
100   the MAC address from the CS8900. This assumes the CS8900 has read
101   the address from an external EEPROM or has been setup by a BIOS or
102   boot monitor. For EEPROM less you need to supply the MAC address.
103
104   Set the I/O and Memory base addresses. If the Memory base address
105   is 0 the driver will use I/O mode only. A typical initialisation
106   looks like:
107
108     printf ("RTEMS BSD Network initialisation.\n");
109     rtems_bsdnet_initialize_network ();
110
111     #define ETHERNET_IO_BASE   0x300
112     #define ETHERNET_MEM_BASE  0
113     #define ETHERNET_IRQ_LEVEL 0
114
115     cs8900_device *cs = &cs8900;
116
117     memset (cs, 0, sizeof (cs8900_device));
118
119     cs->dev = 0;
120     cs->io_base = ETHERNET_IO_BASE;
121     cs->mem_base = ETHERNET_MEM_BASE;
122     cs->irq_level = ETHERNET_IRQ_LEVEL;
123     cs->rx_queue_size = 30;
124
125     cs8900_ifconfig.drv_ctrl = &cs8900;
126
127     printf ("CS8900 initialisation\n");
128
129     rtems_bsdnet_attach (&cs8900_ifconfig);
130
131     flags = IFF_UP;
132     if (rtems_bsdnet_ifconfig (cs8900_ifconfig.name,
133                                SIOCSIFFLAGS,
134                                &flags) < 0)
135     {
136       printf ("error: can't bring up %s: %s\n",
137               cs8900_ifconfig.name, strerror (errno));
138       return;
139     }
140
141     rtems_bsdnet_do_bootp_and_rootfs ();
142
143   The IRQ level is the one documented in the CS8900 datasheet and below
144   in the CS8900 device structure. You need to map your target IRQ to the
145   CS8900 in the BSP driver.
146
147 */
148
149#if !defined(_CS8900_H_)
150#define _CS8900_H_
151
152#include <rtems.h>
153#include <rtems/error.h>
154#include <rtems/rtems_bsdnet.h>
155
156#include <sys/param.h>
157#include <sys/mbuf.h>
158#include <sys/socket.h>
159#include <sys/sockio.h>
160
161#include <net/if.h>
162
163#include <netinet/in.h>
164#include <netinet/if_ether.h>
165
166/* #include <target.h> what does this provide? joel to chris */
167
168#define ET_MINLEN 60
169
170/*
171 * CS8900 device register definitions
172 */
173
174/*
175 * Crystal ESIA product id.
176 */
177
178#define CS8900_ESIA_ID             (0x630e)
179
180/*
181 * IO Registers.
182 */
183
184#define CS8900_IO_RX_TX_DATA_PORT0 (0x0000)
185#define CS8900_IO_TX_TX_DATA_PORT1 (0x0002)
186#define CS8900_IO_TxCMD            (0x0004)
187#define CS8900_IO_TxLength         (0x0006)
188#define CS8900_IO_ISQ              (0x0008)
189#define CS8900_IO_PACKET_PAGE_PTR  (0x000a)
190#define CS8900_IO_PP_DATA_PORT0    (0x000c)
191#define CS8900_IO_PP_DATA_PORT1    (0x000e)
192
193/*
194 * Packet Page Registers.
195 */
196
197/*
198 * Bus Interface Registers.
199 */
200
201#define CS8900_PP_PROD_ID          (0x0000)
202#define CS8900_PP_IO_BASE          (0x0020)
203#define CS8900_PP_INT              (0x0022)
204#define CS8900_PP_DMA_CHANNEL      (0x0024)
205#define CS8900_PP_DMA_SOF          (0x0026)
206#define CS8900_PP_DMA_FRM_CNT      (0x0028)
207#define CS8900_PP_DMA_RX_BCNT      (0x002a)
208#define CS8900_PP_MEM_BASE         (0x002c)
209#define CS8900_PP_BPROM_BASE       (0x0030)
210#define CS8900_PP_BPROM_AMASK      (0x0034)
211#define CS8900_PP_EEPROM_CMD       (0x0040)
212#define CS8900_PP_EEPROM_DATA      (0x0042)
213#define CS8900_PP_RX_FRAME_BCNT    (0x0050)
214
215/*
216 * Configuration and Control Registers.
217 */
218
219#define CS8900_PP_RxCFG            (0x0102)
220#define CS8900_PP_RxCTL            (0x0104)
221#define CS8900_PP_TxCFG            (0x0106)
222#define CS8900_PP_TxCMD_READ       (0x0108)
223#define CS8900_PP_BufCFG           (0x010a)
224#define CS8900_PP_LineCFG          (0x0112)
225#define CS8900_PP_SelfCTL          (0x0114)
226#define CS8900_PP_BusCTL           (0x0116)
227#define CS8900_PP_TestCTL          (0x0118)
228
229/*
230 * Status and Event Registers.
231 */
232
233#define CS8900_PP_ISQ              (0x0120)
234#define CS8900_PP_RxEvent          (0x0124)
235#define CS8900_PP_TxEvent          (0x0128)
236#define CS8900_PP_BufEvent         (0x012c)
237#define CS8900_PP_RxMISS           (0x0130)
238#define CS8900_PP_TxCol            (0x0132)
239#define CS8900_PP_LineST           (0x0134)
240#define CS8900_PP_SelfST           (0x0136)
241#define CS8900_PP_BusST            (0x0138)
242#define CS8900_PP_TDR              (0x013c)
243
244/*
245 * Initiate Transmit Registers.
246 */
247
248#define CS8900_PP_TxCMD            (0x0144)
249#define CS8900_PP_TxLength         (0x0146)
250
251/*
252 * Address Filter Registers.
253 */
254
255#define CS8900_PP_LAF              (0x0150)
256#define CS8900_PP_IA               (0x0158)
257
258/*
259 * Frame Location.
260 */
261
262#define CS8900_PP_RxStatus         (0x0400)
263#define CS8900_PP_RxLength         (0x0402)
264#define CS8900_PP_RxFrameLoc       (0x0404)
265#define CS8900_PP_TxFrameLoc       (0x0a00)
266
267/*
268 * Bit Definitions of Registers.
269 */
270
271/*
272 * IO Packet Page Pointer.
273 */
274
275#define CS8900_PPP_AUTO_INCREMENT             (0x8000)
276
277/*
278 * Reg 3. Receiver Configuration.
279 */
280
281#define CS8900_RX_CONFIG_SKIP_1               (1 << 6)
282#define CS8900_RX_CONFIG_STREAM_ENABLE        (1 << 7)
283#define CS8900_RX_CONFIG_RX_OK                (1 << 8)
284#define CS8900_RX_CONFIG_RX_DMA               (1 << 9)
285#define CS8900_RX_CONFIG_RX_AUTO_DMA          (1 << 10)
286#define CS8900_RX_CONFIG_BUFFER_CRC           (1 << 11)
287#define CS8900_RX_CONFIG_CRC_ERROR            (1 << 12)
288#define CS8900_RX_CONFIG_RUNT                 (1 << 13)
289#define CS8900_RX_CONFIG_EXTRA_DATA           (1 << 14)
290
291/*
292 * Reg 4. Receiver Event.
293 */
294
295#define CS8900_RX_EVENT_HASH_IA_MATCH         (1 << 6)
296#define CS8900_RX_EVENT_DRIBBLE_BITS          (1 << 7)
297#define CS8900_RX_EVENT_RX_OK                 (1 << 8)
298#define CS8900_RX_EVENT_HASHED                (1 << 9)
299#define CS8900_RX_EVENT_IA                    (1 << 10)
300#define CS8900_RX_EVENT_BROADCAST             (1 << 11)
301#define CS8900_RX_EVENT_CRC_ERROR             (1 << 12)
302#define CS8900_RX_EVENT_RUNT                  (1 << 13)
303#define CS8900_RX_EVENT_EXTRA_DATA            (1 << 14)
304
305/*
306 * Reg 5. Receiver Control.
307 */
308
309#define CS8900_RX_CTRL_HASH_IA_MATCH          (1 << 6)
310#define CS8900_RX_CTRL_PROMISCUOUS            (1 << 7)
311#define CS8900_RX_CTRL_RX_OK                  (1 << 8)
312#define CS8900_RX_CTRL_MULTICAST              (1 << 9)
313#define CS8900_RX_CTRL_INDIVIDUAL             (1 << 10)
314#define CS8900_RX_CTRL_BROADCAST              (1 << 11)
315#define CS8900_RX_CTRL_CRC_ERROR              (1 << 12)
316#define CS8900_RX_CTRL_RUNT                   (1 << 13)
317#define CS8900_RX_CTRL_EXTRA_DATA             (1 << 14)
318
319/*
320 * Reg 7. Transmit Configuration.
321 */
322
323#define CS8900_TX_CONFIG_LOSS_OF_CARRIER      (1 << 6)
324#define CS8900_TX_CONFIG_SQ_ERROR             (1 << 7)
325#define CS8900_TX_CONFIG_TX_OK                (1 << 8)
326#define CS8900_TX_CONFIG_OUT_OF_WINDOW        (1 << 9)
327#define CS8900_TX_CONFIG_JABBER               (1 << 10)
328#define CS8900_TX_CONFIG_ANY_COLLISION        (1 << 11)
329#define CS8900_TX_CONFIG_16_COLLISION         (1 << 15)
330
331/*
332 * Reg 8. Transmit Event.
333 */
334
335#define CS8900_TX_EVENT_LOSS_OF_CARRIER       (1 << 6)
336#define CS8900_TX_EVENT_SQ_ERROR              (1 << 7)
337#define CS8900_TX_EVENT_TX_OK                 (1 << 8)
338#define CS8900_TX_EVENT_OUT_OF_WINDOW         (1 << 9)
339#define CS8900_TX_EVENT_JABBER                (1 << 10)
340#define CS8900_TX_EVENT_16_COLLISIONS         (1 << 15)
341
342/*
343 * Reg 9. Transmit Command Status.
344 */
345
346#define CS8900_TX_CMD_STATUS_TX_START_5       (0 << 6)
347#define CS8900_TX_CMD_STATUS_TX_START_381     (1 << 6)
348#define CS8900_TX_CMD_STATUS_TX_START_1021    (2 << 6)
349#define CS8900_TX_CMD_STATUS_TX_START_ENTIRE  (3 << 6)
350#define CS8900_TX_CMD_STATUS_FORCE            (1 << 8)
351#define CS8900_TX_CMD_STATUS_ONE_COLLISION    (1 << 9)
352#define CS8900_TX_CMD_STATUS_INHIBIT_CRC      (1 << 12)
353#define CS8900_TX_CMD_STATUS_TX_PAD_DISABLED  (1 << 13)
354
355/*
356 * Reg B. Buffer Configuration.
357 */
358
359#define CS8900_BUFFER_CONFIG_SW_INT           (1 << 6)
360#define CS8900_BUFFER_CONFIG_RX_DMA_DONE      (1 << 7)
361#define CS8900_BUFFER_CONFIG_RDY_FOR_TX       (1 << 8)
362#define CS8900_BUFFER_CONFIG_TX_UNDERRUN      (1 << 9)
363#define CS8900_BUFFER_CONFIG_RX_MISSED        (1 << 10)
364#define CS8900_BUFFER_CONFIG_RX_128_BYTES     (1 << 11)
365#define CS8900_BUFFER_CONFIG_TX_COL_OVF       (1 << 12)
366#define CS8900_BUFFER_CONFIG_RX_MISSED_OVF    (1 << 13)
367#define CS8900_BUFFER_CONFIG_RX_DEST_MATCH    (1 << 15)
368
369/*
370 * Reg C. Buffer Event.
371 */
372
373#define CS8900_BUFFER_EVENT_SW_INT            (1 << 6)
374#define CS8900_BUFFER_EVENT_RX_DMA_DONE       (1 << 7)
375#define CS8900_BUFFER_EVENT_RDY_FOR_TX        (1 << 8)
376#define CS8900_BUFFER_EVENT_TX_UNDERRUN       (1 << 9)
377#define CS8900_BUFFER_EVENT_RX_MISSED         (1 << 10)
378#define CS8900_BUFFER_EVENT_RX_128_BYTES      (1 << 11)
379#define CS8900_BUFFER_EVENT_RX_DEST_MATCH     (1 << 15)
380
381/*
382 * Reg 13. Line Control.
383 */
384
385#define CS8900_LINE_CTRL_RX_ON               (1 << 6)
386#define CS8900_LINE_CTRL_TX_ON               (1 << 7)
387#define CS8900_LINE_CTRL_AUI                 (1 << 8)
388#define CS8900_LINE_CTRL_10BASET             (0 << 9)
389#define CS8900_LINE_CTRL_AUTO_AUI_10BASET    (1 << 9)
390#define CS8900_LINE_CTRL_MOD_BACKOFF         (1 << 11)
391#define CS8900_LINE_CTRL_POLARITY_DISABLED   (1 << 12)
392#define CS8900_LINE_CTRL_2_PART_DEF_DISABLED (1 << 13)
393#define CS8900_LINE_CTRL_LO_RX_SQUELCH       (1 << 14)
394
395/*
396 * Reg 14. Line Status.
397 */
398
399#define CS8900_LINE_STATUS_LINK_OK           (1 << 7)
400#define CS8900_LINE_STATUS_AUI               (1 << 8)
401#define CS8900_LINE_STATUS_10_BASE_T         (1 << 9)
402#define CS8900_LINE_STATUS_POLARITY_OK       (1 << 12)
403#define CS8900_LINE_STATUS_CRS               (1 << 14)
404
405/*
406 * Reg 15. Self Control.
407 */
408
409#define CS8900_SELF_CTRL_RESET              (1 << 6)
410#define CS8900_SELF_CTRL_SW_SUSPEND         (1 << 8)
411#define CS8900_SELF_CTRL_HW_SLEEP           (1 << 9)
412#define CS8900_SELF_CTRL_HW_STANDBY         (1 << 10)
413#define CS8900_SELF_CTRL_HC0E               (1 << 12)
414#define CS8900_SELF_CTRL_HC1E               (1 << 13)
415#define CS8900_SELF_CTRL_HCB0               (1 << 14)
416#define CS8900_SELF_CTRL_HCB1               (1 << 15)
417
418/*
419 * Reg 16. Self Status.
420 */
421
422#define CS8900_SELF_STATUS_3_3_V            (1 << 6)
423#define CS8900_SELF_STATUS_INITD            (1 << 7)
424#define CS8900_SELF_STATUS_SIBUST           (1 << 8)
425#define CS8900_SELF_STATUS_EEPROM_PRESENT   (1 << 9)
426#define CS8900_SELF_STATUS_EEPROM_OK        (1 << 10)
427#define CS8900_SELF_STATUS_EL_PRESENT       (1 << 11)
428#define CS8900_SELF_STATUS_EE_SIZE          (1 << 12)
429
430/*
431 * Reg 17. Bus Control.
432 */
433
434#define CS8900_BUS_CTRL_RESET_RX_DMA        (1 << 6)
435#define CS8900_BUS_CTRL_USE_SA              (1 << 9)
436#define CS8900_BUS_CTRL_MEMORY_ENABLE       (1 << 10)
437#define CS8900_BUS_CTRL_DMA_BURST           (1 << 11)
438#define CS8900_BUS_CTRL_IOCHRDYE            (1 << 12)
439#define CS8900_BUS_CTRL_RX_DMA_SIZE         (1 << 13)
440#define CS8900_BUS_CTRL_ENABLE_INT          (1 << 15)
441
442/*
443 * Reg 18. Bus Status.
444 */
445
446#define CS8900_BUS_STATUS_TX_BID_ERROR      (1 << 7)
447#define CS8900_BUS_STATUS_RDY_FOR_TX_NOW    (1 << 8)
448
449/*
450 * Trace for debugging the isq processing. Define to 1 to enable.
451 */
452#define CS8900_TRACE      0
453#define CS8900_TRACE_SIZE (400)
454
455/*
456 * The default receive queue size. If the BSP sets this field to
457 * 0 this default is used.
458 */
459#define CS8900_RX_QUEUE_SIZE (30)
460
461/*
462 * Stats, more for debugging than anything else.
463 */
464
465typedef struct
466{
467  unsigned long rx_packets;     /* total packets received         */
468  unsigned long tx_packets;     /* total packets transmitted      */
469  unsigned long rx_bytes;       /* total bytes received           */
470  unsigned long tx_bytes;       /* total bytes transmitted        */
471  unsigned long rx_interrupts;  /* total number of rx interrupts  */
472  unsigned long tx_interrupts;  /* total number of tx interrupts  */
473
474  /* detailed rx errors: */
475  unsigned long rx_dropped;     /* no mbufs in queue              */
476  unsigned long rx_no_mbufs;    /* no mbufs                       */
477  unsigned long rx_no_clusters; /* no clusters                    */
478  unsigned long rx_oversize_errors;
479  unsigned long rx_crc_errors;    /* recved pkt with crc error    */
480  unsigned long rx_runt_errors;
481  unsigned long rx_missed_errors; /* receiver missed packet       */
482
483  /* detailed tx errors */
484  unsigned long tx_ok;
485  unsigned long tx_collisions;
486  unsigned long tx_bid_errors;
487  unsigned long tx_wait_for_rdy4tx;
488  unsigned long tx_rdy4tx;
489  unsigned long tx_underrun_errors;
490  unsigned long tx_dropped;
491  unsigned long tx_resends;
492
493  /* interrupt watch dog */
494  unsigned long int_swint_req;
495  unsigned long int_swint_res;
496  unsigned long int_lockup;
497
498  unsigned long interrupts;
499
500} eth_statistics;
501
502/*
503 * CS8900 device structure
504 */
505
506typedef struct
507{
508  /*
509   * Device number.
510   */
511
512  int dev;
513
514  /*
515   * Memory base addresses. Making mem_base 0 forces the
516   * driver to perform only I/O space accesses.
517   */
518
519  unsigned long  io_base;
520  unsigned long  mem_base;
521
522  /*
523   * The IRQ level as defined in the datasheet for the CS8900.
524   *
525   *      ISA BUS   Pin    Value
526   *       IRQ10   INTRQ0    0
527   *       IRQ11   INTRQ1    1
528   *       IRQ12   INTRQ2    2
529   *       IRQ5    INTRQ3    3
530   */
531
532  int            irq_level;
533
534  /*
535   * The MAC address.
536   */
537
538  unsigned char mac_address[6];
539
540  /*
541   * The bsdnet information structure.
542   */
543
544  struct arpcom  arpcom;
545
546  /*
547   * Driver state and resources.
548   */
549
550  int            accept_bcast;
551  int            tx_active;
552
553  rtems_id       rx_task;
554  rtems_id       tx_task;
555
556  /*
557   * The queues. FIXME : these should be changed to be mbuf lists.
558   */
559
560  struct mbuf    *rx_ready_head;
561  struct mbuf    *rx_ready_tail;
562  int            rx_ready_len;
563
564  struct mbuf    *rx_loaded_head;
565  struct mbuf    *rx_loaded_tail;
566  int            rx_loaded_len;
567
568  /*
569   * Number of mbufs queued for the interrupt handler to
570   * loop reading.
571   */
572
573  int            rx_queue_size;
574
575#if CS8900_TRACE
576  unsigned short trace_key[CS8900_TRACE_SIZE];
577  unsigned long  trace_var[CS8900_TRACE_SIZE];
578  unsigned long  trace_time[CS8900_TRACE_SIZE];
579  int            trace_in;
580#endif
581
582  /**
583   * Standard(!) ethernet statistics
584   */
585
586  eth_statistics eth_stats;
587
588} cs8900_device;
589
590/*
591 * Link active returns the state of the PHY.
592 *
593 * @param cs Pointer to the device structure.
594 */
595
596int cs8900_link_active (cs8900_device *cs);
597
598/**
599 * The RTEMS network stack driver attach function that is loaded into the
600 * the rtems_bsdnet_ifconfig struct. The network stack will call this
601 * function when attaching the driver. The BSP must load the 'drv_ctrl'
602 * field of the structure before calling the 'rtems_bsdnet_attach'
603 * function.
604 *
605 * @param config The RTEMS BSD config structure.
606 *
607 * @param attaching True is the stack is attaching the interface.
608 *
609 * @retval int Set to 1 if the device has attached.
610 */
611
612int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config,
613                          int                          attaching);
614
615/**
616 * The BSP specific interrupt wrapper calls this function when a device
617 * interrupt occurs.
618 *
619 * @param v The RTEMS vector number that generated the interrupt.
620 *
621 * @param cs Pointer to the device structure passed to the interrupt
622 *           catch function provided by the BSP.
623 *
624 * @retval rtems_isr The standard ISR return type.
625 */
626
627rtems_isr cs8900_interrupt (rtems_vector_number v, void *cs);
628
629/**
630 * Get the MAC address for the interface.
631 *
632 * @param cs Pointer to the device structure.
633 *
634 * @param mac_address Pointer to the memory to load the MAC address. This
635 *                    is a 6 byte buffer so do not exceeed the bounds.
636 */
637
638void cs8900_get_mac_addr (cs8900_device *cs, unsigned char *mac_address);
639
640/**
641 * Catch the device interrupt. When the interrupt is called call the
642 * function 'cs8900_interrupt'.
643 *
644 * BSP to provide this function.
645 *
646 * @param cs Pointer to the device structure.
647 */
648
649void cs8900_attach_interrupt (cs8900_device *cs);
650
651/**
652 * Detach the device interrupt.
653 *
654 * BSP to provide this function.
655 *
656 * @param cs Pointer to the device structure.
657 */
658
659void cs8900_detach_interrupt (cs8900_device *cs);
660
661/**
662 * Write to an IO space register.
663 *
664 * BSP to provide this function.
665 *
666 * @param cs Pointer to the device structure.
667 *
668 * @param reg Register offset from the IO base.
669 *
670 * @param data The data to be written to the register.
671 */
672
673void cs8900_io_set_reg (cs8900_device *cs,
674                        unsigned short reg, unsigned short data);
675
676/**
677 * Read an IO space register.
678 *
679 * BSP to provide this function.
680 *
681 * @param cs Pointer to the device structure.
682 *
683 * @param reg Register offset from the IO base.
684 *
685 * @retval unsigned short The register data.
686 */
687
688unsigned short cs8900_io_get_reg (cs8900_device *cs, unsigned short reg);
689
690/**
691 * Write to a memory space register. Will only be called is the mem_base
692 * field of the 'cs' struct is not 0.
693 *
694 * BSP to provide this function.
695 *
696 * @param cs Pointer to the device structure.
697 *
698 * @param reg Register offset from the memory base.
699 *
700 * @param data The data to be written to the register.
701 */
702
703void cs8900_mem_set_reg (cs8900_device *cs,
704                         unsigned long reg, unsigned short data);
705
706/**
707 * Read a memory space register. Will only be called is the mem_base
708 * field of the 'cs' struct is not 0.
709 *
710 * BSP to provide this function.
711 *
712 * @param cs Pointer to the device structure.
713 *
714 * @param reg Register offset from the IO base.
715 *
716 * @retval unsigned short The register data.
717 */
718
719unsigned short cs8900_mem_get_reg (cs8900_device *cs, unsigned long reg);
720
721/**
722 * Write a block of data to the interface. The BSP codes if this is an IO or
723 * memory space write.
724 *
725 * BSP to provide this function.
726 *
727 * @param cs Pointer to the device structure.
728 *
729 * @param len The length of data to write.
730 *
731 * @param data Pointer to the data to be written.
732 */
733
734void cs8900_put_data_block (cs8900_device *cs, int len, unsigned char *data);
735
736/**
737 * Read a block of data from the interface. The BSP codes if this is an IO or
738 * memory space write. The read must not be longer than the MTU size.
739 *
740 * BSP to provide this function.
741 *
742 * @param cs Pointer to the device structure.
743 *
744 * @param data Pointer to the buffer where the data is to be written.
745 *
746 * @retval unsigned short The number of bytes read from the device.
747 */
748
749unsigned short cs8900_get_data_block (cs8900_device *cs, unsigned char *data);
750
751/**
752 * Load a mbuf chain to the device ready for tranmission.
753 *
754 * BSP to provide this function.
755 *
756 * @param cs Pointer to the device structure.
757 *
758 * @param m Pointer to the head of an mbuf chain.
759 */
760
761void cs8900_tx_load (cs8900_device *cs, struct mbuf *m);
762
763#endif
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