source: rtems/c/src/libchip/network/cs8900.h @ 1f14ff4

4.104.114.84.95
Last change on this file since 1f14ff4 was 1f14ff4, checked in by Joel Sherrill <joel.sherrill@…>, on 11/03/00 at 15:19:05

2000-11-03 Chris Johns <ccj@…>

  • network/README.cs8900, network/cs8900.c, network/cs8900.h: New files.
  • network/Makefile.am: Modified to reflect above.
  • Property mode set to 100644
File size: 12.9 KB
Line 
1/*
2  ------------------------------------------------------------------------
3  $Id$
4  ------------------------------------------------------------------------
5
6  My Right Boot, a boot ROM for embedded hardware.
7 
8  Copyright Cybertec Pty Ltd, 2000
9  All rights reserved Cybertec Pty Ltd, 2000
10 
11  COPYRIGHT (c) 1989-1998.
12  On-Line Applications Research Corporation (OAR).
13  Copyright assigned to U.S. Government, 1994.
14
15  The license and distribution terms for this file may be
16  found in the file LICENSE in this distribution or at
17  http://www.OARcorp.com/rtems/license.html.
18 
19  ------------------------------------------------------------------------
20
21  CS8900 net boot driver.
22
23 */
24
25#if !defined(_CS8900_H_)
26#define _CS8900_H_
27
28#include <rtems.h>
29#include <rtems/error.h>
30#include <rtems/rtems_bsdnet.h>
31
32#include <sys/param.h>
33#include <sys/mbuf.h>
34#include <sys/socket.h>
35#include <sys/sockio.h>
36
37#include <net/if.h>
38
39#include <netinet/in.h>
40#include <netinet/if_ether.h>
41
42#define ET_MINLEN 60
43
44/*
45 * CS8900 device register definitions
46 */
47
48/*
49 * Crystal ESIA product id.
50 */
51
52#define CS8900_ESIA_ID             (0x630e)
53
54/*
55 * IO Registers.
56 */
57
58#define CS8900_IO_RX_TX_DATA_PORT0 (0x0000)
59#define CS8900_IO_TX_TX_DATA_PORT1 (0x0002)
60#define CS8900_IO_TxCMD            (0x0004)
61#define CS8900_IO_TxLength         (0x0006)
62#define CS8900_IO_ISQ              (0x0008)
63#define CS8900_IO_PACKET_PAGE_PTR  (0x000a)
64#define CS8900_IO_PP_DATA_PORT0    (0x000c)
65#define CS8900_IO_PP_DATA_PORT1    (0x000e)
66
67/*
68 * Packet Page Registers.
69 */
70
71/*
72 * Bus Interface Registers.
73 */
74
75#define CS8900_PP_PROD_ID          (0x0000)
76#define CS8900_PP_IO_BASE          (0x0020)
77#define CS8900_PP_INT              (0x0022)
78#define CS8900_PP_DMA_CHANNEL      (0x0024)
79#define CS8900_PP_DMA_SOF          (0x0026)
80#define CS8900_PP_DMA_FRM_CNT      (0x0028)
81#define CS8900_PP_DMA_RX_BCNT      (0x002a)
82#define CS8900_PP_MEM_BASE         (0x002c)
83#define CS8900_PP_BPROM_BASE       (0x0030)
84#define CS8900_PP_BPROM_AMASK      (0x0034)
85#define CS8900_PP_EEPROM_CMD       (0x0040)
86#define CS8900_PP_EEPROM_DATA      (0x0042)
87#define CS8900_PP_RX_FRAME_BCNT    (0x0050)
88
89/*
90 * Configuration and Control Registers.
91 */
92
93#define CS8900_PP_RxCFG            (0x0102)
94#define CS8900_PP_RxCTL            (0x0104)
95#define CS8900_PP_TxCFG            (0x0106)
96#define CS8900_PP_TxCMD_READ       (0x0108)
97#define CS8900_PP_BufCFG           (0x010a)
98#define CS8900_PP_LineCFG          (0x0112)
99#define CS8900_PP_SelfCTL          (0x0114)
100#define CS8900_PP_BusCTL           (0x0116)
101#define CS8900_PP_TestCTL          (0x0118)
102
103/*
104 * Status and Event Registers.
105 */
106
107#define CS8900_PP_ISQ              (0x0120)
108#define CS8900_PP_RxEvent          (0x0124)
109#define CS8900_PP_TxEvent          (0x0128)
110#define CS8900_PP_BufEvent         (0x012c)
111#define CS8900_PP_RxMISS           (0x0130)
112#define CS8900_PP_TxCol            (0x0132)
113#define CS8900_PP_LineST           (0x0134)
114#define CS8900_PP_SelfST           (0x0136)
115#define CS8900_PP_BusST            (0x0138)
116#define CS8900_PP_TDR              (0x013c)
117
118/*
119 * Initiate Transmit Registers.
120 */
121
122#define CS8900_PP_TxCMD            (0x0144)
123#define CS8900_PP_TxLength         (0x0146)
124
125/*
126 * Address Filter Registers.
127 */
128
129#define CS8900_PP_LAF              (0x0150)
130#define CS8900_PP_IA               (0x0158)
131
132/*
133 * Frame Location.
134 */
135
136#define CS8900_PP_RxStatus         (0x0400)
137#define CS8900_PP_RxLength         (0x0402)
138#define CS8900_PP_RxFrameLoc       (0x0404)
139#define CS8900_PP_TxFrameLoc       (0x0a00)
140
141/*
142 * Bit Definitions of Registers.
143 */
144
145/*
146 * IO Packet Page Pointer.
147 */
148
149#define CS8900_PPP_AUTO_INCREMENT             (0x8000)
150
151/*
152 * Reg 3. Receiver Configuration.
153 */
154
155#define CS8900_RX_CONFIG_SKIP_1               (1 << 6)
156#define CS8900_RX_CONFIG_STREAM_ENABLE        (1 << 7)
157#define CS8900_RX_CONFIG_RX_OK                (1 << 8)
158#define CS8900_RX_CONFIG_RX_DMA               (1 << 9)
159#define CS8900_RX_CONFIG_RX_AUTO_DMA          (1 << 10)
160#define CS8900_RX_CONFIG_BUFFER_CRC           (1 << 11)
161#define CS8900_RX_CONFIG_CRC_ERROR            (1 << 12)
162#define CS8900_RX_CONFIG_RUNT                 (1 << 13)
163#define CS8900_RX_CONFIG_EXTRA_DATA           (1 << 14)
164
165/*
166 * Reg 4. Receiver Event.
167 */
168
169#define CS8900_RX_EVENT_HASH_IA_MATCH         (1 << 6)
170#define CS8900_RX_EVENT_DRIBBLE_BITS          (1 << 7)
171#define CS8900_RX_EVENT_RX_OK                 (1 << 8)
172#define CS8900_RX_EVENT_HASHED                (1 << 9)
173#define CS8900_RX_EVENT_IA                    (1 << 10)
174#define CS8900_RX_EVENT_BROADCAST             (1 << 11)
175#define CS8900_RX_EVENT_CRC_ERROR             (1 << 12)
176#define CS8900_RX_EVENT_RUNT                  (1 << 13)
177#define CS8900_RX_EVENT_EXTRA_DATA            (1 << 14)
178
179/*
180 * Reg 5. Receiver Control.
181 */
182
183#define CS8900_RX_CTRL_HASH_IA_MATCH          (1 << 6)
184#define CS8900_RX_CTRL_PROMISCUOUS            (1 << 7)
185#define CS8900_RX_CTRL_RX_OK                  (1 << 8)
186#define CS8900_RX_CTRL_MULTICAST              (1 << 9)
187#define CS8900_RX_CTRL_INDIVIDUAL             (1 << 10)
188#define CS8900_RX_CTRL_BROADCAST              (1 << 11)
189#define CS8900_RX_CTRL_CRC_ERROR              (1 << 12)
190#define CS8900_RX_CTRL_RUNT                   (1 << 13)
191#define CS8900_RX_CTRL_EXTRA_DATA             (1 << 14)
192
193/*
194 * Reg 7. Transmit Configuration.
195 */
196
197#define CS8900_TX_CONFIG_LOSS_OF_CARRIER      (1 << 6)
198#define CS8900_TX_CONFIG_SQ_ERROR             (1 << 7)
199#define CS8900_TX_CONFIG_TX_OK                (1 << 8)
200#define CS8900_TX_CONFIG_OUT_OF_WINDOW        (1 << 9)
201#define CS8900_TX_CONFIG_JABBER               (1 << 10)
202#define CS8900_TX_CONFIG_ANY_COLLISION        (1 << 11)
203#define CS8900_TX_CONFIG_16_COLLISION         (1 << 15)
204
205/*
206 * Reg 8. Transmit Event.
207 */
208
209#define CS8900_TX_EVENT_LOSS_OF_CARRIER       (1 << 6)
210#define CS8900_TX_EVENT_SQ_ERROR              (1 << 7)
211#define CS8900_TX_EVENT_TX_OK                 (1 << 8)
212#define CS8900_TX_EVENT_OUT_OF_WINDOW         (1 << 9)
213#define CS8900_TX_EVENT_JABBER                (1 << 10)
214#define CS8900_TX_EVENT_16_COLLISIONS         (1 << 15)
215
216/*
217 * Reg 9. Transmit Command Status.
218 */
219
220#define CS8900_TX_CMD_STATUS_TX_START_5       (0 << 6)
221#define CS8900_TX_CMD_STATUS_TX_START_381     (1 << 6)
222#define CS8900_TX_CMD_STATUS_TX_START_1021    (2 << 6)
223#define CS8900_TX_CMD_STATUS_TX_START_ENTIRE  (3 << 6)
224#define CS8900_TX_CMD_STATUS_FORCE            (1 << 8)
225#define CS8900_TX_CMD_STATUS_ONE_COLLISION    (1 << 9)
226#define CS8900_TX_CMD_STATUS_INHIBIT_CRC      (1 << 12)
227#define CS8900_TX_CMD_STATUS_TX_PAD_DISABLED  (1 << 13)
228
229/*
230 * Reg B. Buffer Configuration.
231 */
232
233#define CS8900_BUFFER_CONFIG_SW_INT           (1 << 6)
234#define CS8900_BUFFER_CONFIG_RX_DMA_DONE      (1 << 7)
235#define CS8900_BUFFER_CONFIG_RDY_FOR_TX       (1 << 8)
236#define CS8900_BUFFER_CONFIG_TX_UNDERRUN      (1 << 9)
237#define CS8900_BUFFER_CONFIG_RX_MISSED        (1 << 10)
238#define CS8900_BUFFER_CONFIG_RX_128_BYTES     (1 << 11)
239#define CS8900_BUFFER_CONFIG_TX_COL_OVF       (1 << 12)
240#define CS8900_BUFFER_CONFIG_RX_MISSED_OVF    (1 << 13)
241#define CS8900_BUFFER_CONFIG_RX_DEST_MATCH    (1 << 15)
242
243/*
244 * Reg C. Buffer Event.
245 */
246
247#define CS8900_BUFFER_EVENT_SW_INT            (1 << 6)
248#define CS8900_BUFFER_EVENT_RX_DMA_DONE       (1 << 7)
249#define CS8900_BUFFER_EVENT_RDY_FOR_TX        (1 << 8)
250#define CS8900_BUFFER_EVENT_TX_UNDERRUN       (1 << 9)
251#define CS8900_BUFFER_EVENT_RX_MISSED         (1 << 10)
252#define CS8900_BUFFER_EVENT_RX_128_BYTES      (1 << 11)
253#define CS8900_BUFFER_EVENT_RX_DEST_MATCH     (1 << 15)
254
255/*
256 * Reg 13. Line Control.
257 */
258
259#define CS8900_LINE_CTRL_RX_ON               (1 << 6)
260#define CS8900_LINE_CTRL_TX_ON               (1 << 7)
261#define CS8900_LINE_CTRL_AUI                 (1 << 8)
262#define CS8900_LINE_CTRL_10BASET             (0 << 9)
263#define CS8900_LINE_CTRL_AUTO_AUI_10BASET    (1 << 9)
264#define CS8900_LINE_CTRL_MOD_BACKOFF         (1 << 11)
265#define CS8900_LINE_CTRL_POLARITY_DISABLED   (1 << 12)
266#define CS8900_LINE_CTRL_2_PART_DEF_DISABLED (1 << 13)
267#define CS8900_LINE_CTRL_LO_RX_SQUELCH       (1 << 14)
268
269/*
270 * Reg 14. Line Status.
271 */
272
273#define CS8900_LINE_STATUS_LINK_OK           (1 << 7)
274#define CS8900_LINE_STATUS_AUI               (1 << 8)
275#define CS8900_LINE_STATUS_10_BASE_T         (1 << 9)
276#define CS8900_LINE_STATUS_POLARITY_OK       (1 << 12)
277#define CS8900_LINE_STATUS_CRS               (1 << 14)
278
279/*
280 * Reg 15. Self Control.
281 */
282
283#define CS8900_SELF_CTRL_RESET              (1 << 6)
284#define CS8900_SELF_CTRL_SW_SUSPEND         (1 << 8)
285#define CS8900_SELF_CTRL_HW_SLEEP           (1 << 9)
286#define CS8900_SELF_CTRL_HW_STANDBY         (1 << 10)
287#define CS8900_SELF_CTRL_HC0E               (1 << 12)
288#define CS8900_SELF_CTRL_HC1E               (1 << 13)
289#define CS8900_SELF_CTRL_HCB0               (1 << 14)
290#define CS8900_SELF_CTRL_HCB1               (1 << 15)
291
292/*
293 * Reg 16. Self Status.
294 */
295
296#define CS8900_SELF_STATUS_3_3_V            (1 << 6)
297#define CS8900_SELF_STATUS_INITD            (1 << 7)
298#define CS8900_SELF_STATUS_SIBUST           (1 << 8)
299#define CS8900_SELF_STATUS_EEPROM_PRESENT   (1 << 9) 
300#define CS8900_SELF_STATUS_EEPROM_OK        (1 << 10)
301#define CS8900_SELF_STATUS_EL_PRESENT       (1 << 11)
302#define CS8900_SELF_STATUS_EE_SIZE          (1 << 12)
303
304/*
305 * Reg 17. Bus Control.
306 */
307
308#define CS8900_BUS_CTRL_RESET_RX_DMA        (1 << 6)
309#define CS8900_BUS_CTRL_USE_SA              (1 << 9)
310#define CS8900_BUS_CTRL_MEMORY_ENABLE       (1 << 10)
311#define CS8900_BUS_CTRL_DMA_BURST           (1 << 11)
312#define CS8900_BUS_CTRL_IOCHRDYE            (1 << 12)
313#define CS8900_BUS_CTRL_RX_DMA_SIZE         (1 << 13)
314#define CS8900_BUS_CTRL_ENABLE_INT          (1 << 15)
315
316/*
317 * Reg 18. Bus Status.
318 */
319
320#define CS8900_BUS_STATUS_TX_BID_ERROR      (1 << 7)
321#define CS8900_BUS_STATUS_RDY_FOR_TX_NOW    (1 << 8)
322
323/*
324 * Trace for debugging the isq processing. Define to 1 to enable.
325 */
326#define CS8900_TRACE      0
327#define CS8900_TRACE_SIZE (400)
328
329/*
330 * Stats, more for debugging than anything else.
331 */
332
333typedef struct
334{
335  unsigned long rx_packets;     /* total packets received         */
336  unsigned long tx_packets;     /* total packets transmitted      */
337  unsigned long rx_bytes;       /* total bytes received           */
338  unsigned long tx_bytes;       /* total bytes transmitted        */
339  unsigned long rx_interrupts;  /* total number of rx interrupts  */
340  unsigned long tx_interrupts;  /* total number of tx interrupts  */
341
342  /* detailed rx errors: */
343  unsigned long rx_dropped;     /* no mbufs in queue              */
344  unsigned long rx_no_mbufs;    /* no mbufs                       */
345  unsigned long rx_no_clusters; /* no clusters                    */
346  unsigned long rx_oversize_errors;
347  unsigned long rx_crc_errors;    /* recved pkt with crc error    */
348  unsigned long rx_runt_errors;
349  unsigned long rx_missed_errors; /* receiver missed packet       */
350
351  /* detailed tx errors */
352  unsigned long tx_ok;
353  unsigned long tx_collisions;
354  unsigned long tx_bid_errors;
355  unsigned long tx_wait_for_rdy4tx;
356  unsigned long tx_rdy4tx;
357  unsigned long tx_underrun_errors;
358  unsigned long tx_dropped;
359  unsigned long tx_resends;
360 
361  /* interrupt watch dog */
362  unsigned long int_swint_req;
363  unsigned long int_swint_res;
364  unsigned long int_lockup;
365 
366  unsigned long interrupts;
367
368} eth_statistics;
369
370/*
371 * CS8900 device structure
372 */
373
374typedef struct
375{
376  /*
377   * Device number.
378   */
379
380  int dev;
381
382  /*
383   * The bsdnet information structure. 
384   */
385
386  struct arpcom arpcom;
387
388  /*
389   * Driver state and resources.
390   */
391
392  int            accept_bcast;
393  int            tx_active;
394 
395  rtems_id       rx_task;
396  rtems_id       tx_task;
397
398  /*
399   * The queues. FIXME : these should be changed to be mbuf lists.
400   */
401  struct mbuf    *rx_ready_head;
402  struct mbuf    *rx_ready_tail;
403  int            rx_ready_len;
404 
405  struct mbuf    *rx_loaded_head;
406  struct mbuf    *rx_loaded_tail;
407  int            rx_loaded_len;
408
409#if CS8900_TRACE
410  unsigned short trace_key[CS8900_TRACE_SIZE];
411  unsigned long  trace_var[CS8900_TRACE_SIZE];
412  unsigned long  trace_time[CS8900_TRACE_SIZE];
413  int            trace_in;
414#endif
415
416  /*
417   * Standard(!) ethernet statistics
418   */
419
420  eth_statistics eth_stats;
421
422} cs8900_device;
423
424/*
425 * Link is active, and RX count.
426 */
427
428int           cs8900_link_active (int dev);
429int           cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config,
430                                    int                          attaching);
431rtems_isr     cs8900_interrupt (rtems_vector_number v, void *cs);
432
433/*
434 * Functions Users Provide to implement the driver.
435 */
436
437void           cs8900_attach_interrupt (int dev, cs8900_device *cs);
438void           cs8900_detach_interrupt (int dev);
439void           cs8900_get_mac_addr (int dev, unsigned char *mac_address);
440void           cs8900_io_set_reg (int dev, unsigned short reg, unsigned short data);
441unsigned short cs8900_io_get_reg (int dev, unsigned short reg);
442void           cs8900_mem_set_reg (int dev, unsigned long reg, unsigned short data);
443unsigned short cs8900_mem_get_reg (int dev, unsigned long reg);
444void           cs8900_put_data_block (int dev, int len, unsigned char *data);
445unsigned short cs8900_get_data_block (int dev, unsigned char *data);
446void           cs8900_tx_load (int dev, struct mbuf *m);
447
448#endif
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