| 1 | /* entry.s |
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| 2 | * |
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| 3 | * This file contains the entry point for the application. |
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| 4 | * The name of this entry point is compiler dependent. |
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| 5 | * It jumps to the BSP which is responsible for performing |
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| 6 | * all initialization. |
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| 7 | * |
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| 8 | * COPYRIGHT (c) 1989-1998. |
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| 9 | * On-Line Applications Research Corporation (OAR). |
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| 10 | * Copyright assigned to U.S. Government, 1994. |
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| 11 | * |
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| 12 | * The license and distribution terms for this file may be |
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| 13 | * found in the file LICENSE in this distribution or at |
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| 14 | * http://www.OARcorp.com/rtems/license.html. |
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| 15 | * |
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| 16 | * $Id$ |
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| 17 | */ |
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| 18 | |
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| 19 | #include "asm.h" |
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| 20 | |
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| 21 | #if (M68K_COLDFIRE_ARCH == 0) /* All ColdFire BSPs must provide their own start vector */ |
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| 22 | |
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| 23 | BEGIN_CODE |
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| 24 | | Default entry points for: |
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| 25 | PUBLIC (start) | GNU |
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| 26 | PUBLIC (M68Kvec) | Vector Table |
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| 27 | |
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| 28 | SYM (start): |
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| 29 | SYM (M68Kvec): | standard location for vectors |
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| 30 | nop | for linkers with problem |
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| 31 | | location zero |
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| 32 | jmp SYM (start_around) |
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| 33 | |
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| 34 | /* |
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| 35 | * We can use the following space as our vector table |
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| 36 | * if the CPU has a VBR or we can save vector table in it |
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| 37 | * if the CPU does not. |
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| 38 | */ |
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| 39 | |
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| 40 | .space 4088 | to avoid initial intr stack |
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| 41 | | from 135BUG on MVME13? |
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| 42 | | and start code at 0x4000 |
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| 43 | SYM (vectors): |
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| 44 | .space 1016 | reserve space for rest of vectors |
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| 45 | |
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| 46 | #if ( M68K_HAS_SEPARATE_STACKS == 1 ) |
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| 47 | SYM (lowintstack): |
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| 48 | .space 4092 | reserve for interrupt stack |
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| 49 | SYM (hiintstack): |
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| 50 | .space 4 | end of interrupt stack |
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| 51 | #endif |
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| 52 | |
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| 53 | PUBLIC (start_around) |
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| 54 | SYM (start_around): |
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| 55 | move.w sr, SYM (initial_sr) |
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| 56 | oriw #0x3700,sr | SUPV MODE,INTERRUPTS OFF!!! |
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| 57 | #if ( M68K_HAS_SEPARATE_STACKS == 1 ) |
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| 58 | movec isp,a0 |
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| 59 | move.l a0, SYM (initial_isp) |
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| 60 | movec usp,a0 |
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| 61 | move.l a0, SYM (initial_usp) |
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| 62 | movec msp,a0 |
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| 63 | move.l a0, SYM (initial_msp) |
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| 64 | #else |
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| 65 | move.l a7, SYM (initial_msp) |
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| 66 | #endif |
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| 67 | |
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| 68 | | |
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| 69 | | zero out uninitialized data area |
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| 70 | | |
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| 71 | zerobss: |
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| 72 | moveal # SYM (end),a0 | find end of .bss |
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| 73 | moveal # SYM (bss_start),a1 | find beginning of .bss |
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| 74 | movel #0,d0 |
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| 75 | |
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| 76 | loop: movel #0,a1@+ | to zero out uninitialized |
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| 77 | cmpal a0,a1 |
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| 78 | jlt loop | loop until _end reached |
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| 79 | |
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| 80 | movel # SYM (end),d0 | d0 = end of bss/start of heap |
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| 81 | addl # SYM (heap_size),d0 | d0 = end of heap |
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| 82 | movel d0, SYM (stack_start) | Save for brk() routine |
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| 83 | addl # SYM (stack_size),d0 | make room for stack |
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| 84 | andl #0xffffffc0,d0 | align it on 16 byte boundary |
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| 85 | movw #0x3700,sr | SUPV MODE,INTERRUPTS OFF!!! |
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| 86 | movel d0,a7 | set master stack pointer |
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| 87 | movel d0,a6 | set base pointer |
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| 88 | |
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| 89 | /* |
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| 90 | * RTEMS should maintain a separate interrupt stack on CPUs |
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| 91 | * without one in hardware. This is currently not supported |
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| 92 | * on versions of the m68k without a HW intr stack. |
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| 93 | */ |
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| 94 | |
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| 95 | #if ( M68K_HAS_SEPARATE_STACKS == 1 ) |
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| 96 | lea SYM (hiintstack),a0 | a0 = high end of intr stack |
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| 97 | movec a0,isp | set interrupt stack |
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| 98 | #endif |
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| 99 | movel #0,a7@- | push environp |
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| 100 | movel #0,a7@- | push argv |
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| 101 | movel #0,a7@- | push argc |
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| 102 | |
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| 103 | jsr SYM (boot_card) |
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| 104 | addl #12,a7 |
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| 105 | |
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| 106 | #if ( M68K_HAS_SEPARATE_STACKS == 1 ) |
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| 107 | move.l SYM (initial_isp),a0 |
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| 108 | movec a0,isp |
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| 109 | move.l SYM (initial_usp),a0 |
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| 110 | movec a0,usp |
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| 111 | move.l SYM (initial_msp),a0 |
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| 112 | movec a0,msp |
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| 113 | #else |
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| 114 | movea.l SYM (initial_msp),a7 |
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| 115 | #endif |
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| 116 | move.w SYM (initial_sr),sr |
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| 117 | rts |
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| 118 | |
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| 119 | END_CODE |
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| 120 | |
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| 121 | BEGIN_DATA |
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| 122 | |
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| 123 | PUBLIC (start_frame) |
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| 124 | SYM (start_frame): |
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| 125 | .space 4,0 |
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| 126 | |
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| 127 | PUBLIC (stack_start) |
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| 128 | SYM (stack_start): |
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| 129 | .space 4,0 |
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| 130 | END_DATA |
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| 131 | |
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| 132 | BEGIN_BSS |
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| 133 | |
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| 134 | PUBLIC (environ) |
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| 135 | .align 2 |
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| 136 | SYM (environ): |
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| 137 | .long 0 |
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| 138 | |
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| 139 | PUBLIC (initial_isp) |
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| 140 | SYM (initial_isp): |
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| 141 | .space 4 |
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| 142 | |
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| 143 | PUBLIC (initial_msp) |
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| 144 | SYM (initial_msp): |
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| 145 | .space 4 |
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| 146 | |
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| 147 | PUBLIC (initial_usp) |
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| 148 | SYM (initial_usp): |
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| 149 | .space 4 |
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| 150 | |
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| 151 | PUBLIC (initial_sr) |
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| 152 | SYM (initial_sr): |
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| 153 | .space 2 |
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| 154 | |
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| 155 | PUBLIC (heap_size) |
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| 156 | .set SYM (heap_size),0x2000 |
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| 157 | |
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| 158 | PUBLIC (stack_size) |
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| 159 | .set SYM (stack_size),0x1000 |
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| 160 | |
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| 161 | |
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| 162 | END_DATA |
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| 163 | #endif |
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| 164 | END |
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| 165 | |
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| 166 | |
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