source: rtems/c/src/lib/librdbg/i386/rdbg_f.c @ 196094eb

4.104.114.84.95
Last change on this file since 196094eb was 4721cf1, checked in by Joel Sherrill <joel.sherrill@…>, on Dec 3, 1998 at 11:54:14 PM

Patch from Emmanuel Raguet <raguet@…> to add remote debug server
and RPC support to RTEMS. Thanks. :) Email follows:

Hello,

For Xmas, here is the Remote Debugger on RTEMS !

Here are 2 patches for the Remote Debugger on RTEMS for pc386 from Linux
host :

  • one for RTEMS it self,
  • one for GDB-4.17.

1/ RTEMS patch
--------------

This patch adds 2 libraries :

  • a simplified SUN RPC library
  • the Remote Debugger library

The configuration command is the following :
../rtems4/configure --target=i386-rtemself --enable-rtemsbsp=pc386
--enable-rdbg

The SUN RPC library is built only if networking is set.
The RDBG library is built if networking and enable-rdbg are set.

The function used to initialize the debugger is :

rtems_rdbg_initialize ();

A special function has been created to force a task to be
in a "debug" state : enterRdbg().
The use of this function is not mandatory.

2/ GDB-4.17 patch
-----------------

This patch create a new RTEMS target for GDB-4.17.

The configuration command is the following :
./configure --enable-shared --target=i386RTEMS

To connect to a target, use :

target rtems [your_site_address]

Then, attach the target using : attach 1

And... Debug ;)

You can obtain the original GDB-4.17 on
ftp://ftp.debian.org/debian/dists/stable/main/source/devel/gdb_4.17.orig.tar.gz

This has been tested from a Debian 2.0.1 linux host.

  • Property mode set to 100644
File size: 3.2 KB
Line 
1/*
2 **************************************************************************
3 *
4 * Component =   
5 *
6 * Synopsis  =   rdbg/i386/rdbg_f.c
7 *
8 **************************************************************************
9 */
10
11#include <assert.h>
12#include <errno.h>
13#include <rdbg/reg.h>              
14#include <rdbg/remdeb.h>
15#include <rdbg/rdbg.h>
16#include <rtems/score/cpu.h>    
17#include <rtems/score/thread.h> 
18
19
20void
21CtxToRegs (const CPU_Exception_frame* ctx, xdr_regs* regs)
22{
23    regs->tabreg [GS]           = 0;
24    regs->tabreg [FS]           = 0;
25    regs->tabreg [ES]           = 0;
26    regs->tabreg [DS]           = 0;
27    regs->tabreg [EDI]          = ctx->edi;
28    regs->tabreg [ESI]          = ctx->esi;
29    regs->tabreg [EBP]          = ctx->ebp;
30    regs->tabreg [ESP]          = ctx->esp0;
31    regs->tabreg [EBX]          = ctx->ebx;
32    regs->tabreg [EDX]          = ctx->edx;
33    regs->tabreg [ECX]          = ctx->ecx;
34    regs->tabreg [EAX]          = ctx->eax;
35    regs->tabreg [TRAPNO]       = ctx->idtIndex;
36    regs->tabreg [ERR]          = ctx->faultCode;
37    regs->tabreg [EIP]          = ctx->eip;
38    regs->tabreg [CS]           = ctx->cs & 0xFFFF;
39    regs->tabreg [EFL]          = ctx->eflags;
40}
41
42
43    void
44RegsToCtx (const xdr_regs* regs, CPU_Exception_frame* ctx)
45{
46    ctx->edi            = regs->tabreg [EDI];
47    ctx->esi            = regs->tabreg [ESI];
48    ctx->ebp            = regs->tabreg [EBP];
49    ctx->esp0           = regs->tabreg [ESP];
50    ctx->ebx            = regs->tabreg [EBX];
51    ctx->edx            = regs->tabreg [EDX];
52    ctx->ecx            = regs->tabreg [ECX];
53    ctx->eax            = regs->tabreg [EAX];
54    ctx->idtIndex       = regs->tabreg [TRAPNO];
55    ctx->faultCode      = regs->tabreg [ERR];
56    ctx->eip            = regs->tabreg [EIP];
57    ctx->cs             = regs->tabreg [CS];
58    ctx->eflags         = regs->tabreg [EFL];
59}
60
61void
62get_ctx_thread( Thread_Control *thread, CPU_Exception_frame* ctx)
63{
64    ctx->edi            = thread->Registers.edi;
65    ctx->esi            = thread->Registers.esi;
66    ctx->ebp            = (unsigned32)(thread->Registers.ebp);
67    ctx->esp0           = (unsigned32)(thread->Registers.esp);
68    ctx->ebx            = thread->Registers.ebx;
69    ctx->edx            = 0;
70    ctx->ecx            = 0;
71    ctx->eax            = 0;
72    ctx->idtIndex       = 0;
73    ctx->faultCode      = 0;
74    ctx->eip            = *(unsigned int*)(thread->Registers.esp);
75    ctx->cs             = 0;
76    ctx->eflags         = thread->Registers.eflags;
77}
78
79void
80set_ctx_thread( Thread_Control *thread, CPU_Exception_frame* ctx)
81{
82  thread->Registers.edi = ctx->edi;
83  thread->Registers.esi = ctx->esi;             
84  thread->Registers.ebp = (void*)(ctx->ebp);           
85  thread->Registers.esp = (void*)(ctx->esp0);           
86  thread->Registers.ebx = ctx->ebx;             
87  thread->Registers.eflags = ctx->eflags;               
88}
89
90 
91
92int
93Single_Step(CPU_Exception_frame* ctx)
94{
95  /* Check if not already set */
96  if ((ctx->eflags & EFLAGS_TF) != 0  ||  ExitForSingleStep != 0) {
97    /* Check coherency */
98    assert ((ctx->eflags & EFLAGS_TF) != 0);
99    assert (ExitForSingleStep != 0);
100    return 0;
101  }
102  ctx->eflags |= EFLAGS_TF;     /* eflags */
103  ++ExitForSingleStep;
104 
105  return 0;
106}
107
108 int
109CheckForSingleStep (CPU_Exception_frame* ctx)
110{
111    if (ExitForSingleStep) {
112            /*
113             *  This functions can be called both from
114             *  INT1 and INT3 handlers. In case it is
115             *  called from INT3, need to clear TF.
116             */
117        ctx->eflags &= ~EFLAGS_TF;
118        ExitForSingleStep = 0;
119        return 1;
120    }
121    return 0;
122}
123
124void
125CancelSingleStep (CPU_Exception_frame* ctx)
126{
127        /* Cancel scheduled SS */
128    ctx->eflags &= ~EFLAGS_TF;
129    ExitForSingleStep-- ;
130}
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