source: rtems/c/src/lib/libcpu/sparc64/ChangeLog @ ce3bfb7

4.115
Last change on this file since ce3bfb7 was ce3bfb7, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 25, 2010 at 8:33:25 PM

2010-08-25 Gedare Bloom <giddyup44@…>

PR 1688/libcpu

  • shared/score/interrupt.S: Fix bug in the sun4u _ISR_Dispatch code that ends up cloberring the global registers. It manifests primarily as a memory alignment error when the globals are used to read to/from memory.
  • Property mode set to 100644
File size: 2.6 KB
Line 
12010-08-25      Gedare Bloom <giddyup44@yahoo.com>
2
3        PR 1688/libcpu
4        * shared/score/interrupt.S: Fix bug in the sun4u _ISR_Dispatch code
5        that ends up cloberring the global registers. It manifests primarily
6        as a memory alignment error when the globals are used to read to/from
7        memory.
8
92010-08-20      Gedare Bloom <giddyup44@yahoo.com>
10
11        PR 1681/cpukit
12        * shared/score/interrupt.S: With the percpu patch, ASM uses
13        INTERRUPT_STACK_HIGH instead of _CPU_Interrupt_stack_high. The
14        sparc64 was still using the old variable, which was declared in its
15        cpu.h file. This patch to comment out the declaration and switch to
16        using INTERRUPT_STACK_HIGH.
17
182010-06-28      Joel Sherrill <joel.sherrill@oarcorp.com>
19
20        PR 1573/cpukit
21        * shared/score/interrupt.S: Add a per cpu data structure which contains
22        the information required by RTEMS for each CPU core. This
23        encapsulates information such as thread executing, heir, idle and
24        dispatch needed.
25
262010-06-17      Joel Sherrill <joel.sherrill@oarcorp.com>
27
28        * .cvsignore, ChangeLog, Makefile.am, configure.ac, preinstall.am,
29        shared/cache/cache.c, shared/cache/cache_.h,
30        shared/interrupts/installisrentries.c, shared/score/cpu.c,
31        shared/score/interrupt.S, shared/syscall/sparc64-syscall.S,
32        shared/syscall/sparc64-syscall.h: New files.
33
342010-05-13  Gedare Bloom <gedare@gwmail.gwu.edu>
35
36        * sun4u/syscall/sparc-syscall.S: disable/enable interrupts directly.
37
382010-05-10  Gedare Bloom <gedare@gwmail.gwu.edu>
39
40        * shared/score/cpu.c, Makefile.am: Moved cpu.c from sun4v/score
41        * configure.ac: m5sim is no longer part of shared. sun4u option added.
42
432010-05-10  Gedare Bloom <gedare@gwmail.gwu.edu>
44
45        * sun4u/: New model specific subdir.
46        * sun4u/score/, sun4u/syscall/: Copied from sun4v.
47
482010-05-03  Gedare Bloom <gedare@gwmail.gwu.edu>
49
50        * m5sim/syscall/sparc-syscall.h, m5sim/syscall/sparc-syscall.S:
51        Renamed files from syscall.h and syscall.S
52
532010-05-03  Gedare Bloom <gedare@gwmail.gwu.edu>
54
55        * sun4v/syscall/syscall.S: Explicitly enable IE bit when using
56        SYS_irqset.
57        * m5sim/score/cpu.c: install raw handler and isr get level are nops
58
592010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
60
61        * m5sim/score m5sim/syscall: new subdirs
62        * m5sim/syscall/syscall.h m5sim/syscall/syscall.S: New files.
63
642010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
65
66        * sun4v/score/cpu_asm.S: Remove context switch code.
67
682010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
69
70        * shared/, shared/cache, shared/interrupts: Moved cache and
71        interrupts into shared folder.
72
732010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
74
75        * sun4v, sun4v/score/cpu_asm.S, sun4v/score/cpu.c: Copied from
76        score/cpu/sparc64
77
782010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
79
80        * ChangeLog: New file.
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