source: rtems/c/src/lib/libcpu/sparc64/ChangeLog @ 65f2aecc

4.11
Last change on this file since 65f2aecc was 65f2aecc, checked in by Gedare Bloom <gedare@…>, on Nov 6, 2011 at 4:55:33 PM

2011-11-06 Gedare Bloom <gedare@…>

  • Property mode set to 100644
File size: 3.1 KB
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12011-11-06      Gedare Bloom <gedare@rtems.org>
2
3        * ChangeLog: Fix ChangeLog with name and email address
4
52011-11-06      Gedare Bloom <gedare@rtems.org>
6
7        * shared/score/interrupt.S: Pass ISR correct pointer to interrupt frame
8
92011-02-11      Ralf Corsépius <ralf.corsepius@rtems.org>
10
11        * shared/cache/cache.c:
12        Use "__asm__" instead of "asm" for improved c99-compliance.
13
142011-02-02      Ralf Corsépius <ralf.corsepius@rtems.org>
15
16        * configure.ac: Require autoconf-2.68, automake-1.11.1.
17
182010-08-25      Gedare Bloom <giddyup44@yahoo.com>
19
20        PR 1688/libcpu
21        * shared/score/interrupt.S: Fix bug in the sun4u _ISR_Dispatch code
22        that ends up cloberring the global registers. It manifests primarily
23        as a memory alignment error when the globals are used to read to/from
24        memory.
25
262010-08-20      Gedare Bloom <giddyup44@yahoo.com>
27
28        PR 1681/cpukit
29        * shared/score/interrupt.S: With the percpu patch, ASM uses
30        INTERRUPT_STACK_HIGH instead of _CPU_Interrupt_stack_high. The
31        sparc64 was still using the old variable, which was declared in its
32        cpu.h file. This patch to comment out the declaration and switch to
33        using INTERRUPT_STACK_HIGH.
34
352010-06-28      Joel Sherrill <joel.sherrill@oarcorp.com>
36
37        PR 1573/cpukit
38        * shared/score/interrupt.S: Add a per cpu data structure which contains
39        the information required by RTEMS for each CPU core. This
40        encapsulates information such as thread executing, heir, idle and
41        dispatch needed.
42
432010-06-17      Joel Sherrill <joel.sherrill@oarcorp.com>
44
45        * .cvsignore, ChangeLog, Makefile.am, configure.ac, preinstall.am,
46        shared/cache/cache.c, shared/cache/cache_.h,
47        shared/interrupts/installisrentries.c, shared/score/cpu.c,
48        shared/score/interrupt.S, shared/syscall/sparc64-syscall.S,
49        shared/syscall/sparc64-syscall.h: New files.
50
512010-05-13  Gedare Bloom <gedare@gwmail.gwu.edu>
52
53        * sun4u/syscall/sparc-syscall.S: disable/enable interrupts directly.
54
552010-05-10  Gedare Bloom <gedare@gwmail.gwu.edu>
56
57        * shared/score/cpu.c, Makefile.am: Moved cpu.c from sun4v/score
58        * configure.ac: m5sim is no longer part of shared. sun4u option added.
59
602010-05-10  Gedare Bloom <gedare@gwmail.gwu.edu>
61
62        * sun4u/: New model specific subdir.
63        * sun4u/score/, sun4u/syscall/: Copied from sun4v.
64
652010-05-03  Gedare Bloom <gedare@gwmail.gwu.edu>
66
67        * m5sim/syscall/sparc-syscall.h, m5sim/syscall/sparc-syscall.S:
68        Renamed files from syscall.h and syscall.S
69
702010-05-03  Gedare Bloom <gedare@gwmail.gwu.edu>
71
72        * sun4v/syscall/syscall.S: Explicitly enable IE bit when using
73        SYS_irqset.
74        * m5sim/score/cpu.c: install raw handler and isr get level are nops
75
762010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
77
78        * m5sim/score m5sim/syscall: new subdirs
79        * m5sim/syscall/syscall.h m5sim/syscall/syscall.S: New files.
80
812010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
82
83        * sun4v/score/cpu_asm.S: Remove context switch code.
84
852010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
86
87        * shared/, shared/cache, shared/interrupts: Moved cache and
88        interrupts into shared folder.
89
902010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
91
92        * sun4v, sun4v/score/cpu_asm.S, sun4v/score/cpu.c: Copied from
93        score/cpu/sparc64
94
952010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
96
97        * ChangeLog: New file.
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