| 1 | 2010-08-25 Gedare Bloom <giddyup44@yahoo.com> |
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| 2 | |
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| 3 | PR 1688/libcpu |
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| 4 | * shared/score/interrupt.S: Fix bug in the sun4u _ISR_Dispatch code |
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| 5 | that ends up cloberring the global registers. It manifests primarily |
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| 6 | as a memory alignment error when the globals are used to read to/from |
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| 7 | memory. |
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| 8 | |
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| 9 | 2010-08-20 Gedare Bloom <giddyup44@yahoo.com> |
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| 10 | |
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| 11 | PR 1681/cpukit |
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| 12 | * shared/score/interrupt.S: With the percpu patch, ASM uses |
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| 13 | INTERRUPT_STACK_HIGH instead of _CPU_Interrupt_stack_high. The |
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| 14 | sparc64 was still using the old variable, which was declared in its |
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| 15 | cpu.h file. This patch to comment out the declaration and switch to |
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| 16 | using INTERRUPT_STACK_HIGH. |
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| 17 | |
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| 18 | 2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com> |
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| 19 | |
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| 20 | PR 1573/cpukit |
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| 21 | * shared/score/interrupt.S: Add a per cpu data structure which contains |
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| 22 | the information required by RTEMS for each CPU core. This |
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| 23 | encapsulates information such as thread executing, heir, idle and |
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| 24 | dispatch needed. |
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| 25 | |
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| 26 | 2010-06-17 Joel Sherrill <joel.sherrill@oarcorp.com> |
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| 27 | |
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| 28 | * .cvsignore, ChangeLog, Makefile.am, configure.ac, preinstall.am, |
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| 29 | shared/cache/cache.c, shared/cache/cache_.h, |
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| 30 | shared/interrupts/installisrentries.c, shared/score/cpu.c, |
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| 31 | shared/score/interrupt.S, shared/syscall/sparc64-syscall.S, |
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| 32 | shared/syscall/sparc64-syscall.h: New files. |
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| 33 | |
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| 34 | 2010-05-13 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 35 | |
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| 36 | * sun4u/syscall/sparc-syscall.S: disable/enable interrupts directly. |
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| 37 | |
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| 38 | 2010-05-10 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 39 | |
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| 40 | * shared/score/cpu.c, Makefile.am: Moved cpu.c from sun4v/score |
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| 41 | * configure.ac: m5sim is no longer part of shared. sun4u option added. |
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| 42 | |
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| 43 | 2010-05-10 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 44 | |
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| 45 | * sun4u/: New model specific subdir. |
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| 46 | * sun4u/score/, sun4u/syscall/: Copied from sun4v. |
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| 47 | |
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| 48 | 2010-05-03 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 49 | |
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| 50 | * m5sim/syscall/sparc-syscall.h, m5sim/syscall/sparc-syscall.S: |
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| 51 | Renamed files from syscall.h and syscall.S |
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| 52 | |
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| 53 | 2010-05-03 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 54 | |
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| 55 | * sun4v/syscall/syscall.S: Explicitly enable IE bit when using |
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| 56 | SYS_irqset. |
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| 57 | * m5sim/score/cpu.c: install raw handler and isr get level are nops |
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| 58 | |
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| 59 | 2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 60 | |
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| 61 | * m5sim/score m5sim/syscall: new subdirs |
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| 62 | * m5sim/syscall/syscall.h m5sim/syscall/syscall.S: New files. |
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| 63 | |
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| 64 | 2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 65 | |
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| 66 | * sun4v/score/cpu_asm.S: Remove context switch code. |
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| 67 | |
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| 68 | 2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 69 | |
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| 70 | * shared/, shared/cache, shared/interrupts: Moved cache and |
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| 71 | interrupts into shared folder. |
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| 72 | |
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| 73 | 2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 74 | |
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| 75 | * sun4v, sun4v/score/cpu_asm.S, sun4v/score/cpu.c: Copied from |
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| 76 | score/cpu/sparc64 |
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| 77 | |
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| 78 | 2010-05-02 Gedare Bloom <gedare@gwmail.gwu.edu> |
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| 79 | |
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| 80 | * ChangeLog: New file. |
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