source: rtems/c/src/lib/libcpu/sparc/syscall/syscall.S @ 600d88d

5
Last change on this file since 600d88d was 8639685, checked in by Jacob Hansen <jacob.hansen@…>, on 10/28/16 at 14:05:56

sparc: Adjust assembly to improve compability with LLVM

  • All references of %0 changed to %g0
  • 'call label,0' changed to 'call label'. According to the sparc specification call does not take any registers
  • '.seg "text"' changed to '.section ".text"'
  • the synonym stub is replaced with stb
  • the synonym stuh is replaced with sth
  • Property mode set to 100644
File size: 3.3 KB
Line 
1/*
2 *  systrap.S
3 *
4 *  This file contains emulated system calls using software trap 0.
5 *  The following calls are supported:
6 *
7 *    + SYS_exit        (halt)
8 *    + SYS_irqdis      (disable interrupts)
9 *    + SYS_irqset      (set interrupt level)
10 *
11 *  COPYRIGHT:
12 *
13 *  COPYRIGHT (c) 1995. European Space Agency.
14 *
15 *  This terms of the RTEMS license apply to this file.
16 *
17 */
18
19#include <rtems/asm.h>
20#include "syscall.h"
21
22        .section    ".text"
23        /*
24         *  system call - halt
25         *
26         *  On entry:
27         *
28         *    l0 = psr (from trap table)
29         *    l1 = pc
30         *    l2 = npc
31         *    g1 = system call id (1)
32         *
33         *  System Call 1 (exit):
34         *    g2 = additional exit code 1
35         *    g3 = additional exit code 2
36         */
37
38        PUBLIC(syscall)
39
40SYM(syscall):
41        ta      0                       ! syscall 1, halt with %g1,%g2,%g3 info
42
43        PUBLIC(sparc_syscall_exit)
44
45SYM(sparc_syscall_exit):
46
47        mov     SYS_exit, %g1
48        mov     %o0, %g2        ! Additional exit code 1
49        mov     %o1, %g3        ! Additional exit code 2
50        ta      SPARC_SWTRAP_SYSCALL
51
52        /*
53         *  system call - Interrupt Disable
54         *
55         *  On entry:
56         *
57         *    l0 = psr (from trap table)
58         *    l1 = pc
59         *    l2 = npc
60         *    l3 = psr | SPARC_PSR_PIL_MASK
61         *
62         *  On exit:
63         *    g1 = old psr (to user)
64         */
65
66.align 32                               ! Align to 32-byte cache-line
67        PUBLIC(syscall_irqdis)
68
69SYM(syscall_irqdis):
70        mov     %l3, %psr                       ! Set PSR. Write delay 3 instr
71        or      %l0, SPARC_PSR_ET_MASK, %g1     ! return old PSR with ET=1
72        nop                                     ! PSR write delay
73        jmp     %l2                             ! Return to after TA 9.
74         rett   %l2 + 4
75
76        /*
77         *  system call - Interrupt Enable
78         *
79         *  On entry:
80         *
81         *    l0 = psr (from trap table)
82         *    l1 = pc
83         *    l2 = npc
84         *    l3 = psr & ~0x0f00
85         *    g1 = new PIL to write (from user)
86         */
87
88.align 32                               ! Align to 32-byte cache-line
89        PUBLIC(syscall_irqen)
90
91SYM(syscall_irqen):
92        and     %g1, SPARC_PSR_PIL_MASK, %l4    ! %l4 = (%g1 & 0xf00)
93        wr      %l3, %l4, %psr                  ! PSR = (PSR & ~0xf00) ^ %l4
94        nop; nop                                ! PSR write delay;
95        jmp     %l2                             ! Return to after TA 10.
96         rett   %l2 + 4
97
98#if SPARC_HAS_FPU == 1
99        /*
100         *  system call - Interrupt disable and set PSR[EF] according to caller
101         *                specified %g1
102         *
103         *  On entry:
104         *
105         *    g1 = the desired PSR[EF] value (from caller)
106         *    l0 = psr (from trap table)
107         *    l1 = pc
108         *    l2 = npc
109         *    l3 = psr | SPARC_PSR_PIL_MASK
110         *
111         *  On exit:
112         *    g1 = old psr (to user)
113         */
114
115.align 32                               ! Align to 32-byte cache-line
116        PUBLIC(syscall_irqdis_fp)
117
118SYM(syscall_irqdis_fp):
119        /*
120         * We cannot use an intermediate value for operations with the PSR[EF]
121         * bit since they use a 13-bit sign extension and PSR[EF] is bit 12.
122         */
123        sethi   %hi(SPARC_PSR_EF_MASK), %l4
124
125        andn    %l3, %l4, %l3                   ! Clear PSR[EF]
126        and     %g1, %l4, %g1                   ! Select PSR[EF] only from %g1
127        or      %l3, %g1, %l3                   ! Set PSR[EF] according to %g1
128        mov     %l3, %psr                       ! Set PSR. Write delay 3 instr
129        or      %l0, SPARC_PSR_ET_MASK, %g1     ! return old PSR with ET=1
130        nop                                     ! PSR write delay
131        jmp     %l2                             ! Return to after TA 9.
132         rett   %l2 + 4
133#endif
134
135#if defined(RTEMS_PARAVIRT)
136
137        PUBLIC(_SPARC_Get_PSR)
138
139SYM(_SPARC_Get_PSR):
140
141        retl
142         rd     %psr, %o0
143
144        PUBLIC(_SPARC_Set_PSR)
145
146SYM(_SPARC_Set_PSR):
147
148        mov     %o0, %psr
149        nop
150        nop
151        nop
152        retl
153         nop
154
155        PUBLIC(_SPARC_Get_TBR)
156
157SYM(_SPARC_Get_TBR):
158
159        retl
160         rd    %tbr, %o0
161
162        PUBLIC(_SPARC_Set_TBR)
163
164SYM(_SPARC_Set_TBR):
165
166        retl
167         wr    %o0, 0, %tbr
168
169#endif /* defined(RTEMS_PARAVIRT) */
170
171/* end of file */
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