source: rtems/c/src/lib/libcpu/sh/shgdb/score/ispshgdb.c @ ddf7ced

4.104.11
Last change on this file since ddf7ced was ddf7ced, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 30, 2008 at 3:12:38 PM

2008-09-30 Joel Sherrill <joel.sherrill@…>

  • shgdb/score/ispshgdb.c: Add dummy _CPU_ISR_install_vector.
  • Property mode set to 100644
File size: 5.6 KB
Line 
1/*
2 * This file contains the isp frames for the user interrupts.
3 * From these procedures __ISR_Handler is called with the vector number
4 * as argument.
5 *
6 * __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in
7 * some releases of gcc doesn't properly handle #pragma interrupt, if a
8 * file contains both isrs and normal functions.
9 *
10 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
11 *           Bernd Becker (becker@faw.uni-ulm.de)
12 *
13 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
14 *
15 *  This program is distributed in the hope that it will be useful,
16 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
17 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE
18 *
19 *
20 *  COPYRIGHT (c) 1998.
21 *  On-Line Applications Research Corporation (OAR).
22 *
23 *  The license and distribution terms for this file may be
24 *  found in the file LICENSE in this distribution or at
25 *  http://www.rtems.com/license/LICENSE.
26 *
27 *  Modified to reflect dummy isp entries for GDB SH simulator by Joel.
28 *
29 *  $Id$
30 */
31
32#include <rtems/system.h>
33#include <rtems/score/types.h>
34
35/*PAGE
36 *
37 *  _CPU_ISR_install_vector
38 *
39 *  This kernel routine installs the RTEMS handler for the
40 *  specified vector.
41 *
42 *  Input parameters:
43 *    vector      - interrupt vector number
44 *    old_handler - former ISR for this vector number
45 *    new_handler - replacement ISR for this vector number
46 *
47 *  Output parameters:  NONE
48 *
49 */
50void _CPU_ISR_install_vector(
51  uint32_t    vector,
52  proc_ptr    new_handler,
53  proc_ptr   *old_handler
54)
55{
56/* Nothing to do on gdb simulator */
57}
58
59/*
60 * This is a exception vector table
61 *
62 * It has the same structure as the actual vector table (vectab)
63 */
64
65void _dummy_isp(uint32_t);
66
67proc_ptr _Hardware_isr_Table[256]={
68_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* PWRon Reset, Maual Reset,...*/
69_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
70_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
71_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
72_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
73_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
74_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
75_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
76/* trapa 0 -31 */
77_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
78_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
79_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
80_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
81_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
82_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
83_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
84_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
85_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
86_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
87_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
88_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
89_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
90_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
91_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
92_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
93_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
94_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
95_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
96_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
97_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
98_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
99_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
100_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
101_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
102_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
103_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
104_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
105_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
106_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
107_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* irq 152-155*/
108_dummy_isp
109};
110
111#define Str(a)#a
112
113/*
114 * Some versions of gcc and all version of egcs at least until egcs-1.1b
115 * are not able to handle #pragma interrupt correctly if more than 1 isr is
116 * contained in a file and when optimizing.
117 * We try to work around this problem by using the macro below.
118 */
119#define isp( name, number, func)\
120asm (".global _"Str(name)"\n\t"\
121     "_"Str(name)":       \n\t"\
122     "    mov.l r0,@-r15   \n\t"\
123     "    mov.l r1,@-r15   \n\t"\
124     "    mov.l r2,@-r15   \n\t"\
125     "    mov.l r3,@-r15   \n\t"\
126     "    mov.l r4,@-r15   \n\t"\
127     "    mov.l r5,@-r15   \n\t"\
128     "    mov.l r6,@-r15   \n\t"\
129     "    mov.l r7,@-r15   \n\t"\
130     "    mov.l r14,@-r15  \n\t"\
131     "    sts.l pr,@-r15   \n\t"\
132     "    sts.l mach,@-r15 \n\t"\
133     "    sts.l macl,@-r15 \n\t"\
134     "    mov r15,r14      \n\t"\
135     "    mov.l "Str(name)"_v, r2 \n\t"\
136     "    mov.l "Str(name)"_k, r1\n\t"\
137     "    jsr @r1           \n\t"\
138     "    mov   r2,r4      \n\t"\
139     "    mov   r14,r15    \n\t"\
140     "    lds.l @r15+,macl \n\t"\
141     "    lds.l @r15+,mach \n\t"\
142     "    lds.l @r15+,pr   \n\t"\
143     "    mov.l @r15+,r14  \n\t"\
144     "    mov.l @r15+,r7   \n\t"\
145     "    mov.l @r15+,r6   \n\t"\
146     "    mov.l @r15+,r5   \n\t"\
147     "    mov.l @r15+,r4   \n\t"\
148     "    mov.l @r15+,r3   \n\t"\
149     "    mov.l @r15+,r2   \n\t"\
150     "    mov.l @r15+,r1   \n\t"\
151     "    mov.l @r15+,r0   \n\t"\
152     "    rte              \n\t"\
153     "    nop              \n\t"\
154     "    .align 2         \n\t"\
155     #name"_k: \n\t"\
156     ".long "Str(func)"\n\t"\
157     #name"_v: \n\t"\
158     ".long "Str(number));
159
160/************************************************
161 * Dummy interrupt service procedure for
162 * interrupts being not allowed --> Trap 34
163 ************************************************/
164asm(" .section .text\n\
165.global __dummy_isp\n\
166__dummy_isp:\n\
167      mov.l r14,@-r15\n\
168      mov   r15, r14\n\
169      trapa #34\n\
170      mov.l @r15+,r14\n\
171      rte\n\
172      nop");
173
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