source: rtems/c/src/lib/libcpu/sh/shgdb/score/ispshgdb.c @ be7ca34

4.104.11
Last change on this file since be7ca34 was be7ca34, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 25, 2008 at 7:32:15 PM

2008-09-25 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, configure.ac, sh7032/score/cpu_asm.c, sh7045/score/cpu_asm.c, sh7750/score/cpu_asm.c: Move duplicated context switch code to score/cpu and provide an interrupt handling stub for the GDB SuperH simulator since it does not support interrupts or devices. This has been used to run tests on the simulator BSP as SH1, SH2, and SH4.
  • shgdb/score/cpu_asm.c, shgdb/score/ispshgdb.c: New files.
  • Property mode set to 100644
File size: 5.1 KB
Line 
1/*
2 * This file contains the isp frames for the user interrupts.
3 * From these procedures __ISR_Handler is called with the vector number
4 * as argument.
5 *
6 * __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in
7 * some releases of gcc doesn't properly handle #pragma interrupt, if a
8 * file contains both isrs and normal functions.
9 *
10 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
11 *           Bernd Becker (becker@faw.uni-ulm.de)
12 *
13 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
14 *
15 *  This program is distributed in the hope that it will be useful,
16 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
17 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE
18 *
19 *
20 *  COPYRIGHT (c) 1998.
21 *  On-Line Applications Research Corporation (OAR).
22 *
23 *  The license and distribution terms for this file may be
24 *  found in the file LICENSE in this distribution or at
25 *  http://www.rtems.com/license/LICENSE.
26 *
27 *  Modified to reflect dummy isp entries for GDB SH simulator by Joel.
28 *
29 *  $Id$
30 */
31
32#include <rtems/system.h>
33#include <rtems/score/types.h>
34
35/*
36 * This is a exception vector table
37 *
38 * It has the same structure as the actual vector table (vectab)
39 */
40
41void _dummy_isp(uint32_t);
42
43proc_ptr _Hardware_isr_Table[256]={
44_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* PWRon Reset, Maual Reset,...*/
45_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
46_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
47_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
48_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
49_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
50_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
51_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
52/* trapa 0 -31 */
53_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
54_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
55_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
56_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
57_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
58_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
59_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
60_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
61_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
62_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
63_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
64_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
65_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
66_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
67_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
68_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
69_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
70_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
71_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
72_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
73_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
74_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
75_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
76_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
77_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
78_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
79_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
80_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
81_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
82_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp,
83_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* irq 152-155*/
84_dummy_isp
85};
86
87#define Str(a)#a
88
89/*
90 * Some versions of gcc and all version of egcs at least until egcs-1.1b
91 * are not able to handle #pragma interrupt correctly if more than 1 isr is
92 * contained in a file and when optimizing.
93 * We try to work around this problem by using the macro below.
94 */
95#define isp( name, number, func)\
96asm (".global _"Str(name)"\n\t"\
97     "_"Str(name)":       \n\t"\
98     "    mov.l r0,@-r15   \n\t"\
99     "    mov.l r1,@-r15   \n\t"\
100     "    mov.l r2,@-r15   \n\t"\
101     "    mov.l r3,@-r15   \n\t"\
102     "    mov.l r4,@-r15   \n\t"\
103     "    mov.l r5,@-r15   \n\t"\
104     "    mov.l r6,@-r15   \n\t"\
105     "    mov.l r7,@-r15   \n\t"\
106     "    mov.l r14,@-r15  \n\t"\
107     "    sts.l pr,@-r15   \n\t"\
108     "    sts.l mach,@-r15 \n\t"\
109     "    sts.l macl,@-r15 \n\t"\
110     "    mov r15,r14      \n\t"\
111     "    mov.l "Str(name)"_v, r2 \n\t"\
112     "    mov.l "Str(name)"_k, r1\n\t"\
113     "    jsr @r1           \n\t"\
114     "    mov   r2,r4      \n\t"\
115     "    mov   r14,r15    \n\t"\
116     "    lds.l @r15+,macl \n\t"\
117     "    lds.l @r15+,mach \n\t"\
118     "    lds.l @r15+,pr   \n\t"\
119     "    mov.l @r15+,r14  \n\t"\
120     "    mov.l @r15+,r7   \n\t"\
121     "    mov.l @r15+,r6   \n\t"\
122     "    mov.l @r15+,r5   \n\t"\
123     "    mov.l @r15+,r4   \n\t"\
124     "    mov.l @r15+,r3   \n\t"\
125     "    mov.l @r15+,r2   \n\t"\
126     "    mov.l @r15+,r1   \n\t"\
127     "    mov.l @r15+,r0   \n\t"\
128     "    rte              \n\t"\
129     "    nop              \n\t"\
130     "    .align 2         \n\t"\
131     #name"_k: \n\t"\
132     ".long "Str(func)"\n\t"\
133     #name"_v: \n\t"\
134     ".long "Str(number));
135
136/************************************************
137 * Dummy interrupt service procedure for
138 * interrupts being not allowed --> Trap 34
139 ************************************************/
140asm(" .section .text\n\
141.global __dummy_isp\n\
142__dummy_isp:\n\
143      mov.l r14,@-r15\n\
144      mov   r15, r14\n\
145      trapa #34\n\
146      mov.l @r15+,r14\n\
147      rte\n\
148      nop");
149
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