1 | /* |
---|
2 | * Generic UART Serial driver for SH-4 processors definitions |
---|
3 | * |
---|
4 | * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russian Fed. |
---|
5 | * Author: Alexandra Kossovsky <sasha@oktet.ru> |
---|
6 | * |
---|
7 | * The license and distribution terms for this file may be |
---|
8 | * found in the file LICENSE in this distribution or at |
---|
9 | * |
---|
10 | * http://www.rtems.com/license/LICENSE. |
---|
11 | * |
---|
12 | * @(#) $Id$ |
---|
13 | * |
---|
14 | */ |
---|
15 | |
---|
16 | #ifndef __SH4UART_H__ |
---|
17 | #define __SH4UART_H__ |
---|
18 | |
---|
19 | #include <rtems/score/sh7750_regs.h> |
---|
20 | |
---|
21 | |
---|
22 | /* |
---|
23 | * Define this to work from gdb stub |
---|
24 | */ |
---|
25 | |
---|
26 | /* FIXME: This is BSP-specific */ |
---|
27 | #define SH4_WITH_IPL |
---|
28 | |
---|
29 | #define SH4_SCI 1 /* Serial Communication Interface - SCI */ |
---|
30 | #define SH4_SCIF 2 /* Serial Communication Interface with FIFO - SCIF */ |
---|
31 | #define TRANSMIT_TRIGGER_VALUE(ttrg) ((ttrg) == SH7750_SCFCR2_RTRG_1 ? 1 : \ |
---|
32 | (ttrg) == SH7750_SCFCR2_RTRG_4 ? 4 : \ |
---|
33 | (ttrg) == SH7750_SCFCR2_RTRG_8 ? 8 : 14) |
---|
34 | |
---|
35 | /* |
---|
36 | * Macros to call UART registers |
---|
37 | */ |
---|
38 | #define SCRDR(n) (*(volatile uint8_t*)SH7750_SCRDR(n)) |
---|
39 | #define SCRDR1 SCRDR(1) |
---|
40 | #define SCRDR2 SCRDR(2) |
---|
41 | #define SCTDR(n) (*(volatile uint8_t*)SH7750_SCTDR(n)) |
---|
42 | #define SCTDR1 SCTDR(1) |
---|
43 | #define SCTDR2 SCTDR(2) |
---|
44 | #define SCSMR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSMR1 : \ |
---|
45 | *(volatile uint16_t*)SH7750_SCSMR2) |
---|
46 | #define SCSMR1 SCSMR(1) |
---|
47 | #define SCSMR2 SCSMR(2) |
---|
48 | #define SCSCR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSCR1 : \ |
---|
49 | *(volatile uint16_t*)SH7750_SCSCR2) |
---|
50 | #define SCSCR1 SCSCR(1) |
---|
51 | #define SCSCR2 SCSCR(2) |
---|
52 | #define SCSSR(n) ((n) == 1 ? *(volatile uint8_t*)SH7750_SCSSR1 : \ |
---|
53 | *(volatile uint16_t*)SH7750_SCSSR2) |
---|
54 | #define SCSSR1 SCSSR(1) |
---|
55 | #define SCSSR2 SCSSR(2) |
---|
56 | #define SCSPTR1 (*(volatile uint8_t*)SH7750_SCSPTR1) |
---|
57 | #define SCSPTR2 (*(volatile uint16_t*)SH7750_SCSPTR2) |
---|
58 | #define SCBRR(n) (*(volatile uint8_t*)SH7750_SCBRR(n)) |
---|
59 | #define SCBRR1 SCBRR(1) |
---|
60 | #define SCBRR2 SCBRR(2) |
---|
61 | #define SCFCR2 (*(volatile uint16_t*)SH7750_SCFCR2) |
---|
62 | #define SCFDR2 (*(volatile uint16_t*)SH7750_SCFDR2) |
---|
63 | #define SCLSR2 (*(volatile uint16_t*)SH7750_SCLSR2) |
---|
64 | |
---|
65 | #define IPRB (*(volatile uint16_t*)SH7750_IPRB) |
---|
66 | #define IPRC (*(volatile uint16_t*)SH7750_IPRC) |
---|
67 | |
---|
68 | /* |
---|
69 | * The following structure is a descriptor of single UART channel. |
---|
70 | * It contains the initialization information about channel and |
---|
71 | * current operating values |
---|
72 | */ |
---|
73 | typedef struct sh4uart { |
---|
74 | uint8_t chn; /* UART channel number */ |
---|
75 | uint8_t int_driven; /* UART interrupt vector number, or |
---|
76 | 0 if polled I/O */ |
---|
77 | void *tty; /* termios channel descriptor */ |
---|
78 | |
---|
79 | volatile const char *tx_buf; /* Transmit buffer from termios */ |
---|
80 | volatile uint32_t tx_buf_len; /* Transmit buffer length */ |
---|
81 | volatile uint32_t tx_ptr; /* Index of next char to transmit*/ |
---|
82 | |
---|
83 | rtems_isr_entry old_handler_transmit; /* Saved interrupt handlers */ |
---|
84 | rtems_isr_entry old_handler_receive; |
---|
85 | |
---|
86 | tcflag_t c_iflag; /* termios input mode flags */ |
---|
87 | rtems_boolean parerr_mark_flag; /* Parity error processing state */ |
---|
88 | } sh4uart; |
---|
89 | |
---|
90 | /* |
---|
91 | * Functions from sh4uart.c |
---|
92 | */ |
---|
93 | |
---|
94 | /* sh4uart_init -- |
---|
95 | * This function verifies the input parameters and perform initialization |
---|
96 | * of the Motorola Coldfire on-chip UART descriptor structure. |
---|
97 | * |
---|
98 | */ |
---|
99 | rtems_status_code |
---|
100 | sh4uart_init(sh4uart *uart, void *tty, int chn, int int_driven); |
---|
101 | |
---|
102 | /* sh4uart_reset -- |
---|
103 | * This function perform the hardware initialization of Motorola |
---|
104 | * Coldfire processor on-chip UART controller using parameters |
---|
105 | * filled by the sh4uart_init function. |
---|
106 | */ |
---|
107 | rtems_status_code |
---|
108 | sh4uart_reset(sh4uart *uart); |
---|
109 | |
---|
110 | /* sh4uart_disable -- |
---|
111 | * This function disable the operations on Motorola Coldfire UART |
---|
112 | * controller |
---|
113 | */ |
---|
114 | rtems_status_code |
---|
115 | sh4uart_disable(sh4uart *uart, int disable_port); |
---|
116 | |
---|
117 | /* sh4uart_set_attributes -- |
---|
118 | * This function parse the termios attributes structure and perform |
---|
119 | * the appropriate settings in hardware. |
---|
120 | */ |
---|
121 | rtems_status_code |
---|
122 | sh4uart_set_attributes(sh4uart *mcf, const struct termios *t); |
---|
123 | |
---|
124 | /* sh4uart_poll_read -- |
---|
125 | * This function tried to read character from MCF UART and perform |
---|
126 | * error handling. |
---|
127 | */ |
---|
128 | int |
---|
129 | sh4uart_poll_read(sh4uart *uart); |
---|
130 | |
---|
131 | #ifdef SH4_WITH_IPL |
---|
132 | /* ipl_console_poll_read -- |
---|
133 | * This function tried to read character from MCF UART over SH-IPL. |
---|
134 | */ |
---|
135 | int |
---|
136 | ipl_console_poll_read(int minor); |
---|
137 | |
---|
138 | /* sh4uart_interrupt_write -- |
---|
139 | * This function initiate transmitting of the buffer in interrupt mode. |
---|
140 | */ |
---|
141 | rtems_status_code |
---|
142 | sh4uart_interrupt_write(sh4uart *uart, const char *buf, int len); |
---|
143 | |
---|
144 | /* sh4uart_poll_write -- |
---|
145 | * This function transmit buffer byte-by-byte in polling mode. |
---|
146 | */ |
---|
147 | int |
---|
148 | sh4uart_poll_write(sh4uart *uart, const char *buf, int len); |
---|
149 | |
---|
150 | /* ipl_console_poll_write -- |
---|
151 | * This function transmit buffer byte-by-byte in polling mode over SH-IPL. |
---|
152 | */ |
---|
153 | int |
---|
154 | ipl_console_poll_write(int minor, const char *buf, int len); |
---|
155 | |
---|
156 | /* |
---|
157 | * ipl_finish -- |
---|
158 | * Says gdb that program finished to get out from it. |
---|
159 | */ |
---|
160 | extern void ipl_finish(void); |
---|
161 | #endif |
---|
162 | |
---|
163 | /* sh4uart_stop_remote_tx -- |
---|
164 | * This function stop data flow from remote device. |
---|
165 | */ |
---|
166 | rtems_status_code |
---|
167 | sh4uart_stop_remote_tx(sh4uart *uart); |
---|
168 | |
---|
169 | /* sh4uart_start_remote_tx -- |
---|
170 | * This function resume data flow from remote device. |
---|
171 | */ |
---|
172 | rtems_status_code |
---|
173 | sh4uart_start_remote_tx(sh4uart *uart); |
---|
174 | |
---|
175 | /* Descriptor structures for two on-chip UART channels */ |
---|
176 | extern sh4uart sh4_uarts[2]; |
---|
177 | |
---|
178 | #endif |
---|
179 | |
---|