source: rtems/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c @ 24713163

5
Last change on this file since 24713163 was 24713163, checked in by Sebastian Huber <sebastian.huber@…>, on 05/18/16 at 06:06:54

score: Rename _ISR_Disable() and _ISR_Enable()

Rename _ISR_Disable() into _ISR_Local_disable(). Rename _ISR_Enable()
into _ISR_Local_enable(). Remove _Debug_Is_owner_of_giant().

This is a preparation to remove the Giant lock.

Update #2555.

  • Property mode set to 100644
File size: 3.9 KB
Line 
1/*
2 *  This file contains the basic algorithms for all assembly code used
3 *  in an specific CPU port of RTEMS.  These algorithms must be implemented
4 *  in assembly language
5 *
6 *  NOTE:  This port uses a C file with inline assembler instructions
7 *
8 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
9 *           Bernd Becker (becker@faw.uni-ulm.de)
10 *
11 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
12 *
13 *  This program is distributed in the hope that it will be useful,
14 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
16 *
17 *
18 *  COPYRIGHT (c) 1998.
19 *  On-Line Applications Research Corporation (OAR).
20 *
21 *  The license and distribution terms for this file may be
22 *  found in the file LICENSE in this distribution or at
23 *  http://www.rtems.org/license/LICENSE.
24 */
25
26/*
27 *  This is supposed to be an assembly file.  This means that system.h
28 *  and cpu.h should not be included in a "real" cpu_asm file.  An
29 *  implementation in assembly should include "cpu_asm.h"
30 */
31
32#include <rtems/system.h>
33#include <rtems/score/cpu.h>
34#include <rtems/score/isr.h>
35#include <rtems/score/threaddispatch.h>
36#include <rtems/score/sh.h>
37
38#include <rtems/score/ispsh7045.h>
39#include <rtems/score/iosh7045.h>
40#include <rtems/score/sh_io.h>
41
42/* from cpu_isps.c */
43extern proc_ptr         _Hardware_isr_Table[];
44
45#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
46  unsigned long    *_old_stack_ptr;
47#endif
48
49register unsigned long  *stack_ptr __asm__ ("r15");
50
51/*
52 * sh_set_irq_priority
53 *
54 * this function sets the interrupt level of the specified interrupt
55 *
56 * parameters:
57 *             - irq : interrupt number
58 *             - prio: priority to set for this interrupt number
59 *
60 * returns:    0 if ok
61 *             -1 on error
62 */
63
64unsigned int sh_set_irq_priority(
65  unsigned int irq,
66  unsigned int prio )
67{
68  uint32_t   shiftcount;
69  uint32_t   prioreg;
70  uint16_t   temp16;
71  ISR_Level  level;
72
73  /*
74   * first check for valid interrupt
75   */
76  if (( irq > 156) || (irq < 64) || (_Hardware_isr_Table[irq] == _dummy_isp))
77    return -1;
78  /*
79   * check for valid irq priority
80   */
81  if ( prio > 15 )
82    return -1;
83
84  /*
85   * look up appropriate interrupt priority register
86   */
87  if ( irq > 71)
88    {
89      irq = irq - 72;
90      shiftcount = 12 - ((irq & ~0x03) % 16);
91
92      switch( irq / 16)
93        {
94        case 0: { prioreg = INTC_IPRC; break;}
95        case 1: { prioreg = INTC_IPRD; break;}
96        case 2: { prioreg = INTC_IPRE; break;}
97        case 3: { prioreg = INTC_IPRF; break;}
98        case 4: { prioreg = INTC_IPRG; break;}
99        case 5: { prioreg = INTC_IPRH; break;}
100        default: return -1;
101        }
102    }
103  else
104    {
105      shiftcount = 12 - 4 * ( irq % 4);
106      if ( irq > 67)
107        prioreg = INTC_IPRB;
108      else
109        prioreg = INTC_IPRA;
110    }
111
112  /*
113   * Set the interrupt priority register
114   */
115  _ISR_Local_disable( level );
116
117    temp16 = read16( prioreg);
118    temp16 &= ~( 15 << shiftcount);
119    temp16 |= prio << shiftcount;
120    write16( temp16, prioreg);
121
122  _ISR_Local_enable( level );
123
124  return 0;
125}
126
127/*
128 *  This routine provides the RTEMS interrupt management.
129 */
130
131void __ISR_Handler( uint32_t   vector)
132{
133  ISR_Level level;
134
135  _ISR_Local_disable( level );
136
137  _Thread_Dispatch_disable();
138
139#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
140  if ( _ISR_Nest_level == 0 )
141    {
142      /* Install irq stack */
143      _old_stack_ptr = stack_ptr;
144      stack_ptr = _CPU_Interrupt_stack_high;
145    }
146
147#endif
148
149  _ISR_Nest_level++;
150
151  _ISR_Local_enable( level );
152
153  /* call isp */
154  if ( _ISR_Vector_table[ vector])
155    (*_ISR_Vector_table[ vector ])( vector );
156
157  _ISR_Local_disable( level );
158
159  _Thread_Dispatch_unnest( _Per_CPU_Get() );
160
161  _ISR_Nest_level--;
162
163#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
164
165  if ( _ISR_Nest_level == 0 )
166    /* restore old stack pointer */
167    stack_ptr = _old_stack_ptr;
168#endif
169
170  _ISR_Local_enable( level );
171
172  if ( _ISR_Nest_level )
173    return;
174
175  if ( !_Thread_Dispatch_is_enabled() ) {
176    return;
177  }
178
179  if ( _Thread_Dispatch_necessary ) {
180    _Thread_Dispatch();
181  }
182}
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